This paper addresses the problems that have been widely reported with the dynamic behavior of application circuits using wide bandgap devices of both common semiconductor types, i.e., silicon carbide and gallium nitride. It is now common to see recommendations to the effect that advanced wide bandgap transistors need advanced packaging to realize reliable operation and expected benefits. This thinking is so prevalent that at least one manufacturer of GaN transistors does not supply their devices in packaging. While this is hardly the view of most manufacturers, it does highlight that wide bandgap transistors have succeeded so well in demonstrating new capabilities in high voltage, high current, and/or high frequency that the design methodology for integrating these devices into power electronics applications needs to be rethought. But what should this thinking be? Since fast switching is an essential part of the value of wide bandgap devices, it is imperative that the designers of high-power modules using these devices have modeling and simulation tools to manage the near RF dynamic behavior of the system in order to preclude instability and to manage electromagnetic emission. Fortunately, the well established rules of stability in electronic circuits should apply, but during analysis of power electronic applications they need to be augmented with model features omitted with silicon power semiconductors. But as a practical matter, the additions to the model need to be as simple as possible while achieving a level of confidence that a power module design containing SiC or GaN transistors integrated with a particular gate drive will perform with assurance of stability and with acceptable dynamics. An example of acceptable dynamics is compliance with electromagnetic interference certification requirements. But what are the means available? The current literature primarily addresses the issue quantitatively with what might be called the finite element method. This involves trying to experimentally measure or estimate through simulation the lumped element parasitics connecting all devices to each other and to drain, source, and gate buses leading to the external contacts of the power package and continuing to the gate drive. These parasitics are usually lumped series inductances and resistances, and shunt capacitances to surfaces of common potential so that common-mode interference can also be understood. This method has been shown to be successful in identifying the impedance-based mode changes from parasitic “ringing” to periodic oscillations. The former is considered to be a relatively unavoidable nuisance that dissipates the energy stored in parasitic components during one switching cycle of a commutated power pole. The latter is unacceptable as it converts energy from a main energy supply, such as the DC bus feeding a half-bridge circuit, into recurring oscillations. An impedance based method known as the concept of negative resistance oscillators is shown to be quantitatively successful at predicting the mode change from stable to unstable in a circuit with a single discrete device. But for the case of a multi-chip power package, with much greater complexity in the number of active semiconductor devices and the number of interconnections and shunt paths defining the parasitic degrees of freedom, a more systematic method is needed that is still behavioral in nature to keep the methodology computationally tractable. This paper describes a novel blend of the approaches used by two engineering communities that integrate power devices into application specific packaging. The impedance method of the lumped-element negative resistance oscillator representing the method of the power electronics engineering community is extended to the power package containing wide bandgap devices with the use of the S-parameter approach that dominates the microwave engineering community. A commercial simulation tool, such as ADS by Agilent, is shown to easily extract S-parameters of arbitrary package design using physics based modeling and simulation. The resulting comprehensive description of the parasitic properties of the power package captured by the multi-port S-parameter behavioral model is combined with the channel-modulation model of the transistors to form a negative resistance description of the root cause of poor dynamics and instability. The result is a new approach for specifying acceptable dynamic performance and stability assurance of multi-chip integrated power modules containing wide bandgap semiconductors.
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Open Access
Dec 17, 2022
Christian Riener + 6
