Multiple Processor Machines Research Articles

Analysis of operator-machine configuration for single and multi-processor machines

The research addresses the issue of determining optimal machine-operator configuration so that the ideal machine-operator ratio can be found and the operator efficiency can be calculated as a part of the overall input efficiency. Formula for optimal machine-operator ratio for single and multiple processor machines are derived. The formula allows us how to determine the best machine-operator ratio and calculate the operator usage efficiency. Simulations are used to verify the formula with matching product releasing times and machine utilisation rate. Data from a wafer reclaim factory is used to illustrate the calculation of equipment usage efficiency. Opportunity for doubling operator usage efficiency is identified using the derived formula. Contributions of this work include: (1) deriving a set of formula to calculate optimal operator-machine configuration and the operator usage efficiency for multi-processor machine sets; (2) identifying the inherent unusable time of operator due to the process time distribution of the machine tools; and (3) doubling the operator usage efficiency of the subject factory.

An implementation of a three-dimensional wave propagation model in a parallel processing computational environment

A parallel processor implementation of a three-dimensional parabolic equation approach to acoustic wave propagation was developed using the University of Texas Cray T3E (Lone Star). Lone Star is currently an 84 processor machine. We will discuss results from modeling various underwater acoustic environments where three-dimensional results are required, and the computation speed-up achieved using a multiprocessor approach. High performance computing, i.e., computation on high speed multiple processor machines, is now entering the lower priced small computer era. Environmental acoustic problems heretofore ignored because of the computational intensity required can now be considered for operational field systems. Although the T3E is a mainframe machine, this model is being developed for a low cost clustered processor machine with a combination of shared and distributed memory, which we expect to have in operation this year. [Work sponsored under Independent Research and Development at the Applied Research Laboratories. Computer support on the T3E is funded by the National Partnership for Advanced Computational Infrastructure through the University of Texas Advanced Computing Center for Engineering and Science.]

Time-Trimming Tricks for Dynamic Simulations: Splitting Force Updates to Reduce Computational Work

Time-Trimming Tricks for Dynamic Simulations: Splitting Force Updates to Reduce Computational Work

Dielectric breakdown in a simplified parallel model

The growth of streamer trees in insulating fluids (a submicrosecond process that triggers high-voltage breakdown) has been simulated with a combination of parallel-coding tools. Large grids and arrays display well the multifractal, self-avoiding character of the streamer trees. Three physical cases have been approximated by different power-law weightings of the statistical growth filter: dense anode trees, in the uniform field; sparse cathode trees (a rarer experimental case); and ultrasparse anode trees (seen in some fluids of higher viscosity). The model is contained in a software package that is written in Fortran 90 with data parallel extensions for distributed execution. These extensions encapsulate an underlying, invisible message-passing environment, thus enabling the solution of memory-intensive problems on a group of limited-memory processors. Block partitioning creates processes of reasonable size, which operate in parallel like small copies of the original code. The user needs only to express his model in transparent array-directed commands; parallel interfacing between blocks is handled invisibly. Breakdown is performed in parallel in each of the local blocks. Results are presented for experiments run on eight and nine nodes of the IBM SP2, and four and eight nodes of the SGI Onyx and Origin, three examples of multiple-processor machines. Display is carried out in three dimensions. Timing of the growth can be shown by color banding or by frame animation of the results. The adequacy of the growth rules and size scaling are tested by comparing the simulations against snapshots from high-voltage discharge events.

Robust computation of optical flow in a multi-scale differential framework

We have developed a new algorithm for computing optical flow in a differential framework. The image sequence is first convolved with a set of linear, separable spatiotemporal filter kernels similar to those that have been used in other early vision problems such as texture and stereopsis. The brightness constancy constraint can then be applied to each of the resulting images, giving us, in general, an overdetermined system of equations for the optical flow at each pixel. There are three principal sources of error: (a) stochastic error due to sensor noise (b) systematic errors in the presence of large displacements and (c) errors due to failure of the brightness constancy model. Our analysis of these errors leads us to develop an algorithm based on a robust version of total least squares. Each optical flow vector computed has an associated reliability measure which can be used in subsequent processing. The performance of the algorithm on the data set used by Barron et al. (IJCV 1994) compares favorably with other techniques. In addition to being separable, the filters used are also causal, incorporating only past time frames. The algorithm is fully parallel and has been implemented on a multiple processor machine.

Register allocation over the program dependence graph

This paper describes RAP, a Register Allocator that allocates registers over the Program Dependence Graph (PDG) representation of a program in a hierarchical manner. The PDG program representation has been used successfully for scalar optimizations, the detection and improvement of parallelism for vector machines, multiple processor machines, and machines that exhibit instruction level parallelism, as well as debugging, the integration of different versions of a program, and translation of imperative programs for data flow machines. By basing register allocation on the PDG, the register allocation phase may be more easily integrated and intertwined with other optimization analyses and transformations. In addition, the advantages of a hierarchical approach to global register allocation can be attained without constructing an additional structure used solely for register allocation. Our experimental results have shown that on average, code allocated registers via RAP executed 2.7% faster than code allocated registers via a standard global register allocator.

A fast recursive parallel algorithm for triangulation of unordered DTM's

Advances in computer technology and operating systems have brought us into an age where multiple processor machines are becoming increasingly important for the timely solution of complex, numerically intensive applications. The decomposition of a digital terrain model (DTM) into mutually exclusive data sets lends itself readily to parallel processing techniques. The use of a modern, high level language with the ability to support recursion and dynamic memory allocation allows an efficient and succinct implementation of a generalised triangulation algorithm.