Multi-Subband Ensemble Monte Carlo Simulator Research Articles

Analysis of the Reformulated Source to Drain Tunneling Probability for Improving the Accuracy of a Multisubband Ensemble Monte Carlo Simulator.

As an attempt to improve the description of the tunneling current that arises in ultrascaled nanoelectronic devices when charge carriers succeed in traversing the potential barrier between source and drain, an alternative and more accurate non-local formulation of the tunneling probability was suggested. This improvement of the probability computation might result of particular interest in the context of Monte Carlo simulations where the utilization of the conventional Wentzel-Kramers-Brillouin (WKB) approximation tends to overestimate the number of particles experiencing this type of direct tunneling. However, in light of the reformulated expression for the tunneling probability, it becomes of paramount importance to assess the type of potentials for which it behaves adequately. We demonstrate that, for ensuring boundedness, the top of the potential barrier cannot feature a plateau, but rather has to behave quadratically as one approaches its maximum. Moreover, we show that monotonicity of the reformulated tunneling probability is not guaranteed by boundedness and requires an additional constraint regarding the derivative of the prefactor that modifies the traditional WKB tunneling probability.

Source-to-Drain Tunneling Analysis in FDSOI, DGSOI, and FinFET Devices by Means of Multisubband Ensemble Monte Carlo

The inclusion of quantum effects in the transport direction plays an important role in the extensive research of ultrascaled electronic devices. In this context, it is necessary to study how these phenomena affect different technological architectures in order to conclude which one can be the best candidate to replace standard technology. This paper presents the implementation of direct source-to-drain tunneling effect in a multisubband ensemble Monte Carlo simulator showing its influence in different structures such as fully depleted silicon-on-insulator, double-gate silicon-on-insulator, and FinFET devices. The differences in the potential profile and the electron distribution in the subbands for these architectures modify the number of electrons affected by this quantum mechanism and, therefore, their short-channel behavior.

Multi-Subband Ensemble Monte Carlo simulations of scaled GAA MOSFETs

We developed a Multi-Subband Ensemble Monte Carlo simulator for non-planar devices, taking into account two-dimensional quantum confinement. It couples self-consistently the solution of the 3D Poisson equation, the 2D Schrödinger equation, and the 1D Boltzmann transport equation with the Ensemble Monte Carlo method. This simulator was employed to study MOS devices based on ultra-scaled Gate-All-Around Si nanowires with diameters in the range from 4 nm to 8 nm with gate length from 8 nm to 14 nm. We studied the output and transfer characteristics, interpreting the behavior in the sub-threshold region and in the ON state in terms of the spatial charge distribution and the mobility computed with the same simulator. We analyzed the results, highlighting the contribution of different valleys and subbands and the effect of the gate bias on the energy and velocity profiles. Finally the scaling behavior was studied, showing that only the devices with D=4nm maintain a good control of the short channel effects down to the gate length of 8nm.

Implementation of Band-to-Band Tunneling Phenomena in a Multisubband Ensemble Monte Carlo Simulator: Application to Silicon TFETs

Tunnel FETs (TFETs) are in the way to become an alternative to conventional MOSFETs due to the possibility of achieving low subthreshold swing combined with small OFF current levels, which allows operation at low $V_{\mathrm {DD}}$ . In this paper, a nonlocal band-to-band tunneling model has been successfully implemented into a multisubband ensemble Monte Carlo (MS-EMC) simulator and applied to ultrascaled silicon-based n-type TFETs. We have considered two different criteria for the choice of the tunneling path followed by the carriers when crossing the potential barrier, which leads to different distributions of the generated electron–hole pairs. Subband discretization due to field–induced quantum confinement has been considered. TCAD simulations accounting for quantization effects are considered for comparison purposes providing a very accurate agreement with MS-EMC results.

MONTE-CARLO SIMULATION OF ULTRA-THIN FILM SILICON-ON-INSULATOR MOSFETs

State-of-the-Art devices are approaching to the performance limit of traditional MOSFET as the critical dimensions are shrunk. Ultrathin fully depleted Silicon-on-Insulator transistors and multi-gate devices based on SOI technology are the best candidates to become a standard solution to overcome the problems arising from such aggressive scaling. Moreover, the flexibility of SOI wafers and processes allows the use of different channel materials, substrate orientations and layer thicknesses to enhance the performance of CMOS circuits. From the point of view of simulation, these devices pose a significant challenge. Simulations tools have to include quantum effects in the whole structure to correctly describe the behavior of these devices. The Multi-Subband Monte Carlo (MSB-MC) approach constitutes today's most accurate method for the study of nanodevices with important applications to SOI devices. After reviewing the main basis of MSB-MC method, we have applied it to answer important questions which remain open regarding ultimate SOI devices. In the first part of the chapter we present a thorough study of the impact of different Buried OXide (BOX) configurations on the scaling of extremely thin fully depleted SOI devices using a Multi-Subband Ensemble Monte Carlo simulator (MS-EMC). Standard thick BOX, ultra thin BOX (UTBOX) and UTBOX with ground plane (UTBOX+GP) solutions have been considered in order to check their influence on short channel effects (SCEs). The simulations show that the main limiting factor for downscaling is the DIBL and the UTBOX+GP configuration is the only valid one to downscale SGSOI transistors beyond 20 nm channel length keeping the silicon slab thickness above the theoretical limit of 5 nm, where thickness variability and mobility reduction would play an important role. In the second part, we have used the multisubband Ensemble Monte Carlo simulator to study the electron transport in ultrashort DGSOI devices with different confinement and transport directions. Our simulation results show that transport effective mass, and subband redistribution are the main factors that affect drift and scattering processes and, therefore, the general performance of DGSOI devices when orientation is changed

Reaching sub-32 nm nodes: ET-FDSOI and BOX optimization

This work presents a thorough study of the impact of different Buried OXide (BOX) configurations on the scaling of extremely thin SOI devices (ET-FDSOI, also known as UTSOI) to sub-32nm nodes using a Multi-Subband Ensemble Monte Carlo simulator (MS-EMC). Standard thick BOX, ultra thin BOX (UTBOX) and UTBOX with ground plane (UTBOX+GP) solutions have been considered in order to check their influence on Short Channel Effects (SCEs). Simulations show that for channel lengths shorter than 20nm, silicon thickness thinner than 5nm are needed to control Drain Induced Barrier Lowering (DIBL) below 100mV/V. However, thickness variability and mobility reduction could play an important role for so small thickness. Nevertheless, we show that with the appropriate combination of UTBOX and GP it is possible to use thicker Si layers, even for channels shorter than 20nm, and keeping SCEs under control, i.e., DIBL below 100mV/V.

Multi-Subband Monte Carlo study of device orientation effects in ultra-short channel DGSOI

State-of-the-Art devices in mass production are approaching to the performance limit of traditional MOSFET as the critical dimensions are shrunk. Multi-gate devices based on SOI technology, are one of the best candidates to become a standard solution to overcome the problems arising from such aggressive scaling. Moreover, the flexibility of SOI wafers and processes allows the use of different channel materials and substrate orientations to enhance the performance of CMOS circuits. This paper studies the electron transport in DGSOI devices with aggressive scaling and the role of different confinement and transport directions in the characteristics of next generation devices using a Multi-Subband Ensemble Monte Carlo simulator (MSB-EMC). Our simulations show that transport effective mass, and subband redistribution are the main factors that affect drift and scattering processes and, therefore, the general performance of DGSOI devices when orientation is changed.