Morphology Of Pentacene Films Research Articles

Prepare with care: Low contact resistance of pentacene Field-Effect transistors with clean and oxidized gold electrodes

In recent years, a number of researchers have voiced concerns regarding the increasing amount of publications which report record performance characteristics of organic field-effect transistors (OFETs). These devices often make use of elaborate architectures, ranging from surface treatment by self-assembled monolayers to contact-limited doping, injection layer introduction etc. While these techniques are claimed to improve the device performance, they often result in poorly defined device interfaces, such as that of the organic semiconductor with the dielectric and electrode surfaces, which render a rigorous theoretical description of the interface effects close to impossible. Furthermore, the effects of ambient exposure of prepared devices are often neglected during the analysis. In this work we introduce a completely high vacuum-based manufacturing and electrical characterization of OFETs using commercially available gold bottom-contact bottom-gate FET structures, which enables a rigorous exclusion of any air contact of the devices. Using the example of the prototypical and widely studied organic semiconductor pentacene, we compare various initial cleaning procedures of the FET-structures prior to the vacuum deposition of pentacene films on the device characteristics and complement the electrical in situ analysis by ex situ AFM measurements of the pentacene film morphology. We demonstrate that O 2 plasma cleaning with subsequent thermal annealing under vacuum conditions results in well-defined interfaces of the pentacene film with clean surface of gold electrodes, which exhibit a remarkably low width-normalized contact resistance of 1.19 kΩcm. Additionally, we show that the formation of gold oxide on top of the electrodes as a result of O 2 plasma cleaning without subsequent heating is beneficial for the charge carrier injection, resulting in a contact resistance of only 0.16 kΩcm – to the best of our knowledge, one of the lowest yet reported values for pentacene-gold systems. In addition, the comparative rigorous vacuum-based processing and analysis allows in particular to study also the effects of controlled exposure to ambient air – even for a short time – as well as aging under different storage conditions on the device performance. • Full HV OFET fabrication and characterization process chain is introduced. • HV process chain allows rigorous characterization of the charge carrier injection. • Reference for a PEN OFET with clean Au electrodes is demonstrated. • Gold oxide improves the charge carrier injection in PEN OFETs. • Ambient exposure and HV storage of OFETs affects the device characteristics.

Mobility enhancement of organic field-effect transistor based on guanine trap-neutralizing layer

We introduced a nucleic acid component guanine as a trap-neutralizing layer between silicon dioxide gate dielectric and a pentacene semiconducting layer to obtain increased field-effect mobility in organic field-effect transistors (OFETs). A tripling of the field-effect mobility, from 0.13 to 0.42 cm2/V s, was achieved by introducing a 2 nm guanine layer. By characterizing the surface morphology of pentacene films grown on guanine, we found that the effect of guanine layer on the topography of pentacene film was not responsible for the mobility enhancement of the OFETs. The increased field-effect mobility was mainly attributed to the hydrogen bonding capacity of otherwise unassociated guanine molecules, which enabled them to neutralize trapping sites on the silicon dioxide surface.

High-mobility and low-operating voltage organic thin film transistor with epoxy based siloxane binder as the gate dielectric

This paper reports the fabrication of pentacene-based organic thin-film transistors using a dielectric material, Dynasylan ®SIVO110. The devices exhibit excellent performance characterized by a low threshold voltage of −1.4 V (operating voltage: 0 to −4 V) together with a mobility of 1.9 cm2 V−1s−1. These results are promising because it uses only a single layer of dielectric without performing any intermediate treatment. The reason is attributed to the high charge storage capacity of the dielectric (κ ∼ 20.02), a low interfacial trap density (2.56 × 1011cm−2), and favorable pentacene film morphology consisting of large and interconnected grains having an average size of 234 nm.

Performance improvement of a pentacene organic field-effect transistor through a DNA interlayer

Organic field-effect transistors (OFETs) with a top-contact structure were fabricated by applying deoxyribonucleic acid (DNA) as a hole injection layer using a simple spray-coating process. Compared with that of the bare OFET, the OFETs incorporated with a DNA hole injection layer exhibited a remarkable enhancement of field-effect mobility from 0.02 to 0.104 cm2 V−1 s−1. By analysing the electrical characteristics of OFETs and the surface morphology of pentacene film, the results showed that the dipole formation effect of the DNA interlayer effectively reduced the contact resistance between gold electrodes and pentacene. Consequently, improved hole injection was obtained along with enhanced electrical characteristics. This effect was also observed in OFETs based on an α-hexathiophene organic semiconductor and OFETs based on silver electrodes. In addition, a guanine base-pair, a major constituent of DNA, was selected to be further analysed and confirmed the existence of the dipole formation effect.

Charge transport and morphology of pentacene films confined in nano-patterned region

The transport and morphology of macroscopic organic transistors have been thoroughly explained. However, the relationship between charge transport and the morphology of organic semiconductors in nano-confined regions is not well understood, which is required to design high-performance nano-electronics. Therefore, in this study, the electrical performance of pentacene thin-film transistors (TFTs) fabricated on nano-scale confined geometries was compared with that of other TFT systems fabricated on micro-scale confined or flat dielectrics. The results showed that the photoresist (PR) reliefs patterned onto silicon dioxide (SiO2) dielectrics could control the growth mode of pentacene in the confined regions. As the line spacing between the PR patterns decreased to below the average size of pentacene normally grown on SiO2 dielectrics (∼1.7 μm), field-effect mobility (μFET) of pentacene TFTs improved considerably. Specifically, the μFET values for the 250 nm patterned dielectric system were as high as 0.33 cm2 V−1 s−1, which was greater than those of the wider-patterned PR or flat dielectric systems (⩽ 0.15 cm2 V−1 s−1). These findings were related to the enhancement of charge-carrier transport owing to the anisotropic π-conjugated crystals nucleated from the nano-confined edges, providing important information that can be used in the design of high-performance nano-scale organic electronics. We have analyzed the effect of the morphology of the pentacene films confined in the micro- and nano-scale relief patterns on the charge transport. As the patterned space region for confining the growth of organic semiconductors decreased to below the average grain size (∼ 1.7 μm), the field-effect mobility increased. Because the molecular ordering is influenced by the pattern’s confining effect on pentacene film growth. Our results will provide an approach that can be used to further increase the charge transport mobility of polycrystalline organic semiconductors by increasing the molecular ordering in the direction of charge transport. While the effect of morphology on an organic semiconductor's charge transport is generally well understood, less is known about the effect when the material is confined, despite this being a highly relevant situation for nanoelectronic devices. A South Korea-based research team led by Tae-Woo Lee has now determined how the performance of a thin-film transistor is affected when its pentacene semiconductor is confined in a nanoscale pattern rather than a microscale pattern or a flat dielectric system. The researchers observed higher field-effect mobility in the nanopattern-based device compared to the other configurations. The enhancement arises as a result of the nanopattern's effect on the arrangement of the pentacene molecules in the thin film — favouring their ordering in the direction of the charge transport, which in turn improves the device's performance. This understanding of the effect of confinement on charge mobility may contribute to the engineering of more efficient organic semiconductors.

Self-Assembly of Mono- And Bidentate Oligoarylene Thiols onto Polycrystalline Au

Four thiolated oligoarylene molecules (i) 4-methoxy-terphenyl-4″-methanethiol (MTM), (ii) 4-methoxy-terphenyl-3″,5″-dimethanethiol (MTD), (iii) 4-nitro-terphenyl-4″-methanethiol (NTM), and (iv) 4-nitro-terphenyl-3″,5″-dimethanethiol (NTD) were synthesized and self-assembled as monolayers (SAMs) on polycrystalline Au electrodes of organic field-effect transistors (OFETs). SAMs were characterized by contact angle and AC/DC electrochemical measurements, whereas atomic force microscopy was used for imaging the pentacene films grown on the coated electrodes. The electrical properties of functionalized OFETs, the electrochemical SAMs features and the morphology of pentacene films were correlated to the molecular organization of the thiolated oligoarylenes on Au, as calculated by means of the density functional theory. This multi-methodological approach allows us to associate the systematic replacement of the SAM anchoring head group (viz. methanethiol and dimethanethiol) and/or terminal tail group (viz. nitro-, -NO2, and methoxy, -OCH3) with the change of the electrical features. The dimethanethiol head group endows SAMs with higher resistive features along with higher surface tensions compared with methanethiol. Furthermore, the different number of thiolated heads affects the kinetics of Au passivation as well as the pentacene morphology. On the other hand, the nitro group confers further distinctive properties, such as the positive shift of both threshold and critical voltages of OFETs with respect to the methoxy one. The latter experimental evidence arise from its electron-withdrawing capability, which has been verified by both DFT calculations and DC electrochemical measurements.

Processing and performance of organic insulators as a gate layer in organic thin film transistors fabricated on polyethylene terephthalate substrate

Fabrication of organic thin film transistor (OTFT) on flexible substrates is a challenge, because of its low softening temperature, high roughness and flexible nature. Although several organic dielectrics have been used as gate insulator, it is difficult to choose one in absence of a comparative study covering processing of dielectric layer on polyethylene terephthalate (PET), characterization of dielectric property, pentacene film morphology and OTFT characterization. Here, we present the processing and performance of three organic dielectrics, poly(4-vinylphenol) (PVPh), polyvinyl alcohol (PVA) and poly(methyl methacrylate) (PMMA), as a gate layer in pentacene-based organic thin film transistor on PET substrate. We have used thermogravimetric analysis of organic dielectric solution to determine annealing temperature for spin-coated films of these dielectrics. Comparison of the leakage currents for the three dielectrics shows PVA exhibiting lowest leakage (in the voltage range of −30 to +30 V). This is partly because solvent is completely eliminated in the case of PVA as observed by differential thermogravimetric analysis (DTGA). We propose that DTGA can be a useful tool to optimize processing of dielectric layers. From organic thin film transistor point of view, crystal structure, morphology and surface roughness of pentacene film on all the dielectric layers were studied using X-ray diffraction (XRD), atomic force microscopy (AFM) and scanning electron microscopy (SEM). We observe pyramidal pentacene on PVPh whereas commonly observed dendritic pentacene on PMMA and PVA surface. Pentacene morphology development is discussed in terms of surface roughness, surface energy and molecular nature of the dielectric layer.

Pentacene growth on 3-aminopropyltrimethoxysilane modified silicon dioxide

The 3-aminopropyltrimethoxysilane (APTMS) self-assembled monolayer (SAM) has been used as a buffer layer between a dielectric (native SiO2) and the pentacene (Pn) thin film. Based on in situ low-energy electron microscope (LEEM) and ex-situ noncontact atomic force microscope (nc-AFM) measurements, it is shown that passivation of SiO2 with APTMS significantly improves the morphology of pentacene films. The observed lower nucleation density of Pn islands on the APTMS-treated surface results in improved crystallinity of the Pn layer. Moreover, the de-wetting of Pn monolayer is prevented by the interfacial APTMS SAM. This has significant potential for the improvement of the FET carrier mobility in Pn-based electronic devices.

Absence of template induced ordering in organic multilayers: The growth of pentacene on a Cu(221) vicinal surface

The structure and morphology of pentacene films grown on a Cu(221) vicinal surface have been studied by means of scanning tunneling microscopy (STM), low energy electron diffraction (LEED) and atomic force microscopy (AFM). Well ordered saturated monolayer films were prepared by first depositing few nanometers pentacene at room temperature followed by brief heating above 400 K in order to sublimate the multilayer excess. The chemisorbed monolayer adopts a (1 × 7) superstructure with a uniform alignment of the molecules along the step edges while upon further deposition this template induced ordering is not transferred to multilayer films. Instead the molecules continue to grow in an upright orientation and form pyramidal islands without any substrate related azimuthal orientation.

DNA detection using organic thin film transistors: Optimization of DNA immobilization and sensor sensitivity

Advancements in research and technology are happening now more than ever in the biotechnology industry. Better detection and treatment methods, specifically targeted towards personalized systems, are constantly being sought by researchers. Collaboration among different fields of science and technology has brought us one step closer towards achieving this goal. Recently, the use of pentacene thin film transistors as DNA hybridization detection systems has been demonstrated, leading to the possibility of their use in the implementation of electrically read low-cost DNA microarrays. Physical adsorptive immobilization, the mechanism through which DNA immobilizes on pentacene, highlights the importance of the topology of the pentacene film surface for immobilization of DNA and the sensitivity of the sensor. DNA is known to segregate to topological features on pentacene surface. We are able to exploit the control of pentacene evaporation conditions to tune pentacene film morphology to maximize sensitivity. In this paper, we demonstrate and analyze DNA detection using optimized films.

Charge trapping induced current instability in pentacene thin film transistors: Trapping barrier and effect of surface treatment

The current instability of pentacene thin film transistors is described by the energetic distribution of the barrier height for the trapping of mobile charges at the organic/insulator interface. The trapping energy was quantitatively analyzed by measuring the temperature dependence of current decay, which follows a stretched exponential function. The distribution of the barrier becomes higher and narrower by the use of a self assembled monolayer (SAM) on the insulator surface, whereas the pentacene film morphology has little influence on the trapping barriers. The increase in the barrier height in the SAM-treated device suppresses charge trapping, resulting in stable device operation.

Impact of semiconductor/contact metal thickness ratio on organic thin-film transistor performance

Pentacene-based organic thin-film transistors have been fabricated using photolithography and the bottom contact structure using parylene as the gate dielectric. Device performance was optimized by varying the thickness ratio of pentacene to Au contacts. Contact resistance dependence on the pentacene/Au thickness ratio (r=tpen∕tAu) was extracted using the transfer-length method [D. K. Schroder, Semiconductor Material and Device Characterization (Wiley, New York, 2006), pp. 184–199; Necliudov et al., Solid-State Electron. 47, 259 (2003)]. In this paper, we show that the effect of parasitic resistance and pentacene film morphology on device performance can be decoupled. Film morphology and microstructure are reported as a function of pentacene thickness and the correlation with transistor field-effect mobility is discussed.

On the correlation of postannealing induced phase transition in pentacene with carrier transport

Postannealing effects on pentacene thin film transistors (TFTs) are discussed correlating the pentacene film morphology, the crystalline polymorph, and the electronic transport. The bulk phase thermally induced in pentacene during postannealing treatment is found to be another main cause detrimental to the carrier transport of TFTs. In addition, it turns out that encapsulation of the TFTs using polyvinyl alcohol helps to improve the thermal stability by retarding the onset of the bulk phase in pentacene.

Disorder-mediated ordering by self-interfactant effect in organic thin film growth of pentacene on silicon

We have studied the morphology of pentacene films on different silicon surfaces with orientations between Si(111) and Si(001). Pentacene molecules are immobile on the Si surface, covering and passivating reactive defect sites. Molecules deposited on top of a closed amorphous wetting layer exhibit isotropic diffusion with diffusion lengths of several tens of micrometers. Neither steps, nor the surface structure affect the film morphology. The wetting layer thus acts as an interfactant, and isolates the molecular film from the substrate, explaining the high quality of pentacene films.

Oxygen plasma treatment and postaging of pentacene field-effect transistors for improved mobility

The authors fabricated pentacene transistors with high mobilities by controlling the morphology of pentacene film through adjustments to the surface energy of the gate dielectrics with oxygen plasma treatment, and then by improving the interfacial properties through postaging. The increased surface energy of poly(methylmethacrylate) dielectric that results from the oxygen plasma treatment improves the interconnections between grains and enlarges the grain size. The postaging of transistors is presumed to rearrange the interface functional groups and as a result decrease the polar functionality without changing pentacene film morphology, which reduces the number of trap states and increases the mobility to 0.73cm2∕Vs.

The Improvement of Electrical Characteristic of Solution Processed Triisopropylsilyl Pentacene Organic Thin-Film Transistors Employing Hexamethyldisilazane Treatment

The field-effect mobility of triisopropylsilyl (TIPS) pentacene organic thin-film transistors (OTFTs) is increased considerably by employing hexamethyldisilazane (HMDS) treatment on poly-4-vinylphenol (PVP) gate insulator. A simple spin coating of HMDS on PVP gate insulator of OTFTs suppressed the void formation significantly and improved structural morphology of pentacene film. The field-effect mobility of OTFT where the TIPS pentacene was spin coated was increased from 0.01 cm2V-1s-1 to 0.1 cm2V-1s-1 after HMDS treatment. The threshold voltage was decreased from -2.8V to -2.0V. We have also fabricated ink-jet printed OTFTs and investigated the effect of HMDS treatment on ink-jet printed OTFTs. The field- effect mobility of OTFT was not increased significantly by HMDS treatment while the threshold voltage of the device was reduced considerably. The threshold voltage of untreated OTFT was +11.1V while that of HMDS treated OTFT was -3.0V. Our experiment results suggest that the HMDS treatment improved the characteristics of OTFTs.

Morphology of pentacene films deposited on Cu(119) vicinal surface

Abstract We investigate the morphology of a pentacene (C 22 H 14 ) film adsorbed on the Cu(1 1 9) vicinal surface by scanning tunnelling microscopy (STM). Thermal treatment of a thick film of molecules generates a long-range ordered structure. Series of molecular rows are alternated with areas where the molecules assume two equivalent orientations. STM data analysis suggests that the ordered structure can be described by a rippled morphology. The behaviour of the film at different annealing temperatures suggests a possible explanation of the film structure as due to an adsorbate-induced modification of the substrate.

The Effect of Gate‐Dielectric Surface Energy on Pentacene Morphology and Organic Field‐Effect Transistor Characteristics

AbstractThe effects of the surface energy of polymer gate dielectrics on pentacene morphology and the electrical properties of pentacene field‐effect transistors (FETs) are reported, using surface‐energy‐controllable poly(imide‐siloxane)s as gate‐dielectric layers. The surface energy of gate dielectrics strongly influences the pentacene film morphology and growth mode, producing Stranski–Krastanov growth with large and dendritic grains at high surface energy and three‐dimensional island growth with small grains at low surface energy. In spite of the small grain size (≈ 300 nm) and decreased ordering of pentacene molecules vertical to the gate dielectric with low surface energy, the mobility of FETs with a low‐surface‐energy gate dielectric is larger by a factor of about five, compared to their high‐surface‐energy counterparts. In pentacene growth on the low‐surface‐energy gate dielectric, interconnection between grains is observed and gradual lateral growth of grains causes the vacant space between grains to be filled. Hence, the higher mobility of the FETs with low‐surface‐energy gate dielectrics can be achieved by interconnection and tight packing between pentacene grains. On the other hand, the high‐surface‐energy dielectric forms the first pentacene layer with some voids and then successive, incomplete layers over the first, which can limit the transport of charge carriers and cause lower carrier mobility, in spite of the formation of large grains (≈ 1.3 μm) in a thicker pentacene film.

Pentacene Thin Film Growth

Pentacene stands out as a model molecule among organic semiconductors due to its ability to form well-ordered films that show a high field effect mobility. We discuss the processes involved in pentacene film growth, emphasizing differences with respect to inorganic films. The influence of growth parameters such as the substrate nature and temperature, the deposition rate, and the kinetic energy of the molecular beam on the structure and morphology of pentacene films are discussed. Finally, we overview recent attempts to model pentacene film nucleation and growth, and draw attention to the role of dislocations.

Growth and Morphology of Pentacene Films on Oxide Surfaces

ABSTRACTPentacene thin films were grown in ultra high vacuum on amorphous SiO2 and on a high dielectric constant material, crystalline BaTiO3. During pentacene deposition, substrates were held at three different temperatures (-650, 250 and 750 C). In general, three different morphologies were identified: a first closed interfacial layer, a thin film mode composed of faceted grains with single molecule step height, and a volume mode with features substantially higher than those of the thin film mode. Analysis was carried out by atomic force microscopy and in some cases by synchrotron X-ray diffraction.