Modular Tree Research Articles

Modular Tree Network for Source Code Representation Learning

Learning representation for source code is a foundation of many program analysis tasks. In recent years, neural networks have already shown success in this area, but most existing models did not make full use of the unique structural information of programs. Although abstract syntax tree (AST)-based neural models can handle the tree structure in the source code, they cannot capture the richness of different types of substructure in programs. In this article, we propose a modular tree network that dynamically composes different neural network units into tree structures based on the input AST. Different from previous tree-structural neural network models, a modular tree network can capture the semantic differences between types of AST substructures. We evaluate our model on two tasks: program classification and code clone detection. Our model achieves the best performance compared with state-of-the-art approaches in both tasks, showing the advantage of leveraging more elaborate structure information of the source code.

A new matrix representation of multidigraphs

In this article, we introduce a new matrix associated with a multidigraph, named as the complex adjacency matrix. We study the spectral properties of bipartite multidigraphs corresponding to the complex adjacency matrix. It is well known that a simple undirected graph is bipartite if and only if the spectrum of its adjacency matrix is symmetric about the origin (with multiplicity). We show that the result is not true in general for multidigraphs and supply a class of non-bipartite multidigraphs which have this property. We describe the complete spectrum of a multi-directed tree in terms of the spectrum of the corresponding modular tree. As a consequence, we get a class of Hermitian matrices for which the spectrum of a matrix in the class and the spectrum of the modulus (entrywise) of the matrix are the same.

On Building Modular Trees in the Plane

On Building Modular Trees in the Plane

Modular Leech Trees of Order at Most 8

In 1975, John Leech asked when can the edges of a tree on n vertices be labeled with positive integers such that the sums along the paths are exactly the integers 1, 2, …, n2. He found five such trees, and no additional trees have been discovered since. In 2011 Leach and Walsh introduced the idea of labeling trees with elements of the group Zk where k=n2+1 and examined the cases for n≤6. In this paper we show that no modular Leech trees of order 7 exist, and we find all modular Leech trees of order 8.

Dynamics of storm-driven suspended sediments in a headwater catchment described by multivariable modeling

Previous research has shown that the rate at which suspended sediment is transported in watercourses depends primarily on discharge (Q) as the first-order control, but additional factors are thought to affect suspended sediment concentrations (SSC) as well. Among these, antecedent hydrological and meteorological conditions (e.g., rainfall depth and intensity, discharge prior to a runoff event and the duration of runoff events) may represent significant transport controlling mechanisms. Univariate models using Q–SSC rating curves often produce large scatter and nonlinearity, because many of the hydrological and biotic processes affecting the dynamics of sediment are non-linear and exhibit threshold behavior. The simulation of such highly non-linear processes is therefore an elusive task requiring consideration of several interrelated controlling variables. The aim of this study was to identify the major hydrological and meteorological controls determining the dynamics of SSC during storm-runoff events and the magnitude of SSC in a headwater catchment in Luxembourg. A parsimonious data-driven model (M5′ modular trees) was used to simulate SSC in response to the identified controlling variables. Antecedent hydro-meteorological variables (e.g., antecedent precipitation depths, antecedent precipitation indices, and a suit of hydrological data) were used as input variables. Twenty-four-hour antecedent runoff volumes were determined as the major control explaining sediment depletion effects during high-flow periods, and a gradual decline of SSC as a runoff event progresses. The modeling results obtained by M5′ trees were then compared to conventional power-law rating curves. The M5′ model outperformed the rating-curve by being successful in describing the shape and magnitude of the analyzed sedigraphs. Therefore, we propose that incorporating antecedent hydro-meteorological data into SSC prediction models may strongly enhance the accuracy of export coefficients. Two splitting criteria identified by the M5′ model tree (Q and antecedent runoff volume) were found and are discussed as possible thresholds responsible for the greatest nonlinearity in the Q–SSC relationship. Our study highlights the dominant antecedent hydro-meteorological conditions acting as the major controls on the magnitude of SSC during episodic events in the headwater Huewelerbach catchment in Luxembourg. For future application, it would be interesting to extend and test the data-mining approach presented in this paper to other catchments, where other controls on sediment transport may be identified.

Application of the functional-structural tree model LIGNUM to growth simulation of short-rotation eastern cottonwood

The functional-structural tree growth model LIGNUM was developed as a general research tool that can be applied to several tree species. The growth simulation of short-rotation eastern cottonwood (Populus deltoides Bartr. ex Marsh.) inherits the basic LIGNUM modeling concepts including modular tree structure, L-system-based description of structural development, and carbon budget. New developments of LIGNUM model in this study were the incorporation of a biochemically-derived photosynthesis submodel; nested time steps for simulating physiological processes, structural development, and annual biomass production; incorporation of field-measured weather data for modeling the response of physiological processes to environmental variation; and application of a Monte-Carlo voxel space submodel for simulating the stochasticity of tree growth and improving computational efficiency. A specific parameter system was applied for modeling P. deltoides growth in the central Missouri, USA, environment. This adaptation of LIGNUM was applied on modeling growth of P. deltoides in a short-rotation agroforestry practice. The simulated height and biomass growth were close to field observations. Visualization of simulation results closely resembled the trees growing in an open site. The simulated response of tree growth to variations in photon flux input was reasonable. The LIGNUM model may be used as a complement to field studies on P. deltoides in short-rotation forestry and agroforestry.

A Hybrid Decision Tree Model for Fast Voltage Contingency Screening and Ranking

This paper presents a new decision tree (DT) based approach for fast voltage contingency screening and ranking for on-line applications in energy management systems. The hybrid decision tree model is developed to learn all the selected contingencies simultaneously, therefore fewer DTs are required. To reduce the size and improve the accuracy of the decision tree, the K-class problem is converted into the set of K two-class problems, and separate decision tree modules are trained for each of the two class problems. All the selected contingencies are presented to the filter module, which is trained to separate them in critical and non-critical contingency classes, which reduces the burden on ranking modular DT. The critical contingencies screened out by the filter module are presented to the ranking modular decision tree for their further ranking. To measure the severity of contingencies, bus voltage violation based scalar performance index is used. Full AC load flow is performed to generate the training and testing patterns for the proposed hybrid decision tree, under each contingency. The effectiveness of the proposed approach is tested on IEEE test systems. Once trained, a hybrid decision tree method gives fast and accurate screening and ranking of contingencies for unknown load patterns.

On transitive orientations with restricted covering graphs

We consider the problem of finding a transitive orientation of a comparability graph, such that the edge set of its covering graph contains a given subset of edges. We propose a solution which employs the classical technique of modular tree decomposition. The method leads to a polynomial time algorithm to construct such an orientation or report that it does not exist.

Quantitative evaluation and regionalization of tourism resources in Guangxi

Since the 1970s foreign and Chinese scholars have researched into quantitative evaluation of tourism resources by mathematical method early or late and made great progress. Guangxi is in the south of China and rich in tourism resources with picturesque scenery. In this paper, Guangxi’s tourism resources are quantitatively evaluated by method of analytic hierarchy process. Firstly a modular tree of quantitative evaluation for tourism resources of Guangxi is set up and weighted values of evaluative factors are defined by method of consulting experts. On the basis of a great amount of data from investigation, synthetic evaluation indexes and their order of tourism resources of 22 cities and counties in Guangxi are calculated. Then, the tourism resources of Grangxi are divided into 6 regions and their development orientations are described by a combination of quantitative analysis and qualitative analysis. The study would be helpful to the exploitation of tourism resource of Guangxi.

Reed-Muller variable-entered vectors and maps

The technique of variable-entered maps is adapted to operate in the Reed-Muller regime where a range of different polarity maps is available. The related concept of the variable-entered vector is considered and shown to lead to reduced computational and storage costs when performing the many matrix transforms encountered in this area. This is of particular significance in the search for the optimum fixed or mixed polarity based on the successive generation of each form. The variable-entered versions of the extended truth vector also reduce the cost of deducing the minimum weight expansion using either a ternary map structure or in-place procedures on the vector itself. It is also demonstrated that variable-entered maps or vectors are useful when contemplating a synthesis by means of a modular circuit tree or when some form of simplification of exclusive-OR sums-of-products expressions is contemplated.

Reliability, reconfiguration, and spare allocation issues in binary-tree architectures based on multiple-level redundancy

The locally redundant modular tree (LRMT) schemes offer high yield and reliability for trees of relatively few levels but are less effective for large binary trees due to the imbalance of reliability of different levels. A new multiple-level redundancy tree (MLRT) architecture that combines modular schemes with level-oriented schemes which lead to better yield and reliability is presented. The MLRT structure enhances the wafer yield to significant levels by offering separate layers of protection for random and clustered defects. Unlike most existing techniques, this technique performs a more accurate reliability analysis by taking into account both switch and link failures. A measure called the marginal switch to processing element area ratio (MSR) is introduced to precisely characterize the effect of switch complexity on the reliability of the redundant system. A systematic method for the optimal distribution of spare modules of the MLRT structure is also presented. The analyses show that the MLRT structure offers higher yield and system reliability than LRMT and subtree-oriented fault-tolerance (SOFT) structures do.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

An easily-diagnosable fault-tolerant binary tree architecture

Tree structure has been widely used in the design of distributed systems. In this paper, we present a new fault-tolerant modular architecture for binary trees. The number of nodes in each module can be adjusted to compromise between area overhead and reliability (or yield). Since each module is constructed by clustering nodes at the same level, it can be used for non-homogeneous trees where each level of the tree is made up of homogeneous nodes. The structure can be layed out using H-tree method. A fault diagnosis algorithm utilizing the topological property of the modular tree architecture is also proposed. The structure is inherently useful in implementing a concurrent fault detection/location scheme. A dictionary machine is used to illustrate the fault location scheme.

Reconfigurable ring connected modular tree architecture

A new fault-tolerant architecture (for distributed computation/telecommunications systems), the ring connected modular tree (RCMT), is proposed for binary tree architectures. The RCMT is based on the modular tree design but adds idle spare supplied links (ISSLs). Using these links, an idle spare node of a module can be supplied to the right-hand neighbouring module. This results in a more flexible ‘spare sharing’ approach and a module containing only a single spare can tolerate up to two faults if an idle spare is available to it from the left-hand neighbouring module. By comparison with previously proposed fault-tolerant tree architectures, RCMT achieves the same reliability level as a global approach, for example the SOFT tree approach, but still preserves the same constant re-configuration time as the modular approach. A modular diagnosis algorithm is given to diagnose the actions of all system nodes in a constant execution time.

Functional description of the contextual analysis in block-structured programming languages: a case study of tree transducers

This paper provides a functional way of describing the analysis of contextual constraints in block-structured, imperative programming languages. As auxiliary formal framework for the intended description, the general concept of many-sorted tree transducer is defined; such transducers are special left-linear, confluent, and noetherian term-rewriting systems in which both sides of the rewrite rules are applicative terms. Then, the contextual analysis is described by five different instances of the auxiliary framework where these instances are known from the literature, viz., top-down tree transducers, macro tree transducers, modular tree transducers, high-level tree transducers, and high-level modular tree transducers. Hence, this paper provides a nontrivial example for each of the mentioned families of tree transducers and it shows how features involved in these tree transducers can be exploited.

A modular fault-tolerant binary tree architecture with short links

The authors present a novel modular fault-tolerant binary tree architecture which is shown to be more effective in overcoming both operational faults and fabrication defects than earlier approaches. Furthermore, for practical size trees of up to eight levels, it is shown how the proposed design can be efficiently load out in VLSI with very short interconnections. Thus, the design is suitable for monolithic implementation of a large binary tree architectures. For board level multichip designs, a hybrid scheme, combining the new design with the SOFT approach, is presented. It shows better reliability than either design alone. >

Families of Reed-Muller canonical forms

The existence of a large number of Reed-Muller canonical forms for switching functions is demonstrated and it is shown that these can be arranged in a nested hierarchy of families with increasing size and decreasing general structure. Many of these forms can be derived, and their weights evaluated for particular functions, by employing recursively defined incidence matrices operating on an extended form of truth vector. The more useful forms are also characterized by their being realizable using a modular circuit tree involving combinations of 1-variable sub-modules.

Modular tree transducers

A new tree transducer, called a modular tree transducer, is introduced. This device specifies operations on trees and can be considered as a formalization of the concept of nested simultaneous primitive recursion on trees. Roughly speaking, a modular tree transducer is a special left-linear and non-overlapping term rewriting system of which the set of rules is partitioned into modules, each module being equipped with a non-negative integer: the number of the module. Then, a module with number i may call modules with numbers not less than i. Three properties are proved: (1) modular tree transducers compute exactly the (inductively defined) class of primitive recursive functions on trees; (2) the number of modules in modular tree transducers induces a strict hierarchy on the class of all modular tree transductions; and (3) by appropriately restricting the calling structure between modules, modular tree transducers characterize the compositions of macro tree transducers where the number of modules and the number of compositions coincide.

Modular fault tolerant VLSI parallel processor architectures with dynamic redundancy

In this paper a new Modular fault tolerant tree architecture for a VLSI Parallel processor is proposed. Modular fault tolerant Parallel processor architecture reliability analysis is presented. The proposed architecture significantly increases reliability and yield of the chip. Yield formulae are derived from the fundamentals of combinatorial and binomial methods for the Modular tree, RAE and SOFT tree architectures. Numerical results show that both the combinatorial and binomial analysis results are in good agreement. Furthermore, the derived yield formulae are used to get first hand information about a specific VLSI architecture, which is sultable for manufacturing or not. Finally, the figure of merlt shows that Modular fault tolerant Parallel processor architecture is cost effective in terms of the chip yield.

Iterative construction of binary lookahead addition trees

This paper presents a technique for implementing carry lookahead addition by iterative tree circuits of fan-in constrained logic. The approach makes use of a recursive construction, the computation tree, for synthesizing an n-bit lookahead adder. The method is particularly effective for moderate values of n and it is in accord with well-known asymptotic bounds on addition. Extensions to modular tree structures for lookahead adders are discussed.

Synchronous Sequential Machines: A Modular and Testable Design

It will be shown that a single-input n-definite machine realized by a universal modular tree, in which each module consists of AND-EXCLUSIVE-OR-DELAY (AND-EOR-DELAY) as a basic element, can be tested for single stuck-type-faults by tests of length 2n + 3 only. This is a marked improvement over the previous results for trees consisting of AND-OR-DELAYS, which are known to have test lengths of exponential growth.