Minimum Number Of Processors Research Articles

Scheduling Parallel Real-Time Tasks on the Minimum Number of Processors

Recently, several parallel frameworks have emerged to utilize the increasing computational capacity of multiprocessors. Parallel tasks are distinguished from traditional sequential tasks in that the subtasks contained in a single parallel task can simultaneously execute on multiple processors. In this study, we consider the scheduling problem of minimizing the number of processors on which the parallel real-time tasks feasibly run. In particular, we focus on scheduling sporadic parallel real-time tasks, in which precedence constraints between subtasks of each parallel task are expressed using a directed acyclic graph (DAG). To address the problem, we formulate an optimization problem that aims to minimize the maximum processing capacity for executing the given tasks. We then suggest a polynomial solution consisting of three steps: (1) transform each parallel real-time task into a series of multithreaded segments, while respecting the precedence constraints of the DAG; (2) selectively extend the segment lengths; and (3) interpret the problem as a flow network to balance the flows on the terminal edges. We also provide the schedulability bound of the proposed solution: it has a capacity augmentation bound of 2. Our experimental results show that the proposed approach yields higher performance than one developed in a recent study.

Resource Optimization for Real-Time Streaming Applications Using Task Replication

In this paper, we study the problem of exploiting parallelism in a hard real-time streaming application modeled as an acyclic synchronous data flow (SDF) graph and scheduled on a heterogeneous multiprocessor system-on-chip platform to alleviate the capacity fragmentation due to partitioned scheduling algorithms and reduce the number of required processors when a throughput requirement is satisfied. As the main contribution in this paper, we propose a method to determine a replication factor for each task in an acyclic SDF graph such that by distributing the workloads among more parallel tasks with lower utilization in the obtained transformed graph, the left capacity on the processors can be efficiently exploited, hence reducing the number of required processors. The experimental results, on a set of real-life streaming applications, demonstrate that our approach can reduce the minimum number of processors required to schedule an application and considerably improve the memory requirements and application latency compared to related approaches while meeting the same throughput constraint.

Parallel algorithms for modular multi-exponentiation

Modular exponentiation is a time-consuming operation widely used in cryptography. Modular multi-exponentiation, a generalization of modular exponentiation also used in cryptography, deserves further analysis from the algorithmic point of view. The parallelization of modular multi-exponentiation can be obtained by generalizing methods used to parallelize modular exponentiation. In this paper, we present a new parallelization method for the modular multi-exponentiation operation with two optimizations. The first one searches for the fastest solution without taking into account the number of processors. The second one balances the load among the processors and finds the smallest number of processors that achieves the fastest solution. In detail, our algorithms compute the product of i modular exponentiations. They split up each exponent in j blocks and start j threads. Each thread processes together i blocks from different exponents. Thus, each block of an exponent is processed in a different thread, but the blocks of different exponents are processed together in the same thread. Using addition chains, we show the minimum number of threads with load balance and optimal running time. Therefore, the algorithms are optimized to run with the minimum time and the minimum number of processors.

A Parallel Ring Method for Solving a Large-scale Traveling Salesman Problem

A parallel approach for solving a large-scale Traveling Salesman Problem (TSP) is presented. The problem is solved in four stages by using the following sequence of procedures: decomposing the input set of points into two or more clusters, solving the TSP for each of these clusters to generate partial solutions, merging the partial solutions to create a complete initial solution M0, and finally optimizing this solution. Lin-KernighanHelsgaun (LKH) algorithm is used to generate the partial solutions. The main goal of this research is to achieve speedup and good quality solutions by using parallel calculations. A clustering algorithm produces a set of small TSP problems that can be executed in parallel to generate partial solutions. Such solutions are merged to form a solution, M0, by applying the ―Ring‖ method. A few optimization algorithms were proposed to improve the quality of M0 to generate a final solution Mf. The loss of quality of the solution by using the developed approach is negligible when compared to the existing best-known solutions but there is a significant improvement in the runtime with the developed approach. The minimum number of processors that are required to achieve the maximum speedup is equal to the number of clusters that are created.

Estimating the convergence of a simulated annealing algorithm for the problem of constructing multiprocessor schedules

An algorithm for constructing a computational system with the minimum number of processors while observing restrictions on system reliability and program execution time is considered. The problem is formulated mathematically, and an algorithm based on simulated annealing is proposed. Asymptotic convergence of the algorithm is formally proved.

Algorithm for synthesis of real-time systems under reliability constraints

The problem of constructing a real-time computing system that has a minimum number of processors is addressed. It is necessary that the system meets the deadlines of program execution and the system reliability requirements implying that the system must tolerate both hardware and software failures. The formal statement of this problem is presented, a method for its solution using an iterative scheduling algorithm based on the method of simulated annealing is proposed, and an experimental study of the proposed algorithm is conducted.

Co-design of Real-time Embedded Systems under Reliability Constraints

This paper describes a method of designing a computational system with the minimal number of processors. Strict execution deadlines apply, as well as restrictions on the reliability of the system that imply the tolerance of the system to both hardware and software faults. The problem is formulated mathematically, an algorithm of solution based on simulated annealing is described, and experimental results are shown.

A pipelin-based approach for scheling vido processing algorithms on NOW

Network Of Workstations (NOW) platforms put together with off-the-shelf workstations and networking hardware have become a cost effective, scalable, and flexible platform for video processing applications. Still, one has to manually schedule an algorithm to the available processors of the NOW to make efficient use of the resources. However, this approach is time-consuming and impractical for a video processing system that must perform a variety of different algorithms, with new algorithms being constantly developed. Improved support for program development is absolutely necessary before the full benefits of parallel architectures can be realized for video processing applications. Toward this goal, an automatic compile-time scheduler has been developed to schedule input tasks of video processing applications with precedence constraints onto available processors. The scheduler exploits both spatial (parallelism) and temporal (pipelining) concurrency to make the best use of machine resources. Two important scheduling problems are addressed. First, given a task graph and a desired throughput, a schedule is constructed to achieve the desired throughput with the minimum number of processors. Second, given a task graph and a finite set of available resources, a schedule is constructed such that the throughput is maximized while meeting the resource constraints. Results from simulations show that the scheduler and proposed optimization techniques effectively tackle these problems by maximizing processor utilization. A code generator has been developed to generate parallel programs automatically. The tools developed in this paper make it much easier for a programmer to develop video processing applications on these parallel architectures.

Upper bound on the number of processors for scheduling with interprocessor communication delays

The problem of scheduling a task system with communication delays on multiprocessor systems is known to be NP-hard in its general form as well as many restricted cases even on an unlimited number of processors. In this paper, we study the problem of determining an upper bound on the minimum number of processors achieved by a schedule that minimizes the makespan for scheduling problems with communication delays. We prove that the minimum number of partitioning paths of the precedence graph is an upper bound on the minimum number of processors for UET-UCT (Unit Execution Time-Unit Communication Time) task systems. Then we propose an algorithm of O(n) (n designates the number of tasks) to compute an upper bound, which is valid independently of task processing times and communication delays, in the special case when the precedence graph is an out-tree or an in-tree.

On the minimum number of processors for scheduling problems with communicationdelays

Scheduling problems with interprocessor communication delays are recent problemsarising with the development of new message‐passing architectures whose number of processorsis increasing more and more. The scheduling problem with communication delays isNP‐complete even on an unlimited number of processors, and most of the restrictions whichare known to make the problem easy suppose that the number of processors is unlimited.The aim of this paper is to estimate the minimum number of processors required to realizea schedule that minimizes the makespan for problems with communication delays. Contraryto problems without communication costs, we show that the minimum number of partitioningpaths of tasks is not an upper bound. Then we propose two upper bounds b and b whichare valid independent of task processing times and communication costs. We show thatb can be calculated in O(n 2 ) if n designates the number of tasks. Then we give an algorithmfor determining b in the special case when the precedence graph is an in‐tree or anout-tree. A specific study of SCT task systems (Small Communication Time) shows that theachromatic number of the cocomparability graph is an upper bound on the minimum numberof processors.

Optimal Fault-Secure Scheduling

We consider here two basic fault-secure scheduling problems for multiprocessor systems. First, given the number of processors in the system and a set of computational tasks of unit length expressed as a complete binary tree, a scheduling algorithm is proposed such that the total execution time is a minimum and no undetected single error result will be delivered. Second, given a deadline and a computation tree, another algorithm is given which generates a fault-secure scheduling using a minimum number of processors. We show that two previous approaches are special cases of these algorithms. We also discuss the way to modify our scheduling to ensure a given fault latency requirement. Finally, extensions that cover multiple errors, non-unit length tasks and computation graphs of arbitrary binary trees are discussed.

Scheduling Periodic Tasks

We consider the problem of nonpreemptively scheduling periodic tasks on a minimum number of processors, assuming that the tasks have to be executed strictly periodically. We show that the problem is NP-complete in the strong sense, even in the case of a single processor, but that it is solvable in polynomial time if the periods and execution times are divisible. The latter condition generalizes the situation in which all periods and execution times are powers of 2. We also propose an approximation algorithm, which is based on successively assigning tasks to processors according to some priority rule.

Improved Lower Bounds on Time and Processors for Scheduling Precedence Graphs on Multicomputer Systems

This paper improves lower bounds on the minimum number of processors and minimum time to execute a given directed acyclic task graph with communication delays. The given task graph is partitioned into a number of independent task graphs to arrive at sharper bounds. A drawback of the earlier best method is pointed out and corrected. The time taken to calculate the bounds is also less in comparison to the corrected method. These bounds are useful in comparing heuristic algorithms used for scheduling directed acyclic task graphs and as compiler tools in static scheduling-on parallel computers.

Optimal algorithms for parallel Givens factorization on a coarse-grained PRAM

We study the complexity of the parallel Givens factorization of a square matrix of size n on a shared memory architecture composed with p identical processors (coarse grained EREW PRAM). We show how to construct an asymptotically optimal algorithm. We deduce that tje time complexity is equal to: ... (formule)... and that the minimum number of processors in order to compute the Givens factorization in asymptotically optimal time (2n + o(n)) is equal to p opt = n/(2 + √2) + o(n). These results complete previous analysis presented in the case where the number of processors is unlimited

Multiprocessor join scheduling

A practical join processing strategy that allows effective utilization of arbitrary degrees of parallelism in both the I/O subsystem and join processing subsystems is presented. Analytic bounds on the minimum execution time, minimum number of processors, and processor utilization are presented along with bounds on the execution time, given a fixed number of processors. These bounds assume that sufficient buffers are available. An analytic lower bound on buffer requirements as well as a practical heuristic for use in limited buffer environments are also presented. A sampling of corroborative simulation results are included. >

Processor optimization for flow graphs

In the synthesis of hardware, operations of a scheduled flow graph (acyclic, but with branching nodes) are assigned to processors. First we show that the problem of finding an assignment with minimum number of processors is NP-complete and that the problem of finding a maximum compatible set of operations can be solved in polynomial time. Then we show that the generalized processor optimization problem with nonuniversal processors is a generalization of the set-covering problem. At last we give an approximative algorithm for this problem with multiplicative factor O(log(|Op|)).

Calculus of space-optimal mappings of systolic algorithms on processor arrays

The authors present a method for the mapping of systolic algorithms that use the minimal number of processors. This method is based on geometrical interpretations on convex polyhedra in Z/sup n/. The authors present a recurrence equation model defining the target problems for systolic program derivation. Some geometrical tools on convex polyhedra in Z/sup n/ are given. They are first used to model systolic timing allocation in terms of geometrical structures, and then to deduce a processor array mapping method that automatically gives space-optimal mappings. The results are used to derive two space-optimal mappings of the Gaussian elimination algorithm. >

Spacetime-minimal systolic arrays for Gaussian elimination and the Algebraic path problem

In this paper, we derive time-minimal systolic arrays for Gaussian elimination and the Algebraic Path Problem (APP) that use a minimal number of processors. For a problem of size n, we obtain an execution time T( n) = 3 n −1 using A( n) = n 2/4+O( n) processors for Gaussian elimination, and T( n) = 5 n −2 and A( n) = n 3/+O( n) for the APP.

A characterization of t/s-diagnosability and sequential t-diagnosability in designs

A multiprocessing system is t/s-diagnosable if all faulty processors can be identified to within s processors, provided there are no more than t faulty processors. A characterization theorem of S. Karunanithi and A.D. Friedman (1979) for t/s-diagnosability in certain special cases of systems called designs is extended to the entire class of D/sub 1,t'/(n) designs. It is shown that for large t, s is approximately t/sup 2//4t'. Furthermore, the minimum number of processors needed to attain a given diagnosability is derived. A multiprocessor system is sequentially t-diagnosable if at least one faulty processor can be identified provided there are no more than t faulty processors. A theorem by F. Preparata, G. Metze, and R. Chien (1967), giving a sufficient condition for sequential t-diagnosability in the single-loop system (a special case of designs), is extended to the entire class of D/sub 1,t'/(n) designs. It is shown that, for large t, approximately t/sup 2//4t' nodes are needed for a D/sub 1,t'/(n) design to be sequentially t-diagnosable.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Bounds on the Number of Processors and Time for Multiprocessor Optimal Schedules

Two problems of importance for the scheduling of multiprocessing systems composed of identical units are discussed in this paper. 1) Given a partially ordered set of computations represented by the vertices of an acyclic directed graph with their associated execution times, find the minimum number of processors in order to execute them in a time not exceeding the length of the critical path of this graph. 2) Determine the minimum time to process this set of computations when a fixed number of processors is available. A unified formulation for lower bounds on the minimum number of processors and on time is presented. These lower bounds are sharper than previously known values and provide a general framework that gives insight for deriving simplified expressions. A new upper bound on the minimum number of processors is presented, which is sharper than the known bounds. The computational aspects of these bounds are also discussed.