Minimum Number Of Delay Elements Research Articles

CMOS Leakage and Glitch Minimization for Power-Performance Tradeoff

A mixed integer linear programming (MILP) technique simultaneously minimizes the leakage and glitch power consumption of a static CMOS circuit for any specified input to output delay. Using dual-threshold devices the number of high-threshold devices is maximized and a minimum number of delay elements are inserted to reduce the differential path delays below the inertial delays of incident gates. The key features of the method are that the constraint set size for the MILP model is linear in the circuit size and power-performance tradeoff is allowed. Experimental results show 96%, 40%, and 70% reductions of leakage power, dynamic power, and total power, respectively, for the benchmark circuit C7552 implemented in the 70 nm BPTM CMOS technology.

M-channel linear phase perfect reconstruction filter bank with rational coefficients

This paper introduces a general class of M-channel linear phase perfect reconstruction filter banks (FBs) with rational coefficients. A subset of the presented solutions has dyadic coefficients, leading to multiplierless implementations suitable for low-power mobile computing. All of these FBs are constructed from a lattice structure that is VLSI-friendly, employs the minimum number of delay elements, and robustly enforces both linear phase and perfect reconstruction property. The lattice coefficients are parameterized as a series of zero-order lifting steps, providing fast, efficient, in-place computation of the subband coefficients. Despite the tight rational or integer constraint, image coding experiments show that these novel FBs are very competitive with current popular transforms such as the 8/spl times/8 discrete cosine transform and the wavelet transform with 9/7-tap biorthogonal irrational-coefficient filters.

Error Spectrum Shaping in Two‐Dimensional Separable‐Denominator Digital Filters

AbstractIn the implementation of recursive digital filters, the characteristics might be degraded due to finite word length effects. The degradation generates noise at the filter output which is caused by roundoff errors in the product quantization. A technique called error spectrum shaping (ESS) can be applied to suppress the noise. ESS usually relies on the use of feedback of roundoff errors and sometimes their feedforward. In this paper, a technique is developed for ESS in two‐dimensional separable‐denominator digital filters by applying both feedback and feedforward of roundoff errors. A two‐dimensional separable denominator is implemented with the minimum number of delay elements and includes two quantizers. A genetic algorithm is also applied to obtain the suboptimal discrete solution of feedback–feedforward coefficients for the purpose of cost reduction. Finally, a numerical example is given to illustrate the utility of the proposed technique. © 2001 Scripta Technica, Electron Comm Jpn Pt 3, 85(4): 10–19, 2002

Encoder and Distance Properties of Woven Convolutional Codes with One Tailbiting Component Code

Woven convolutional codes with one tailbiting component code are studied and their generator matrices are given. It is shown that, if the constituent encoders are identical, a woven convolutional encoder with an outer convolutional warp and one inner tailbiting encoder (WIT) generates the same code as a woven convolutional encoder with one outer tailbiting encoder and an inner convolutional warp (WOT). However, for rate Rtb < 1 tailbiting encoders, the WOT cannot be an encoder realization with a minimum number of delay elements. Lower bounds on the free distance and active distances of woven convolutional codes with a tailbiting component code are given. These bounds are equal to those for woven codes consisting exclusively of unterminated convolutional codes. However, for woven convolutional codes with one tailbiting component code, the conditions for the bounds to hold are less strict.

Generalized one-multiplier lattice discrete 2-D filters: minimal circuit and state-space realization

A circuit realization is presented for generalized one-multiplier lattice discrete two-dimensional (2-D) filters. The proposed structure has a minimum number of delay elements and multipliers. Based on this circuit realization, the corresponding state-space realization-representation is derived. The dimension of the 2-D state-space vector is minimal and the corresponding transfer function is characterized by the all-pass property.

Two-dimensional B-CFE: Circuit and state space realization

In this paper the problem of the minimal circuit and state space realization for two-dimensional systems that can be expanded into B-type continued fractions, is considered. The matrix vectors A,b,c', having minimal dimension, and the scalar d of the Givone-Roesser state space model are derived. In addition, the corresponding circuit implementation of the system, with minimum number of delay elements, is given.

An application of a constrained adaptive lattice-structure allpass-based notch filter for advanced control of surface-mounted permanent-magnet synchronous drives

A constrained adaptive lattice-structure allpass-based notch filter provides minimal phase delay and complete attenuation of the notch frequency. The allpass sections of the filter are realized as structurally lossless bounded real functions, with a minimum number of delay elements and multipliers. The filter structure admits orthogonal tuning of the notch frequency and notch bandwidth. An improved control scheme for surface-mounted permanent-magnet synchronous (SMPMS) drives ensures stable high-performance operation in the Bur weakening region, utilizing the over-modulation and six-step modes of the space vector modulation (SVM). An automatic transition into the flux weakening region is achieved by controlling the reference voltage magnitude. The fifth and seventh stator current harmonics of the fundamental frequency, generated in the over-modulation and six-step modes, propagate through the current control loops, resulting in the sixth harmonic in the reference voltage for the flux weakening loop and deteriorating drive performance. To properly filter the sixth harmonic over the extended speed range of the drive, the constrained adaptive lattice-structure allpass-based notch filter is employed.

Minimal realization of two-dimensional systems via a state space cyclic model

Abstract The problem of minimal state space realization of two-dimensional systems is considered. The approach followed is, initially, to derive a circuit realization of the given transfer function involving a minimum number of delay elements. To facilitate this realization, the transfer function is expanded into a continued fraction. Using this circuit realization, an algorithm is proposed which readily provides the matrices of the state space model. The simplicity in deriving this model is due to a novel state space model introduced, which is of cyclic structure. Several examples are presented to illustrate ihe proposed algorithm.

2-D discrete time lossless bounded real functions: minimal state space realisation

A circuit realisation for two-dimensional (2-D) nth order discretetime lossless bounded real functions, with minimum number of delay elements, is presented. Based on this circuit realisation the corresponding matrix vectors A, b, c&apos; of the Givone-Roesser 2-D state space model, are derived. The dimension of the 2-D state space model is minimal.

Frequency tracking using constrained adaptive notch filters synthesised from allpass sections

New constrained adaptive notch filter structures are proposed. These structures are synthesised from allpass filter sections, which are realised as structurally lossless bounded real functions with a minimum number of delay elements and multipliers. Both structures admit orthogonal tuning of their notch frequency and bandwidth. Frequency tracking is achieved simply by the evaluation of a function of a filter parameter. Connections are shown with the structures used by other workers. Signal enhancement outputs are obtained from both structures and their signal-to-noise improvement ratios are given. The mirror-image pair of polynomials present in a real allpass transfer function is shown to provide a significant simplification in the generation of the necessary gradient terms used in parameter adaptation. Simulations are included to verify the performance of these structures when they are used to track both single and multiple sinusoids in additive broadband noise.

Computable minimum lattice-like ARMA synthesis

A cascade synthesis for autoregressive moving-average (ARMA) digital filters, which uses the minimum number of delay elements (the degree of the transfer function in z), is described. The resulting structure results in the very convenient lattice from when the zeros of the transmission are not on the unit circle. The theory rests on conversion to scattering parameters and the use of a Richards' function, valid for complex zeros of rational functions with complex coefficients. Results of zeros of transmission on the unit circle are obtained by a parallel combination of lattices. By a suitable transformation, the sections are made computable while preserving the cascade form. >

Comments on "Decision Methods and Realizations os 2-D Digital Filters Using Minimum Number of Delay Elements

Comments on "Decision Methods and Realizations os 2-D Digital Filters Using Minimum Number of Delay Elements

Corrections to 'Decision Methods and Realization of 2-D Digital Filters Using Minimum Number of Delay Elements'

Corrections to 'Decision Methods and Realization of 2-D Digital Filters Using Minimum Number of Delay Elements'

Decision methods and realization of 2-D digital filters using minimum number of delay elements

A combination of techniques taken from graph theory and decision theory is used to solve the problem of realization of 2-D digital filters using minimum number of delay elements called minimal realization. The solution is presented in the form of an algorithm which, when executed, yields one (and hence, infinitely many) minimal realization.

Minimum norm recursive digital filters that are free of overflow limit cycles

In recursive digital filters, the norm of the system matrix is an important design parameter with respect to overflow behavior. Filter realizations that minimize this norm are shown to be free of autonomous overflow limit cycles. Overflow-stable filters of any order, without any constraints on pole locations within the unit circle, can be realized by parallel-cascade structures of minimum norm systems. Minimum norm realizations require the minimum number of delay elements but, in general, more than the minimum number of multiplications and additions.

A Hybrid Realization for Sampled-Data Controllers

This paper presents a method for realizing sampled-data compensators for discrete control systems. A canonical representation that requires a minimum number of delay elements is selected for the realization of sampled-data compensation functions. A hybrid implementation of this canonical form is presented that uses analog elements for multiplication and summation, and digital elements for storage (time delay). The hybrid controller is programmed to compensate two sampled-data systems. For one system (an accelerometer control loop), open-loop frequency characteristics of the hybrid controller are displayed along with time domain curves of the closed-loop system performance.