Microprogramming Language Research Articles

Using logic programming and coroutining for electronic CAD

We show how an extended Prolog can be exploited to implement different electronic CAD tools. Starting with a computer hardware description language (CHDL) several problems like digital circuit analysis, simulation, test generation, and code generation for programmable microprocessors are discussed. For that purpose the MIMOLA (machine independent microprogramming language) system MSS (MIMOLA hardware design system) is presented. It is shown that logic programming techniques have several advantages especially in the area of integrated circuit design. One of the main advantages is the small code size, which translates to easy maintenance. We make extensive use of two main features of standard Prolog and constraint logic programming, i.e., backtracking and the coroutining mechanism, to express Boolean constraints.

Automatic compaction of microcode

A microcode compaction algorithm based on a new description of microoperations and microinstructions is proposed. The technique is independent of the target machine since it does not refer to any machine timing description. It is assumed that the microprogram is described via a high-level microprogramming language. The compaction algorithm is described in terms of operations on the sets of source and destination resources for each microcode block. Some evaluations are made concerning the efficiency of the automatically generated microcode with respect to an increasing microprogram complexity.

Verification oriented approach to concurrent microprogramming with the language C-MIDDLE

Digital systems composed of a number of cooperating microprogrammed units are considered in this paper. A concurrent microprogramming language C-MIDDLE is proposed to describe systems of concurrent microprograms. C-MIDDLE is a concurrency-oriented extension of an existing sequential language MIDDLE. The language C-MIDDLE has a formal denotational semantics which constitutes a basis for reasoning about the behavior of concurrent microprograms and their compositions. A Patri-net-based modeling method of C-MIDDLE programs as well as a verification system VECOM built around this method are also briefly presented.

A microprogramming logic

A universal syntax-directed proof system is presented for the verification of horizontal computer architectures. The system is based on the axiomatic architecture description language AADL, which is sufficiently rich to allow the specification of target architectures while providing a concise model for clocked microarchitectures. For each description A epsilon AADL of a host, it is shown how to construct systematically a (Hoare-style) axiomatic definition of an A-dependent high-level microprogramming language based on S*. The axiomatization of A's microoperations together with a powerful proof-rule dealing with the inherent low-level parallelism of horizontal architectures allow a complete axiomatic treatment of the timing behavior and dynamic conflicts of microprograms written in S*(A).< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A system for verification of interactive microprogram transformations

Since its introduction by Wilkes in 1951 the field of microprogramming gets an increasing importance. But until yet there exist only few and restrictable tools to support a designer in his errorprone task [1] of microprogram development. Most of the activities in the field of microprogramming concern developing microcode compilers. They convert a specification of the intended behavior expressed in a high level microprogramming language [2], [3] into a ho r i zon ta l m i c rop rog ram wh ich is interpretable by a given micro machine.

Retargetable microcode synthesis

Most work on automating the translation of high-level microprogramming languages into microcode has dealt with lexical and syntactic analysis and the use of manually produced macro tables for code generation. We describe an approach to and some results on the formalization and automation of the more difficult problem of retargeting local code generation in a machine-independent, optimizing microcode synthesis system. Whereas this problem is similar in many ways to that of retargeting local code generation in high-level language compilers, there are some major differences that call for new approaches. The primary issues addressed in this paper are the representation of target microprogrammable machines, the intermediate representation of local microprogram function, and general algorithmic methods for deriving local microcode from target machine and microcode function specifications. Of particular interest are the use of formal semantics and data flow principles in achieving both a general and reasonably efficient solution. Examples of the modeling of a representative horizontal machine (the PUMA) and the generation of microcode for the PUMA machine model from our working implementation are presented.

Progress im High-Level Microprogramming

A high-level microprogramming language would speed work on higher level microprogramming and firmware engineering and decouple algorithm design from microcoding. This article examines several approaches.

The AADL/S* Approach to Firmware Design Verification

If microprogramming aims to provide direct hardware control— allowing fast, reliable, and flexible implementation of higher architectural layers—how can high-level microprogramming languages be microarchitecture independent?

A survey of microprogramming languages

Primary objective of this paper is to present a comprehensive survey of micro-programming languages. The issues which help in characterisation of these languages relate to increased machine independence, efficient code generation and structured programming. These requirements often generate conflicting requirements in the language design, resulting invariably in compromises. For a full overview two comparison tables have been prepared which indicate the features of each of the languages in the two classes, namely architecture specific and non-architecture specific. A detailed list of references is also included.

On the formal pescription of microoperations and its impact on automatic microcode generation

Automatic microcode generation is a significant research field of firmware engineering. In the research System AMPS, three kinds of formal description of microoperations will be needed in automatic microcode generation from high level microprogramming language: algorithmic microoperations, real microoperations, and formal microoperations. In this paper, we present and discuss the formal descriptions, the relationship among real microoperations as well as the factors by which the concurrency of microoperations can be identified; we also show the vitality of these three kinds of description mentioned above in allowing the high level microprogramming language being machine-independent, and the generality of microcode compaction algorithm.

A model of clocked micro-architectures for firmware engineering and design automation applications

An aspect common to many problems in firmware engineering is the use of a micromachine model that is, an abstract and selective view of the structure and behavior of the computer at the micro-architectural level. The success, utility and generality of a particular microprogramming language, compaction technique, or verification strategy may rest critically on the expressive power and generality of the underlying micromachine model. While a number of such models have been proposed in the past we believe that these are all, for one reason or another, in adequate. In this paper we present a new, generalized, multipurpose model of clocked micro-architectures intended to provide a uniform framework for use in both firmware engineering and design automation applications.

An axiomatization of low-level parallelism in microarchitectures

This paper presents the heart of a universal syntax-directed proof system for the verification of horizontal computer architectures. The system is based on the axiomatic architecture description language AADL, which incorporates a comcise model of clocked microarchitectures. For a given description A of a host architecture, we show how to axiomatize A's microoperations and present powerful proof-rules dealing with the inherent low-level parallelism of horizontal architectures. They allow for a complete axiomatic treatment of the timing behaviour and dynamic conflicts of microprograms written in an A-dependent high-level microprogramming language based on S*.

The use of hoare logic in the verification of horizontal microprograms

In recent years, much effort has been devoted to the design and implementation of microprogramming languages that support the production of highly reliable yet efficient run time microcode. One of the goals for such languages is to facilitate the formal verification of microprograms using Hoare's inductive assertion method. Essential to the use of this method is an axiomatic definition of the microprogramming language.

A retargetable compiler for a high-level microprogramming language

A compiler for the generation of microcode for a high-level microprogramming language is presented. The compiler is target machine independent. The input to the compiler consists of a hardware description, a high-level microprogram and a set of program transformation rules. The compiler is able to take advantage of optimization techniques which are used by microprogrammers because many of these can be represented by program transformation rules.

Axiomatic proof rules for a machine-specific microprogramming language

In recent years, much effort has been devoted to the design and implementation of high level microprogramming languages. One of the goals for such languages is to facilitate the formal verification of microprograms using Hoare's inductive assertion method. Essential to the use of this method is an axiomatic definition of the microprogramming language.In this paper, we describe the axiomatization of the machine dependent microprogramming language S*(QM-1) [12]. This language is an instantiation of the machine independent language schema S* [3,4], for the Nanodata QM-1 "nanolevel" architecture. We show that, in spite of the complexity of the QM-1, with its variety of side-effects and special conditions, a small and uniform set of proof rules can be constructed.

High level microprogramming

High level microprogramming languages have been studied extensively, but no widely accepted HLML exists to date. We examine the classes of HLMLs, giving examples. We then give some reasons as to the current lack of an accepted HLML, and give some suggestions how to solve this problem. The existence of a HLML would allow work on higher level microprogramming and firware engineering to proceed more rapidly. A possible microprogramming environment, based on a HLML, is presented.

A microprogramming language-directed microarchitecture

A microarchitecture designed for high performance, control store efficiency, and ease of microprogramming is described. These objectives were achieved by orienting the design to support the requirements of a powerful higher-level-like microprogramming language. 1, 2 The language is machine dependent and achieves efficiency of execution and space, as well as compactness of expression through relatively powerful constructs such as partial field operations and by permitting appropriate suboptions to be coupled with each of the various constructs. The relative utility of the various constructs is indicated by a statistical analysis of an actual emulator.

Virtual machines on microprocessor hosts

One of the characteristics of a stored program computer is that given sufficient memory, any stored program computer can be programmed to simulate any other stored program computer. With the availability of 64K microprocessor systems which can execute over 1 million instructions per second, it is now feasible and practical to simulate a large mainframe computer using the native micro-processor macro assembler as a vertical microprogramming language (1). This paper describes the results of an experiment using this technique to implement an IBM 370 virtual machine on a Z80 microprocessor host using what is called pseudo microcode (PMC).

Meta: A language system for bitslice applications

AbstractBitslice technology is a widely used method for building microprogrammable bitslice processors. Manufacturer supplied language tools required for the production of the microcode, however, are usually too expensive. The Meta system, described in this paper, provides the necessary language facilities at minimal cost, making it ideal for small bitslice projects.The concept of the Meta system is very simple: a description of the datapath structure and the information processing capabilities of the bitslice processor is written using the four basic operations of the Meta language. Meta uses this description to generate a translator for machine‐oriented microprogramming language. This offers the programmer a tool for implementing microprogrammed functions.Because of the simplicity of the Meta system, language translators can be built in a very short period of time.

Towards a family of languages for the design and implementation of machine architectures

In recent years, increases in complexity of hardware/firmware systems, and the concern for systems reliability have resulted in growing interest in methodologies and tools for the design, description and verification of computer systems. A vital component of any such design methodology is the language used for representing the design. In the case of particularly complex systems the design process may involve a succession of stages each of which represents the system at a particular level of abstraction. In such situations several languages may be required, each suited to a particular level of abstraction. We present here, one such family of languages , consisting at present of two members, S*A, an architectural description language, and S*, a high level microprogramming language schema. These closely related (“kin”) languages may be used collaboratively for the systematic, top-down development of an architecture, down to the microcode level. The resulting descriptions of the architecture provide, in addition, a complete unified document of the multilevel design process.