Metal-oxide-semiconductor Heterostructure Field-effect Transistors Research Articles

Effect of rapid thermal annealing on DC performance of Mg0.30Zn0.70O/Cd0.15Zn0.85O MOSHFET

This study focuses on a cost-effective method for fabrication of a metal oxide semiconductor-heterostructure field effect transistor (MOSHFET) based on MgZnO/CdZnO (MCO) using dual ion beam sputtering (DIBS), in contrast to the more expensive epitaxial growth system. The MOSHFETs developed in this research exhibit notable characteristics, such as a substantial two-dimensional electron gas (2DEG) transconductance (∼2.6 mS), a high ION/IOFF response ratio in the order of 108, and minimal gate leakage current. Furthermore, we explore the impact of rapid thermal annealing (RTA) on the drain current at various temperatures (600 °C and 800 °C). The results indicate a fourfold improvement in drain current compared to unannealed conditions, primarily attributed to reduced contact resistance and no degradation in term of MgZnO/CdZnO structure. Additionally, an analysis of post-RTA treatment under a nitrogen (N2) atmosphere on gate leakage current is presented. The investigation spans temperatures ranging from 400 °C to 800 °C, revealing that above 600 °C (gate leakage at 400 °C–600 °C is around ∼10−9 A), gate leakage in HFET is augmented by one order of magnitude (∼10−8 A) due to a phase change in the dielectric. These findings underscore the feasibility of DIBS-grown MCO MOSHFETs as an economical solution for the mass production of switching devices and sensors.

Reduction in density of interface traps determined by C-V analysis in III-nitride-based MOSHFET structure

An in situ metal-organic chemical vapor phase epitaxy is used to grow a complete AlGaN/GaN metal oxide semiconductor heterojunction field effect transistor (MOSHFET) structure, gated by a gallium oxide (Ga2O3) layer; we observed reduction in the interfacial trap density compared to its version wherein the Ga2O3 was grown ex situ, after breaking the vacuum, all else being the same. A remarkable decrease in the interfacial charge density for in situ MOSHFET structures in the range of 70%–88% for 10–30 nm oxide layer thickness and improvements in other electrical parameters required for high-performing devices were observed.

Normally-off recessed gate β-Ga2O3 MOSHFETs with a modulation-doped heterostructure back-barrier

This study demonstrates enhancement-mode recessed-gate β-Ga2O3 metal–oxide–semiconductor heterojunction field-effect transistors (MOSHFETs) with a combination of the MOS channel and a modulation-doped heterostructure to improve maximum drain current and on-resistance (RON). In this proposed device concept, modulation doping in the heterostructure back-barrier inserted into the MOS channel increases the electron density in the MOS channel while maintaining a normally-off operation. First, 2D simulations of enhancement-mode recessed-gate β-Ga2O3 metal–oxide–semiconductor field-effect transistors (MOSFETs) were performed in a Silvaco ATLAS TCAD environment to calibrate the transfer characteristics with the measured data of the investigated device reported previously. Second, using calibrated physical models and parameters, the transfer and transconductance characteristics, and output and off-state characteristics of the enhancement-mode recessed-gate β-Ga2O3 MOSHFETs were comprehensively investigated. The maximum drain current at VGS = 8 V and VDS = 10 V could be increased up to 32.6 mA mm−1 from 9.1 mA mm−1 with the MOSHFET in comparison with that of the recessed-gate MOSFET. The breakdown voltage increased considerably from 186 V to 226 V for the recessed-gate MOSHFET. The proposed device also showed a lower RON, which decreased from 354 Ω.mm to 214 Ω.mm owing to greater electron accumulation in the channel owing to the introduction of the modulation-doped heterostructure.

Fabrication of Low On‐Resistance and Normally Off AlGaN/GaN Metal Oxide Semiconductor Heterojunction Field‐Effect Transistors with AlGaN Back Barrier by the Selective Area Regrowth Technique

Herein, a recessed‐gate AlGaN/GaN metal oxide semiconductor heterojunction field‐effect transistor (MOS‐HFET) with an AlGaN back‐barrier layer fabricated by a selective area regrowth (SAG) technique is investigated. A recessed‐gate structure enables normally off operation required for power‐switching applications. A thin AlGaN/GaN channel and the AlGaN back‐barrier structures are fabricated on a Si substrate by metal–organic chemical vapor deposition. The 50 nm thick, thin GaN channel layer with a smooth surface is grown on the AlGaN back‐barrier layer. A recessed‐gate structure is successfully formed by SAG of an AlGaN/GaN layer on the thin AlGaN/GaN layer. The regrown AlGaN/GaN high electron mobility transistor structure shows lower sheet resistance owing to high concentration and high mobility of a two‐dimensional electron gas. Transfer characteristics of the thin AlGaN/GaN channel MOS‐HFETs show normally off operation as a consequence of using the AlGaN back‐barrier structure. Channel mobility becomes five times higher than that of GaN channel in the case of using the thin AlGaN/GaN channel. These results indicate that the regrown thin AlGaN/GaN channel MOS‐HFET has the potential to realize low on‐resistance and normally off operation.

Investigations on Wide-Gap Al0.21Ga0.79N Channel MOS-HFETs With In0.12Al0.76Ga0.12N Barrier/Buffer and Drain Field-Plate

This work investigates, for the first time, wide-gap Al0.21Ga0.79N channel metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs) with In0.12Al0.76Ga0.12N barrier/buffer and drain field-plate (DFP) designs. High-k and wide-gap Al2O3 was grown as the gate oxide and surface passivation by using non-vacuum ultrasonic spray pyrolysis deposition (USPD) technique. A control device having the same epitaxial layers, except with In0.12Al0.88N barrier/buffer was studied in comparison. Enhanced spontaneous polarization effect, improved interfacial quality, and enhanced carrier confinement have been achieved by using the In0.12Al0.76Ga0.12N barrier/buffer design, which has successfully resulted in improved carrier transport, increased electron concentration, and high current densities. The present In0.12Al0.76Ga0.12N/AlN/Al0.21Ga0.79N MOS-HFET design with (without) DFP design has demonstrated superior maximum drain-source current density (IDS, max) of >1 (>1) A/mm at VDS = 20 V, high saturated drain-source current density at VGS = 0 V (IDSS0) of 791.1 (755) mA/mm, and low specific on-resistance (Ron, sp) of 2.83 (2.81) mΩ/cm2. High device figure-of-merit (FOM) on BVDS2/Ron, sp of 93.7 (75.4) MW/cm2 was also obtained with the three-terminal on-state drain-source breakdown voltage (BVDS) of 515 (460) V. The present design is promisingly advantageous to high-current and high-voltage power-switching circuit applications.

Investigations on Al2O3-Dielectric Wide-Gap Al0.3Ga0.7N Channel MOS-HFETs with Composite Al2O3/In Situ SiN Passivation

Al05Ga0.5N/n-Al0.3Ga0.7N/AlN metal-oxide-semiconductor heterostructure field- effect transistors (MOS-HFETs), grown on a SiC substrate, with composite Al2O3/in situ SiN passivation and Al2O3 gate dielectric are investigated. 20 nm thick high-k Al2O3 was deposited by using a non-vacuum ultrasonic spray pyrolysis deposition (USPD) method. Comparative studies between an in situ SiN-passivated Schottky-gate HFET (sample A) and a composite Al2O3/SiN-passivated MOS-HFET were made. Besides, electrical and deep-UV sensing characteristics for devices with different gate-drain separations (L GD ) of 6 μm and 14 μm were also studied. Improved device performances have been obtained for the present sample B (A) with L GD = 6/14 μm separately, including maximum drain-source current density (I DS, max) of 634.4/463.1 (421.8/301.1) mA mm−1, maximum extrinsic transconductance (g m, max) of 25.2/17.9 (19.1/15.2) mS mm−1, on/off-current ratio (I on /I off ) of 7.4 × 107/5.4 × 107 (4.5 × 105/5.4 × 104), two-terminal off-state gate-drain breakdown voltage (BV GD ) of −420/−480 (−320/−390) V, and three-terminal on-state drain-source breakdown voltage (BV DS ) of 310/380 (220/300) V at 300 K. Superior spectral responsivity (SR) of 885.6 A W−1 under 250 nm deep-UV radiation has also been achieved for the present MOS-HFET.

Temperature Effect on Performance of Enhancement Mode Al0.4Ga0.6n-Channel Moshfets with Hybrid Oxide

The metal oxide semiconductor heterostructure field effect transistors (MOSHFETs) based on AlxGa1-xN materials with the high aluminum composition is a promising choice for high-power, high-temperature harsh environment applications. In the present work the temperature stability of MOSHFETS with high-k ZrO2, Al2O3 gate dielectrics has been studied. Our data show these high-k dielectrics introduce negative fixed charges (Qox) as high as 1-3×1013 cm-2 depleting 2DEG density of 2×1013 cm-2 causing a positive shift of threshold voltage (VTH) compared to that for HFET which is an important feature for realizing enhanced (E-) mode MOSHFET. ZrO2 possesses higher Qox resulting in stronger positive VTH shift in devices, while devices with Al2O3 demonstrate lower gate leakage. To take advantages of both oxides, UWBG Al0.4Ga0.6N channel E-mode MOSHFET has been fabricated. E-mode device was realized using the hybrid oxide (ZrO2/Al2O3) combined with gate recess. To separate effects of dielectric charges and damage from recess process on device performance depletion (D-) mode and E-mode devices were fabricated on the same wafer simultaneously. D-mode devices were protected during gate recess step to avoid additional damage. Thermally induced VTH instability of these MOSHFETs were studied and potential mechanism for this VTH instability is discussed. Experimental: Figure 1(a) shows the pseudomorphic device structure that was grown using metalorganic chemical vapor deposition on AlN/sapphire templates. A graded composition (AlxGa1-xN, x=1-0.4) back barrier reduces internal stress and improves gate control in the devices.[i] , [ii] The top 200 Å thick graded n-AlxGa1-xN (x from 0.6 to 0.3) layer assists with the formation of ohmic contacts resistance as low as 1.7 Ω-mm. The n-doping of this layer compensates the positive charges resulting from the reverse composition grading.[iii] The 2DEG sheet resistance was ~1900 ohm/□. Device processing details published elsewhere.[iv] The fixed gate-length LG ≈ 2.0 μm, source to drain spacing, LSD=6 μm, were used for regular devices with 15 μm channel width, while for precise C(V,T,f) measurements we use a test structure with gate area 200x80 μm2 . Results and discussion: The combination of gate recessing and hybrid oxide resulted in threshold-voltage (VTH) shift of +12.2 V from D to E-mode device (Figure 1(b)). The gate leakage current in both D and E-mode MOSHFETs is ~103 smaller than that of MOSHFETs using singe Al2O3 or ZrO2 layer (Figure 2(a)) which allows us to apply gate voltage as high as +12 V. The peak DC currents for D and E-mode devices were found to be 1.1 A/mm and 0.48 A/mm respectively while in the pulse mode it was 1.3 A/mm and 0.53 A/mm. ON/OFF ratio as high as 3×108 was achieved which is higher than ~2 orders of magnitude than that for Al2O3 or ZrO2. We then performed temperature dependent threshold and gate leakage study of our fabricated MOSHFETs. Figure 2(b) shows the temperature dependent gate leakage characteristics of MOSHFETs of this study. It has been found that, in the D-mode MOSHFET, the VTH experiences positive VTH shift of + 1.7 V from RT to 150 °C; for the E-mode MOSHFET the shift is negative: -2.9 V (Figure 3(a)). The VTH shift for similar device having Schottky gate (no dielectric) (HFET) is significantly smaller, +0.2 V. This shows that the VTH shift is mainly due to the charges in dielectric or at dielectric-barrier interface. In the E-mode devices, the effective channel mobility and VTH was additionally affected by radiative defects introduced during gate-recess step. The mobility (µ) in D-mode devices decreases with temperature while it increases for the E-mode devices. We estimated temperature dependent interface state density (DIT(T)) and Qox (T) using frequency- dependent C-V measurements as shown in Figure 3(b). Our analysis show that in D-mode device, Qox(T) dominates over interface charges. These are fixed negative charges which deplete the channel giving a total VTH shift of +1.7 V from RT to 150°C. The extracted SS value for D and E-mode devices were 99 mV/decade and 134 mV/decade, indicating an increased density of interface traps (DIT) at the recessed interface in the E-mode device. Larger DIT value in E-mode devices caused by a radiation damage from the barrier recessing process and becomes comparable with Qox. Thus the temperature effect on Qox is compensated by DIT changes, increasing SS and making the VTH(T) more negative.[i]) G. Simin et al., Jpn. J. Appl. Phys., 40, L1142 (2001).[ii]) C. Ren et al., J. Semicond. 36, 014008-1 (2015).[iii]) S. Bajaj et al., Appl. Phys. Lett. 109, 133508-1 (2016).[iv]) S. Mollah et al., Appl. Phys. Lett. 117, 232105 (2020). Figure 1

AlGaN/AlN/SiC Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistors with Al2O3 Gate-Oxide and Step-Graded AlGaN Channel

Al0.75Ga0.25N/n-AlxGa1-xN/Al0.75Ga0.25N/AlN metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs), grown on a SiC substrate, with step-graded Si-doped (n = 3 × 1018 cm-3) widegap AlxGa1-xN channel and Al2O3 gate-dielectric are investigated. Increased Al-compositions with x = 0.25, 0.5, and 0.75 towards the buffer were devised in the composite widegap channel. The high-k Al2O3 dielectric/passivation layer was grown by using a non-vacuum ultrasonic spray pyrolysis deposition (USPD) method. Experimental comparisons were made with respect to a conventional Schottky-gate HFET.The epitaxial structure of the studied Al2O3-dielectric Al0.75Ga0.25N/n-AlxGa1-xN/Al0.75Ga0.25N/AlN MOS-HFET (sample A) and Schottky-gate HFET (sample B). Both devices have the identical epitaxial structure grown on a SiC substrate by using a low-pressure metal-organic chemical vapor deposition (LP-MOCVD) system. The layer structure includes an undoped AlN buffer, a 20-nm undoped Al0.75Ga0.25N barrier, a 150-nm step-graded Si-doped (n = 3 × 1018 cm-3) AlxGa1-xN channel (x = 0.25, 0.5, and 0.75), and a 20-nm undoped Al0.75Ga0.25N barrier. Standard photolithography and lift-off techniques were used for device processing. For sample B, mesa etching was performed with respect to a 100-nm thick Ni barrier by using an inductively coupled-plasma reactive ion etcher (ICP-RIE). Flow rates were tuned and set at 10 sccm and 20 sccm for the mixed etching gases of BCl3 and Cl2, respectively. The 20-nm undoped Al0.75Ga0.25N barrier was etched away before deposition of source/drain electrodes. Ti (10 nm)/Al (50 nm)/Ni (10 nm)/Au (50 nm) were evaporated. The source/drain ohmic contacts were formed by annealing the sample for 25 seconds at 900°C by using a rapid thermal annealing (RTA) system (ULVAC MILA-5000). Then, 30-nm thick Al2O3 layer was deposited on the Al0.75Ga0.25N barrier by using the USPD technique. Finally, gate electrode of Ni (100 nm)/Au (50 nm) was evaporated after gate photolithography. As for sample A, the gate electrode was formed directly on the surface of Al0.75Ga0.25N barrier without oxide deposition.Improved device performance of the present MOS-HFET design have been obtained, including maximum drain-source current density (IDS, max ) of 130.1 A/mm at VGS = 10 V and VDS = 20 V, IDS at VGS = 0 V (IDSS0 ) of 83.1 mA/mm, on/off-current ratio (Ion /Ioff ) of 1.4 × 107, maximum extrinsic transconductance (gm, max ) of 11.8 mS/mm, two-terminal off-state gate-drain breakdown voltage (BVGD ) of -404 V, and three-terminal on-state drain-source breakdown voltage (BVDS ) of 364 V at 300 K. The present MOS-HFET design has also shown high spectral responsivity (SR) of 737 A/W under 250-nm deep-UV radiation at 300 K.

Enhancement-Mode Characteristics of Al₀.₆₅Ga₀.₃₅N/Al₀.₃Ga₀.₇N/AlN/SiC MOS-HFETs

Widegap-channel Al0.65Ga0.35N/Al0.3Ga0.7N/AlN/SiC metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs) with ultrasonic spray pyrolysis deposition (USPD) grown Al2O3 gate-oxide demonstrating enhancement-mode (E-mode) operation are investigated for the first time. The E-mode operation was achieved by using fluorine ions (F−) implantation. In comparison, conventional Schottky-gate device (sample A) and MOS-HFET (sample B) showing depletion-mode (D-mode) operation were fabricated on the same epitaxial structure. The device characteristics with respect to different gate-to-drain spacings ( $L_{GD}$ ) of $6~\boldsymbol {\mu }\text{m}$ and 14 $\boldsymbol {\mu }\text{m}$ have also been studied. The present E-mode Al0.65Ga0.35N/Al0.3Ga0.7N/AlN MOS-HFET (sample C) with $L_{GD} =6$ (14) $\boldsymbol {\mu }\text{m}$ has demonstrated improved maximum drain-source current density ( $I_{DS,max}$ ) of 206.3 (163.5) mA/mm at $V_{DS} =20$ V, maximum extrinsic transconductance ( $\text{g}_{m,max}$ ) of 32.9 (22.0) mS/mm, on/off-current ratio ( $I_{on}/I_{off}$ ) of 3.7 ${\times }\,\,10^{9}$ ( $1.8\,\,{\times }\,\,10^{9}$ ), two-terminal off-state gate-drain breakdown voltage ( $BV_{GD}$ ) of −370 (−475) V, and three-terminal on-state drain-source breakdown voltage ( $BV_{DS}$ ) of 330 395 V.

High-current recessed gate enhancement-mode ultrawide bandgap Al x Ga1−x N channel MOSHFET with drain current 0.48 A mm−1 and threshold voltage +3.6 V

We report a recessed-gate enhancement-mode Al2O3-ZrO2/Al0.6Ga0.4N/Al0.4Ga0.6N metal-oxide-semiconductor heterostructure field-effect transistor (MOSHFET) with drain current as high as 0.48 A mm−1 at a gate-source voltage of +12 V. This was enabled by a pseudomorphic HFET structure with graded back barrier for strain management and to screen the growth interface from the channel. The device exhibited a threshold-voltage (V TH) of 2.75 ± 0.57 V with absolute maximum V TH = 3.6 V, a +12.2 V shift from that for a depletion-mode MOSHFET fabricated on the same wafer. A 3-terminal breakdown voltage of 700 V was measured in the off-state, showing the viability of E-mode UWBG AlGaN for power electronics.

Improved Electrical and Deep-UV Sensing Characteristics of Al2O3-Dielectric AlGaN/AlN/SiC MOS-HFETs

Improved electrical and deep-UV sensing characteristics of Al2O3-dielectric Al0.75Ga0.25N/n-AlxGa1−xN/Al0.75Ga0.25N/AlN metal-oxide-semiconductor hetero-structure field-effect transistors (MOS-HFETs), grown on a SiC substrate, with an AlGaN ultra-widegap channel design are investigated. 30 nm thick high-k Al2O3 was deposited as both the gate oxide and surface passivation layer by using a non-vacuum ultrasonic spray pyrolysis deposition (USPD) method. Improved device characteristics, including maximum drain-source current density (IDS,max) of 130.1 mA mm−1, maximum extrinsic transconductance (gm,max) of 11.8 mS mm−1, on/off-current ratio (Ion/Ioff) of 1.4 × 107, gate-voltage swing (GVS) linearity of 5.8 V, two-terminal off-state gate-drain breakdown voltage (BVGD) of −404 V, and three-terminal on-state drain-source breakdown voltage (BVDS) of 364 V at 300 K are obtained for the present MOS-HFET. The device has demonstrated high spectral responsivity (SR) of 737 A W−1 under 250 nm deep-UV radiation.

Engineering a Unified Dielectric Solution for AlGaN/GaN MOS-HFET Gate and Access Regions

Typically GaN metal-oxide-semiconductor heterojunction-field-effect transistors (MOS-HFETs) have used two separate dielectrics for the gate and access regions. However, as this article shows, with proper gate-stack engineering, a unified dielectric solution can be achieved for the transistor. HfO2 dielectrics were deposited by atomic layer deposition (ALD). Two types of oxidants were investigated, namely, water (H2O) and ozone (O3). It was found that MOS-HFETs with O3 oxidant yielded lower threshold voltage ( ${V}_{\text {TH}}$ ) shifts, higher maximum drain current ( ${I}_{\text {DS,max}}$ ) of 340 mA/mm, 20% lower ON-resistance ( ${R}_{ {\mathrm {\scriptscriptstyle {ON}}}}$ ), higher peak transconductance at 112.66 mS/mm, lower hysteresis, and lower gate leakage ( ${5.4} \times {10}^{-{6}}$ A/cm2) compared to water oxidant based MOS-HFETs with ${I}_{\text {DS},\text {max}}$ of 240 mA/mm, 81.38 mS/mm peak transconductance, and ${1.7} \times {10}^{-{4}}$ A/cm2 gate leakage. DC/RF dispersion tests showed MOS-HFETs with O3 oxidant had ~200 $\times $ better current collapse recovery. Temperature characterization and reliability test results, such as high-temperature reverse bias (HTRB), are published for the first time on ALD-HfO2/AlGaN/GaN MOS-HFETs using tetrakis(dimethylamino)hafnium (TDMAH) and O3 precursor. Using an ozone oxidant provided more stability (i.e., less variability in ${R}_{ {\mathrm {\scriptscriptstyle {ON}}}}$ and ${V}_{\text {TH}}$ ) as a function of temperature. Finally, when devices were electrically stressed in the OFF-state, the HTRB test showed minimal ${V}_{\text {TH}}$ drift ( ${V}_{\text {TH}}$ drift (2.5 V) in the case of H2O oxidant.

High‐Temperature Operation of AlxGa1−xN (x > 0.4) Channel Metal Oxide Semiconductor Heterostructure Field Effect Transistors with High‐k Atomic Layer Deposited Gate Oxides

Due to their superior breakdown fields compared with GaN and SiC and high thermal conductivity, AlxGa1−xN (x > 0.4) channel high‐electron‐mobility transistors (HEMTs) will find applications in extreme environments such as power electronics. Herein, the high‐temperature operation of ultrawide‐bandgap (UWBG) Al0.65Ga0.35N/Al0.4Ga0.6N metal oxide semiconductor heterostructure field effect transistors (MOSHFETs) with atomic layer‐deposited (ALD) high‐k gate dielectrics TiO2, Al2O3, and ZrO2 is reported. As compared with similar geometry HFETs, these devices exhibit a simultaneous reduction in gate‐leakage current by ≈104 and a positive shift of the threshold voltage as much as 4 V. This positive threshold shift indicates the introduction of negative charges at the oxide/barrier interface and within the thin oxide, attributed to the pre‐ALD plasma treatment. The gate leakage increases weakly with temperature up to 250 °C, whereas the peak drain currents decrease from ≈0.5 to 0.3 A mm−1. An analysis of the C–V and I–V characteristics reveals that this drain current decrease is due to a reduction in channel electron mobility. The potential mechanisms responsible for this are discussed. Up to the measured temperature of 250 °C, the devices withstand repeated temperature cycles without catastrophic degradation or breakdown, underscoring the promise of these materials.

Al0.75Ga0.25N/AlxGa1-xN/Al0.75Ga0.25N/AlN/SiC Metal–Oxide–Semiconductor Heterostructure Field-Effect Transistors With Symmetrically-Graded Widegap Channel

Novel Al 0.75 Ga 0.25 N/Al x Ga 1-x N/Al 0.75 Ga 0.25 N/AlN metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs) with symmetrically-graded widegap Al x Ga 1-x N channel (x = 0.75 → 0.25 → 0.75) grown on a SiC substrate are investigated. Al 2 O 3 was devised as the gate dielectric by using a non-vacuum ultrasonic spray pyrolysis deposition (USPD) technique. Device characteristics with respect to different etch depths of the source/drain recesses were studied. For a 2-μm gate length (L G ), the present widegap V-shape-channel MOS-HFET has shown improved maximum drain-source current density (I DS,max ) of 299.3 A/mm at V DS = 20 V, I DS density at V GS = 0 V (I DSS0 ) of 153.9 mA/mm, on/off-current ratio (I on /I off ) of 1.4 × 10 7 , extrinsic transconductance (g m , max ) of 16.7 mS/mm, two-terminal off-state gate-drain breakdown voltage (BV GD ) of -379 V, and three-terminal on-state drain-source breakdown voltage (BV DS ) of 339 V. Besides, superior deep-UV sensing performance with high spectral responsivity (SR) of 1780 (810.2) A/W at wavelength λ = 250 (300) nm are also achieved.

Trap characterization in ultra-wide bandgap Al0.65Ga0.4N/Al0.4Ga0.6N MOSHFET's with ZrO2 gate dielectric using optical response and cathodoluminescence

Ultrawide bandgap (UWBG) AlGaN-channel metal-oxide-semiconductor heterostructure field-effect transistors (MOSHFETs) with a ZrO2 gate dielectric achieve peak current in excess of 0.4 A/mm and current ON/OFF ratios >106 with subthreshold swings as low as 110 mV/decade. These devices have strong potential for use in power and radio frequency electronics or as true solar-blind photodetectors. In this work, we present the photoresponse analysis in UWBG AlGaN MOSHFETs. Persistent photoconductivity with the decay time above 10 minutes can be quenched by illuminating with strong UV light at 365 nm and 254 nm, suggesting deep traps to be responsible for this behavior. Upon correlating the optical response under various illumination conditions with cathodoluminescence of these devices, we identified two key trap levels at ∼2.48 ± 0.14 eV and 3.76 ± 0.06 eV, controlling the slow response time. By depth-profiling using cathodoluminescence, these traps are identified to be at the AlN/AlGaN interface at the back of the device, due to partial relaxation from the lattice mismatch between AlN and Al0.4Ga0.6N.

Ultra-wide bandgap AlGaN metal oxide semiconductor heterostructure field effect transistors with high-k ALD ZrO2 dielectric

We report on Al0.65Ga0.35N/Al0.4Ga0.6N metal oxide semiconductor heterojunction field-effect transistor (MOSHFET) with high-k ZrO2 gate-dielectric deposited using atomic layer deposition process. As extracted from frequency dependent capacitance–voltage (CV) characteristics, the oxide gates resulted in an interfacial state trap density of ∼2 × 1012 cm−2. A comparative study, on the same material, shows the gate-leakage current of the ZrO2 MOSHFETs to be lower by five orders; their ON/OFF current ratio (∼107) to be higher by about four orders and their threshold voltage to decrease (less negative) by 3.5 V with respect to the Schottky gate devices.

Mobility enhancement in recessed-gate AlGaN/GaN MOS-HFETs using an AlON gate insulator

We demonstrated the advantage of aluminum oxynitride (AlON) gate insulator in enhancing the performance of recessed-gate AlGaN/GaN-based metal–oxide–semiconductor heterojunction field-effect transistors (MOS-HFETs) fabricated with reactive ion etching. The AlON deposition on the recessed-gate structures was found to mitigate the damage of recess etching on the GaN and AlGaN surfaces, enabling a simple gate recess process in the device fabrication. Consequently, a high field-effect mobility of 259 cm2 V−1 s−1, together with normally off operation, was achieved for the recessed-gate AlGaN/GaN MOS-HFETs with the AlON gate insulator. Temperature dependence of the transconductance of the fabricated devices revealed that carrier transport in the channel was mostly dominated by phonon scattering, indicating excellent interface quality between the AlON insulator and the recess-etched AlGaN surfaces.

Investigation of post-annealing effects for normally-off GaN metal-oxide semiconductor heterojunction field-effect transistors with thin AlN barrier layer

The effects of post-annealing processes for normally-off GaN metal-oxide semiconductor heterojunction field-effect transistors (MOS-HFETs) with a thin AlN barrier layer are investigated. These annealing processes are post-deposition annealing (PDA) after oxide deposition, post-metallization annealing (PMA) after gate metallization, and positive-bias annealing (PBA) after wafer processes. PMA and PBA are effective in enhancing the drain current density and threshold voltage shift. The most effective method is PBA and the obtained threshold voltage and drain current density are +3.0 V and 0.7 A mm−1, respectively. This is attributed to improvements in interfacial trap states which is confirmed by an investigation of the frequency dependence of capacitance–voltage characteristics.

Improved Ultraviolet Detection and Device Performance of Al2O3-Dielectric In0.17Al0.83N/AlN/GaN MOS-HFETs

Ultraviolet (UV) detection and electrical characteristics of In0.17Al0.83N/AlN/GaN metal–oxide–semiconductor heterostructure field-effect transistors (MOS-HFETs) with Al2O3 gate-dielectric and passivation formed by using ultrasonic spray pyrolysis deposition (USPD) are studied with respect to a conventional Schottky-gate HFET. The present MOS-HFET (Schottky-gate HFET) has demonstrated superior spectral responsivity (SR) of 360 (340) A/W at 350 nm at $V_{\mathrm{ GS}} = 5$ (3) V and $V_{\mathrm{ DS}} = 6$ (7) V, maximum drain–source saturation current density ( $I_{\mathrm{ DS, max}}$ ) of 810.5 (546.6) mA/mm, maximum extrinsic transconductance of ( $g_{m, \max }$ ) of 180.4 (221.2) mS/mm, gate-voltage swing (GVS) of 2.4 (0.5) V, on/off current ratio ( $I_{\mathrm{ on}}/I_{\mathrm{ off}}$ ) of $5.5 \times \,\,10^{8}$ ( $1.7 \times \,\,10^{5}$ ), two-terminal off-state gate–drain breakdown voltage (BVGD) of −158.5 (−127) V, three-terminal drain–source breakdown voltage (BVDS) of 162 (83.4) V at $V_{\mathrm{ GS}} = -10$ V, and power-added efficiency (P.A.E.) of 26.3% (16.5%) at 2.4 GHz at 300 K. In addition to the improved device performance, this paper demonstrates, for the first time, the UV sensing based on an InAlN/AlN/GaN MOS-HFET design.

Doped Barrier Al0.65Ga0.35N/Al0.40Ga0.60N MOSHFET With SiO2 Gate-Insulator and Zr-Based Ohmic Contacts

This letter reports an Al0.65Ga0.35N-Al0.4Ga0.6N metal–oxide–semiconductor–heterojunction–field–effect–transistor (MOSHFET) with an SiO2 gate-insulator. For this first demonstration of an AlGaN channel MOSHFET, a new doped barrier epilayer design led to linear source–drain ohmic-contacts formed by Zr-based metal stack with a contact resistance as low as $1.64~\Omega \cdot \textsf {mm}$ . For a device with 6- $\mu \text{m}$ source–drain opening a record saturation current of 0.6 A/mm (at gate bias of 6V) was measured. In contrast to a conventional Schottky-gate HFET, the gate-oxide from the pulsed plasma enhanced chemical vapor deposition decreased the MOSHFET gate leakage current by a factor of 104 with only a 1.5-V shift in the threshold voltage. A drift mobility of 430 cm $^{2}/\textsf {V}\cdot \textsf {s}$ is measured at zero-gate bias, which increases to 800 cm $^{2}/\textsf {V}\cdot \textsf {s}$ close to the threshold voltage. The device characteristics up to 250°C are used to calculate the temperature dependence of the drift mobility.