Memory Allocation Mechanism Research Articles

A Classy Memory Management System (CyM2S) using an Isolated Dynamic Two-Level Memory Allocation (ID2LMA) Algorithm for the Real Time Embedded Systems

Due to an increased scalability, flexibility, and reduced cost complexity, the dynamic memory allocation models are highly preferred for the real-time embedded systems. For this purpose, the different types of dynamic models have been developed in the conventional works, which are highly focused on allocating the memory blocks with increased searching capability. However, it faced some of the problems and issues related to the factors of complex operations, high time consumption, memory overhead, and reduced speed of processing. Thus, this research work objects to design an advanced and intelligent dynamic memory allocation mechanism for the real-time embedded systems. Here, a Classy Memory Management System (CyM2S) is developed by using an Isolated Dynamic Two-Level Memory Allocation (ID2LMA) algorithm for efficiently allocating the memory blocks with simple searching. The CyM2S helps to reduce the fragmentation rate and time consumption by optimally allocating the memory blocks. In this model, the small buffer has been maintained for surplus pointers, and the allocated blocks comprise the metadata and payload data. During evaluation, the performance of the proposed CyM2S- ID2LMA technique is validated and compared by using the measures of memory allocation time, release time, execution, and processing speed.

Excitability-Independent Memory Allocation for Repeated Event.

How memory is organized in cell ensembles when an event is repeated is not well-understood. Recently, we found that retraining 24 h after the initial fear conditioning (FC) event induces turnover of neurons in the lateral amygdala (LA) that encodes fear memory. Excitability-dependent competition between eligible neurons has been suggested as a rule that governs memory allocation. However, it remains undetermined whether excitability is also involved in the allocation of a repeated event. By increasing excitability in a subset of neurons in the LA before FC, we confirmed that these neurons preferentially participated in encoding fear memory as previously reported. These neurons, however, became unnecessary for memory recall after retraining 24 h following initial FC. Consistently, the initial memory-encoding neurons became less likely to be reactivated during recall. This reorganization in cell ensembles, however, was not induced and memory was co-allocated when retraining occurred 6 h after the initial FC. In 24-h retraining condition, artificially increasing excitability right before retraining failed to drive memory co-allocation. These results suggest a distinct memory allocation mechanism for repeated events distantly separated in time.

Extending the wait-free hierarchy to multi-threaded systems

In modern operating systems and programming languages adapted to multicore computer architectures, parallelism is abstracted by the notion of execution threads. Multi-threaded systems have two major specificities: on the one part, new threads can be created dynamically at runtime, so there is no bound on the number of threads participating in long-running executions. On the other part, threads have access to a memory allocation mechanism that cannot allocate infinite arrays. These specificities make it challenging to adapt some algorithms to multi-threaded systems, in particular those that need to assign one shared register per process. This paper explores the synchronization power of shared objects in multi-threaded systems by extending the famous Herlihy’s wait-free hierarchy to take these constraints into consideration. It proposes to subdivide the set of objects with an infinite consensus number into nine new degrees, depending on their ability to synchronize a bounded, finite or infinite number of processes, with or without the need to allocate an infinite array. To show the relevance of the proposed extension, for each new degree it is either proved that it is empty, or an object illustrating it is proposed.

Object-Level Memory Allocation and Migration in Hybrid Memory Systems

Hybrid memory systems composed of emerging non-volatile memory (NVM) and DRAM have drawn increasing attention in recent years. To fully exploit the advantages of both NVM and DRAM, a primary goal is to properly place application data on the hybrid memories. Previous studies have focused on page migration schemes to achieve higher performance and energy efficiency. However, those schemes all rely on online page access monitoring (costly), and data migration at the page granularity may cause additional overhead due to DRAM bandwidth contention and maintenance of cache/TLB consistency. In this article, we present Object-level memory Allocation and Migration (OAM) mechanisms for hybrid memory systems. OAM exploits a profiling tool to characterize objects’ memory access patterns at different execution phases of applications, and applies a performance/energy model to direct the initial static memory allocation and runtime dynamic object migration between NVM and DRAM. Based on our newly-developed programming interfaces for hybrid memory systems, application source codes can be automatically transformed via static code instrumentation. We evaluate OAM on an emulated hybrid memory system, and experimental results show that OAM can significantly reduce system energy-delay-product by 61 percent on average compared to a page-interleaving data placement scheme. It can also significantly reduce data migration overhead by 83 and 69 percent compared to the state-of-the-art page migration scheme CLOCK-DWF and 2PP, respectively, while improving application performance by up to 22 and 10 percent.

Memory allocation mechanisms underlie memory linking across time.

Memories are dynamic in nature. A cohesive representation of the world requires memories to be altered over time, linked with other memories and eventually integrated into a larger framework of sematic knowledge. Although there is a considerable literature on how single memories are encoded, retrieved and updated, little is known about the mechanisms that govern memory linking, e.g., linking and integration of various memories across hours or days. In this review, we present evidence that specific memory allocation mechanisms, such as changes in CREB and intrinsic excitability, ensure memory storage in ways that facilitate effective recall and linking at a later time. Beyond CREB and intrinsic excitability, we also review a number of other phenomena with potential roles in memory linking.

Workload Adaptive Shared Memory Management for High Performance Network I/O in Virtualized Cloud

This paper presents the design and implementation of MemPipe, a dynamic shared memory management system for high performance network I/O among virtual machines (VMs) located on the same host. MemPipe delivers efficient inter-VM communication with three unique features. First, MemPipe employs an inter-VM shared memory pipe to enable high throughput data delivery for both TCP and UDP workloads among co-located VMs. Second, instead of static allocation of shared memories, MemPipe manages its shared memory pipes through a demand driven and proportional memory allocation mechanism, which can dynamically enlarge or shrink the shared memory pipes based on the demand of the workloads in each VM. Third but not the least, MemPipe employs a number of optimizations, such as time-window based streaming partitions and socket buffer redirection, to further optimize its performance. Extensive experiments show that MemPipe improves the throughput of conventional (native) inter VM communication by up to 45 times, reduces the latency by up to 62 percent, and achieves up to 91 percent shared memory utilization.

Hotplug or Ballooning: A Comparative Study on Dynamic Memory Management Techniques for Virtual Machines

In virtualization environments, static memory allocation for virtual machines (VMs) can lead to severe service level agreement (SLA) violations or inefficient use of memory. Dynamic memory allocation mechanisms such as ballooning and memory hotplug were proposed to handle the dynamics of memory demands. However, these mechanisms so far have not been quantitatively or comparatively studied. In this paper, we first develop a runtime system called U-tube, which provides a framework to adopt memory hotplug or ballooning for dynamic memory allocation. We then implement fine-grained memory hotplug in Xen. We demonstrate the effectiveness of U-tube for dynamic memory management through two case studies: dynamic memory balancing and memory overcommitment. With these two case studies, we make a quantitative comparison between memory hotplug and ballooning. The experiments show that there is no absolute winner for different scenarios. Our findings can be very useful for practitioners to choose the suitable dynamic memory management techniques in different scenarios.

Synaptic tagging during memory allocation

There is now compelling evidence that the allocation of memory to specific neurons (neuronal allocation) and synapses (synaptic allocation) in a neurocircuit is not random and that instead specific mechanisms, such as increases in neuronal excitability and synaptic tagging and capture, determine the exact sites where memories are stored. We propose an integrated view of these processes, such that neuronal allocation, synaptic tagging and capture, spine clustering and metaplasticity reflect related aspects of memory allocation mechanisms. Importantly, the properties of these mechanisms suggest a set of rules that profoundly affect how memories are stored and recalled.

Reconfigurable vertical profiling framework for the android runtime system

Dalvik virtual machine in the Android system creates a profiling barrier between VM-space applications and Linux user-space libraries. It is difficult for existing profiling tools on the Android system to definitively identify whether a bottleneck occurred in the application level, the Linux user-space level, or the Linux kernel level. Information barriers exist between VM-space applications and Linux native analysis tools due to runtime virtual machines' dynamic memory allocation mechanism. Furthermore, traditional vertical profiling tools targeted for Java virtual machines cannot be simply applied on the Dalvik virtual machine due to its unique design. The proposed the Reconfigurable Vertical Profiling Framework bridges the information gap and streamlines the hardware-software co-design process for the Android runtime system.

VME Bus-Based Multiprocessor Parallel Data Acquisition System

Synchronization data acquistition system with multiple processors is the trend of the modern manufacturing equipment development. Complex high-precision equipment even has hundreds of sensors and they are acquiring data at the same time, the sensors are distributed in dozens of data acquisition cards. The key technology is the acquisition system enable to synchro-gather data from data acquisition cards which base on data bus between them and then sent the gather data to arithmetic system. In order to synchronic data integration, it is required a high-speed and low-latency data channels and a suitable data protocol between data acquisition cards and main control card. This paper introduce a new type of synchronous data acquisition system, through the self-defined data bus and a specific memory allocation mechanism, the data acquisition system can sent the integrate data to arithmetic system through main control card after it get the data from acquisition cards, the transfer delay of data exchange is nanoseconds.

Scalable SIMD-parallel memory allocation for many-core machines

Dynamic memory allocation is an important feature of modern programming systems. However, the cost of memory allocation in massively parallel execution environments such as CUDA has been too high for many types of kernels. This paper presents XMalloc, a high-throughput memory allocation mechanism that dramatically magnifies the allocation throughput of an underlying memory allocator. XMalloc embodies two key techniques: allocation coalescing and buffering using efficient queues. This paper describes these two techniques and presents our implementation of XMalloc as a memory allocator library. The library is designed to be called from kernels executed by massive numbers of threads. Our experimental results based on the NVIDIA G480 GPU show that XMalloc magnifies the allocation throughput of the underlying memory allocator by a factor of 48.

High Regularities in Eye‐Movement Patterns Reveal the Dynamics of the Visual Working Memory Allocation Mechanism

With only two to five slots of visual working memory (VWM), humans are able to quickly solve complex visual problems to near optimal solutions. To explain the paradox between tightly constrained VWM and impressively complex human visual problem-solving ability, we propose several principles for dynamic VWM allocation. In particular, we propose that complex visual information is represented in a temporal manner using only a few slots of VWM that include global and local visual chunks. We built a model of human traveling salesman problem solving based on these principles of VWM allocation and tested the model with eye-movement data. Exactly as the model predicted, human eye movements during traveling salesman problem solving have precise quantitative regularities with regard to both the general statistical pattern of attentional fixations and how they vary across individuals with different VWM capacities. Even though VWM capacity is very limited, eye movements dynamically allocate VWM resources to both local and global information, enabling attention to fine details without loss of the big picture.

Dynamic Memory Allocator for Sensor Operating System Design and Analysis

Dynamic memory allocation is an important mechanism used in operating systems. An efficient dynamic memory allocator can improve the performance of operating systems. In wireless sensor networks, sensor nodes have miniature computing device, small memory space and very limited battery power. Therefore, it is important that sensor operating systems operate efficiently in terms of energy consumption and resource management. And the role of dynamic memory allocator in sensor operating system is more important than one of general operating system. In this paper, we propose a new dynamic memory allocation scheme that resolves the existing problems in dynamic memory allocators. We implemented our scheme on Nano-Qplus which is a sensor operating system based on multi-threading. Our experimental results and static analysis result show our scheme performs efficiently in terms of the execution time and the memory space compared with existing memory allocation mechanisms.

Fast operation of large-scale high-precision matrix based on GPU

A fast calculation approach for large-scale matrix operation,which can be accomplished by Graphic Processing Unit(GPU),was designed.For taking full advantage of the parallel architecture of GPU to enhance the calculation speed,special matrix partitioning and memory allocation mechanism according to the features of GPU were designed to decrease the frequency of data access.Meanwhile Kahan's summation formula was introduced to ensure the precision of the calculation.The result shows that the approach can achieve better effect and greatly enhance the speed and the precision of the large matrix multiplication.

C언어 기반 프로그램의 소스코드 분석을 이용한 메모리 접근오류 자동검출 기법

Memory access errors are frequently occurred in C programs. A number of tools and research works have been trying to detect the errors automatically. However, they have one or more of the following problems: inability to detect all memory errors, changing the memory allocation mechanism, incompatibility with libraries, and excessive performance overhead. In this paper, we suggest a new method to solve these problems, and then present a result of comparison to the previous research works through the experiments. Our approach consists of two phases. First is to transform source code at compile time through inserting instrumentation into the source code. And second is to detect memory errors at run time with a bitmap that maintains information about memory allocation. Our approach has improved the error detection abilities against the binary code analysis based ones by using the source code analysis technique, and enhanced performance in terms of both space and time, too. In addition, our approach has no problem with respect to compatibility with shared libraries as well as does not need to modify memory allocation mechanism.

Optimal multiplexing on a single link: delay and buffer requirements

This paper is motivated by the need to provide per-session quality of service guarantees in fast packet-switched networks. We address the problem of characterizing and designing scheduling policies that are optimal in the sense of minimizing buffer and/or delay requirements under the assumption of commonly accepted traffic constraints. We investigate buffer requirements under three typical memory allocation mechanisms which represent tradeoffs between efficiency and complexity. For traffic with delay constraints we provide policies that are optimal in the sense of satisfying the constraints if they are satisfiable by any policy. We also investigate the tradeoff between delay and buffer optimality, and design policies that are "good" (optimal or close to) for both. Finally, we extend our results to the case of "soft" delay constraints and address the issue of designing policies that satisfy such constraints in a fair manner. Given our focus on packet switching, we mainly concern ourselves with nonpreemptive policies, but one class of nonpreemptive policies which we consider is based on tracking preemptive policies. This class is introduced and may be of interest in other applications as well.

Managing memory for real-time queries

The demanding performance objectives that real-time database systems (RTDBS) face necessitate the use of priority resource scheduling. This paper introduces a Priority Memory Management (PMM) algorithm that is designed to schedule queries in RTDBS. PMM attempts to minimize the number of missed deadlines by adapting both its multiprogramming level and its memory allocation strategy to the characteristics of the offered workload. A series of simulation experiments confirms that PMM's admission control and memory allocation mechanisms are very effective for real-time query scheduling.

A user machine in a time-sharing system

This paper describes the design of the computer seen by a machine-language programmer in a time-sharing system developed at the University of California at Berkeley. Some of the instructions in this machine are executed by the hardware, and some are implemented by software. The user, however, thinks of them all as part of his machine, a machine having extensive and unusual capabilities, many of which might be part of the hard-ware of a (considerably more expensive) computer. Among the important features of the machine are the arithmetic and string manipulation instructions, the very general memory allocation and configuration mechanism, and the multiple processes which can be created by the program. Facilities are provided for communication among these processes and for the control of exceptional conditions. The input-output system is capable of handling all of the peripheral equipment in a uniform and convenient manner through files having symbolic names. Programs can access files belonging to a number of people, but each person can protect his own files from unauthorized access by others. Some mention is made at various points of the techniques of implementation, but the main emphasis is on the appearance of the user's machine.