Matched-spectral-null Research Articles

Performance of an 8/9 rate matched spectral null code on the PR4 magnetic recording channel

The performance of an 8/9 rate matched spectral null (MSN) code is analyzed on the PR4 magnetic recording channel with additive white Gaussian noise (AWGN) at the sensor. The high rate is achieved with a fixed charge constraint code of block length N=27 on each of the PR4 channel's dicode interleaves. A simplified semi-analytic method for MSN codes that approximates the constants multiplying the Q function for certain error event types is introduced and validated by simulations. The 8/9 rate MSN/PR4 system was compared to a normal 16/17 rate code with PR4 and EPR4 detectors for a range of user densities. The MSN/PR4 system has less than 0.9 dB net coding gain for user densities above 2.25, and it's inferior to simple EPR4 at user densities above 1.9.

A high rate matched spectral null code

A new method to construct a sliding-block matched spectral null (MSN) code with a high code rate above 0.8 for the partial response class IV (PR4) channel is described. The method partially prunes a running digital sum (RDS) trellis in a novel manner, and is approximately 1.5 times as efficient in generating available codewords compared to a conventional RDS pruning method when their digital sum variations (DSV) are the same. Simulated results with Lorentzian channels showed that practical codes with rates of 12/14 and 24/27 constructed using this method had coding gains of approximately 1 dB and 1.5 dB, respectively, in their signal-to-noise ratio (SNR) compared with the conventional code with a rate of 12/15 at a user bit density of 2.

A 200-MSample/s trellis-coded PRML read/write channel with analog adaptive equalizer and digital servo

A fully integrated partial response maximum likelihood (PRML) read/write IC with analog adaptive equalization operates up to 200 MSample/s. The chip implements both matched spectral null (MSN) trellis and standard PR4 Viterbi detectors in the digital domain as well as digital servo. The device is integrated in a mature 0.7-/spl mu/m BiCMOS technology, has a die size of 54 mm/sup 2/, and dissipates 2 W with MSN code or 1.5 W with PR4 code at 4.5-V supply and 200 MSample/s.

Good convolutional codes for the precoded (1-D)(1+D)/sup n/ partial-response channels

We extend the coding technique for the 1-D channel, due to Wolf and Ungerboeck, to the case of the (1-D)(1+D)/sup n/ channel. The technique employs a convolutional encoder, a precoder, and the channel in cascade. A computer-aided search for channel codes with large minimum free squared Euclidean distance, d/sub free//sup 2/, is introduced. The search is limited to a class of convolutional encoders for which an encoder with constraint length /spl nu/ generates a decoder trellis with 2/sup /spl nu// states only, as opposed to 2/sup /spl nu/+n+1/ states obtained when a general convolutional encoder is used. These channel codes are said to be totally trellis-matched (TTM) to the (1-D)(1+D)/sup n/ channel. A limitation on the maximum zero-run length, L/sub MAX/ is attained by choosing a nontrivial coset of the convolutional code. A class of coset representatives from which the resulting run-length-limited channel codes are TTM is determined. While minimal encoders generate channel codes containing no flawed codewords, it is shown that some nonminimal encoders do the same while achieving larger dg/sub free//sup 2/. Both types of encoders are considered in the search. Many new channel codes for the (1-D)(1+D)/sup 2/ and the (1-D)(1+D)/sup 3/ channels, with diverse rates and decoding complexities, are tabulated. The codes have relatively low decoding complexity for rates up to 0.8. Two of the new channel codes are compared to a matched spectral null (MSN) code. With the same decoding complexity and code rate, one of these two new channel codes has a smaller d/sub free//sup 2/ and larger L/sub MAX/ than the MSN code. However, with slightly higher decoding complexity, the second new channel code outperforms the MSN code.

Matched spectral null coding for magnetic recording with a 1+D channel

This paper presents an application of Matched Spectral Null (MSN) coding to the magnetic recording channel that allows increased recording densities. A PR1 1+D partial response channel is used in combination with a DC and Nyquist free code to provide coding gain. A Viterbi detector based on the combined trellis of the code and channel is used for decoding. Using this scheme, increased user linear recording density over current PR4 systems can be obtained.

Performance of trellis coded class-1 partial-response

The performance of trellis-coded class-1 partial-response (TCPR1) is presented. A rate 8/10 partitioned matched-spectral-null (MSN) code for class-4 partial-response (PR4) is applied to class-1 partial-response (PR1) in this paper. A method to eliminate quasicatastrophic (QC) sequences on PR1 detector trellis is described. The performance of 8/10TCPR1 was better than that of 8/10TCPR4 at user density over 2.2 in simulation and much improved compared with 8/10PR1ML in practice. The conditions under which PR1 has performance advantages over PR4 are also presented.

Improved trellis-coding for partial-response channels

New code design methods and Viterbi detector architectures are presented for high-rate trellis-coded partial-response (TCPR) systems. The methods, which extend the matched-spectral-null (MSN) coding technique, use novel code constraints and time-varying detector trellis structures to reduce path memory requirements by as much as a factor of two, relative to previously reported codes, while retaining the other attractive features of MSN codes. The design methods and corresponding time-varying trellis structures are illustrated with several examples.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Design and performance of a VLSI 120 Mb/s trellis-coded partial response channel

A VLSI trellis-coded partial-response (TCPR) codec module incorporating circuitry for three exploratory, improved trellis codes is presented. The architecture, implementation, and performance evaluation of a "partitioned" rate 8/10 matched-spectral-null (MSN) code are described in detail. The detector implementation uses a programmable, systolic architecture to realize a time-varying Add-Compare-Select (ACS) topology that rotates state-ACS assignments and periodically superimposes "auxiliary" survivor paths. The survivor memory unit requires only 3 bytes per interleave and is implemented using a two-stage, time-varying architecture combining register-exchange and traceback methods. The module was fabricated in 0.45 micron CMOS technology requiring less than 300 mW at 12 MB/sec. Selected experimental results for a variety of magnetic recording components are shown.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Matched spectral-null codes with soft-decision outputs

Considers the concatenation of an inner matched-spectral-null (MSN) code with an outer error-correcting code to achieve improved performance on a partial-response channel in the presence of additive white Gaussian noise. The authors show how to modify the reduced-complexity Viterbi algorithm of Karabed and Siegel [1991] to produce reliability values for each bit using the procedure proposed by Hagenauer and Hoeher [1989]. These reliability values are then used by the outer decoder to achieve improved performance. The authors simulated a number of codes and observed improvements due to soft-decision decoding of 1-2 db. >

Area-efficient architectures for the Viterbi algorithm II. Applications

In part I the theoretical foundations of a new class of area-efficient architectures for the Viterbi algorithm were established. Area-efficient architectures for practical codes are presented here to illustrate the design procedures and demonstrate the favourable area-time tradeoff results. Three examples from convolutional codes, matched-spectral-null (MSN) trellis codes, and Ungerboeck codes are presented. The application of the area-efficient techniques to codes with a very large number of states, codes with time-varying trellises, and a programmable Viterbi decoder is discussed. >

On the performance of a rate 8/10 matched spectral null code for class-4 partial response

The authors present the application and performance of a rate 8/10 matched-spectral null (MSN) trellis code in conjunction with class-4 partial response (PR4) signaling. Details of the encoder and decoder functions are presented, as well as the reduced-complexity trellis structure underlying the Viterbi detector for the coded system. Implementation issues involved in the design of a VLSI chip embodying the encoder, decoder, and Viterbi detector for the trellis-coded system are discussed. Results of experiments using synthesized PR4 waveforms are presented, and it is shown that the rate 8/10 code can provide about a 3-dB advantage relative to the class-4 partial response maximum likelihood detection in the presence of additive white Gaussian noise as well as additive synthesized adjacent track interference.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A 30-MHz trellis codec chip for partial-response channels

The authors present a rate 8/10 matched-spectral-null (MSN) trellis codec chip which can increase noise tolerance in partial-response channels applicable to digital magnetic recording. The Viterbi detector in this codec features an area-efficient pipelined architecture and a modulo metric normalization technique. The chip was implemented in a 1.2- mu m CMOS process with a die size of 22 mm/sup 2/. It offers a 12-Mb/s data rate when operating at 30 MHz. Experimental results verified the predicted coding gain of 2.8 dB relative to the uncoded system at a bit-error rate of 10/sup -7/.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>