Machine Chip Research Articles

Examination of microstructure and mechanical properties of direct additive recycling for Al-Mg-Mn alloy Machine chip waste

In this study, the as-deposited microstructure and mechanical properties are examined for both the wrought strain hardened Al-Mg-Mn alloy (AA5083-H131) feedstock and the AA5083 machine chip waste feedstock processed with Additive Friction Stir Deposition (AFSD). Monotonic tensile and uniaxial fatigue experiments compared three specimen types: AA5083-H131 Wrought control, AA5083 AFSD-Recycled, and AA5083 AFSD-Solid bar. Tensile and fatigue results demonstrated comparable performance between the recycled material and wrought control. Experimental results indicate the thermo-mechanical processing of AFSD resulted in an exchange of strengthening mechanisms – replacing the strength of wrought material from strain-hardening to grain boundary strengthening from a refined as-deposited microstructure. Although strengthening mechanisms evolved in AA5083, the mechanical performance of the AFSD-Recycled material including improved fatigue performance over the wrought control samples illustrates the potential use of the AFSD process to reclaim waste machine chips into components or repairs while maintaining high mechanical performance requirements.

Point-of-Need Innovations: Metal Additive Manufacturing and Repair

Abstract This article reports on the development of additive friction stir deposition techniques that use secondary feedstocks such as machine chips and damaged components to make in-field repairs at the point of need. The focus of the initial research was aluminum alloys. Preliminary studies show significant promise for the adaptation of these techniques to hard alloys including steel castings, wrought high strength steels, and titanium alloys.

Forming A Cylindrical Billet from Aluminium Alloy Chips (AA2024-T3) by using Friction Stir Consolidation Technique

Recently, Friction stir consolidation (FSC) is a solid-state manufacturing and recycling process for metal scrap, hence, becoming much important side to convert the metal scrap into finish or semi-finished products. In contrast with the conventional process or re-melting process, the FSC advantage that lower metal waste, environmentally friendly and low cost. In This research, investigated the feasibility to produce a fully dense cylindrical billet from milling machine chips of aluminium alloy type (AA2024-T3) by using an FSC process, the chips plunged onto a hollow cylindrical die by a rotating tool. The chips softening due to the friction heat generation and subjected to the dynamic recrystallization DRX and high plastic deformation. The process was done with different values of rotation speed tool, plunging depth of the tool and preheating time. A 20 mm diameter coherent cylindrical billet with four highs (20, 25, 30, and 35)mm were obtained. The quality of the obtained billets is evaluated through morphological observation.

Direct recycling of machine chips through a novel solid-state additive manufacturing process

Recycling of metal waste for feedstock material in additive manufacturing (AM) is typically carried out through energy extensive melting and solidification processing techniques. However, in austere environments, energy production can be limited and thus melting down scrap into powder through an atomization process is not a viable approach to producing feedstock from reclaimed waste. However, advancements in solid-state material processing has led to a novel additive manufacturing process that uses solid, macroscale structural feed-rods that allow for high deposition rates with wrought-like mechanical properties. This process, additive friction stir deposition (AFS-D), leverages friction between the rotating feed-rod and the substrate (or previous deposition layer) to soften and promote material flow that creates a plasticized and metallurgically bonded material layer. As such, the AFS-D approach is ideally suited to directly process metal waste with minimal material preparation. To illustrate this concept, we demonstrate AM builds with refined microstructure and wrought-like properties made using loose machines chips. The results of this study demonstrate the potential to recycle metal machine chips by feeding them directly into the AFS-D process and produce structurally sound depositions that can be used for Point-of-Need manufacturing within austere environments.

A Secure and Efficient Key Establishment Scheme for Communications of Smart Meters and Service Providers in Smart Grid

Security is an indispensable part of smart grid (SG). Key establishment protocols play a vital role in fulfilling the security requirements in SG. In recent years, many key establishment schemes have been proposed for SG. However, only three of them offer the strong smart meter anonymity. In 2015, Tsai and Lo presented an anonymous key establishment scheme to be employed in SG. Recently, Odelu et al. have demonstrated that Tsai and Lo's scheme suffers from the ephemeral secret leakage attack. Furthermore, another scheme has been proposed recently by He et al. that has improved the efficiency of Tsai and Lo's scheme. However, besides its merits, we indicate that He et al. 's scheme suffers from both known session-specific temporary information attack and private key leakage. Additionally, these three anonymous schemes have the key escrow problem since the trusted anchor is aware of entities’ private key. Hence, to cover the existing issues, in this paper we propose a key establishment scheme that not only is free from the security challenges of the previous anonymous schemes and key escrow problem, but also is efficient in terms of both computational and communication costs. Finally, yet importantly, we present the performance analysis of our proposed scheme on a state-of-the-art advanced RISC machine (ARM) chip, namely NXP LPC1788, as a suitable hardware for the smart meters.

An Extreme Learning Machine-Based Neuromorphic Tactile Sensing System for Texture Recognition.

Despite significant advances in computational algorithms and development of tactile sensors, artificial tactile sensing is strikingly less efficient and capable than the human tactile perception. Inspired by efficiency of biological systems, we aim to develop a neuromorphic system for tactile pattern recognition. We particularly target texture recognition as it is one of the most necessary and challenging tasks for artificial sensory systems. Our system consists of a piezoresistive fabric material as the sensor to emulate skin, an interface that produces spike patterns to mimic neural signals from mechanoreceptors, and an extreme learning machine (ELM) chip to analyze spiking activity. Benefiting from intrinsic advantages of biologically inspired event-driven systems and massively parallel and energy-efficient processing capabilities of the ELM chip, the proposed architecture offers a fast and energy-efficient alternative for processing tactile information. Moreover, it provides the opportunity for the development of low-cost tactile modules for large-area applications by integration of sensors and processing circuits. We demonstrate the recognition capability of our system in a texture discrimination task, where it achieves a classification accuracy of 92% for categorization of ten graded textures. Our results confirm that there exists a tradeoff between response time and classification accuracy (and information transfer rate). A faster decision can be achieved at early time steps or by using a shorter time window. This, however, results in deterioration of the classification accuracy and information transfer rate. We further observe that there exists a tradeoff between the classification accuracy and the input spike rate (and thus energy consumption). Our work substantiates the importance of development of efficient sparse codes for encoding sensory data to improve the energy efficiency. These results have a significance for a wide range of wearable, robotic, prosthetic, and industrial applications.

Design of barrier bucket kicker control system

The Heavy-Ion Research Facility in Lanzhou (HIRFL) contains two synchrotrons: the main cooler storage ring (CSRm) and the experimental cooler storage ring (CSRe). Beams are extracted from CSRm, and injected into CSRe. To apply the Barrier Bucket (BB) method on the CSRe beam accumulation, a new BB technology based kicker control system was designed and implemented. The controller of the system is implemented using an Advanced Reduced Instruction Set Computer (RISC) Machine (ARM) chip and a field-programmable gate array (FPGA) chip. Within the architecture, ARM is responsible for data presetting and floating number arithmetic processing. The FPGA computes the RF phase point of the two rings and offers more accurate control of the time delay. An online preliminary experiment on HIRFL was also designed to verify the functionalities of the control system. The result shows that the reference trigger point of two different sinusoidal RF signals for an arbitrary phase point was acquired with a matched phase error below 1° (approximately 2.1 ns), and the step delay time better than 2 ns were realized.

Monitoring single-cell gene regulation under dynamically controllable conditions with integrated microfluidics and software

Much is still not understood about how gene regulatory interactions control cell fate decisions in single cells, in part due to the difficulty of directly observing gene regulatory processes in vivo. We introduce here a novel integrated setup consisting of a microfluidic chip and accompanying analysis software that enable long-term quantitative tracking of growth and gene expression in single cells. The dual-input Mother Machine (DIMM) chip enables controlled and continuous variation of external conditions, allowing direct observation of gene regulatory responses to changing conditions in single cells. The Mother Machine Analyzer (MoMA) software achieves unprecedented accuracy in segmenting and tracking cells, and streamlines high-throughput curation with a novel leveraged editing procedure. We demonstrate the power of the method by uncovering several novel features of an iconic gene regulatory program: the induction of Escherichia coli’s lac operon in response to a switch from glucose to lactose.

Small-angle neutron scattering investigations of nanocrystalline alloy chips obtained by machining

AbstractUltrafine-grained (UFG) materials exhibit significantly enhanced mechanical properties. This has brought renewed attention on the use of large strain or severe plastic deformation as a means for achieving microstructural refinement in metals and alloys. Large plastic strains imposed in a machine chip result in significant microstructural refinement, including the creation of UFG and nanocrystalline materials. It looks to be an economical route for realizing nanocrystalline materials. In the present study, small-angle neutron scattering (SANS) was employed to investigate the modifications in the microstructure of the chips produced via machining. Double crystal-based medium resolution SANS instrument has been used for this purpose. Significant scattering intensity at small enough angles reveals the presence of mesoscopic density fluctuations produced because of the machining. Atomic force microscopy images also corroborate the existence of such small length scale density fluctuations.

A microfluidic synchronizer for fission yeast cells

Among all the cell cycle synchronization technologies, the baby machine may be considered as the most artifact-free method. A baby machine incubates "mother cells" under normal conditions and collects their "babies", producing cell cultures that are similar not only in cell cycle phase but also in age. Unlike many other synchronization methods, no cell-cycle-blocking agent or metabolic stress is introduced in this method. Several macroscale and microfluidic baby machines have been developed for producing synchronized cell colonies. However, for rod-shaped cells like fission yeast (Schizosaccharomyces pombe), it is still a challenge to immobilize only the mother cells in a microfluidic device. Here we presented a new baby machine suitable for fission yeast. The device is fixed one end of the cell and releases the free-end daughter cell every time the cell finishes cytokinesis. A variety of structures for cell immobilization were attempted to find the optimal design. For the convenience of collection and further assay, we integrated into our baby machine chip a cell screener, which exploited the deformation of polymer material to switch between opening and closing states. Synchronous populations of fission yeast cells were produced with this device, its working detail was analyzed and performance was evaluated. The device provides a new on-chip tool for cell biology studies.

Compaction Forming of Mg Industrial Waste Chips and Their Recycling Process

In recent years, the magnesium alloy is frequently used for automobile components, computer parts and digital camera parts. However, a lot of magnesium chips from the manufacturing process are dumped as the industrial waste, because the surface area per unit volume is large and the magnesium machine chips are easily oxidized during the melting process. However, the magnesium chips will be able to be recycled by the compaction forming to avoid the oxidation. In this paper, the compaction forming experiments of the magnesium machine chips are attempted by mixing of waste Al chips, aluminum melting flux such as NaCl, MgCl2, and plastic chips of Bakelite, glass epoxy. For the compacts obtained, the check of crack, the strength test and the microstructure observation are performed. Furthermore, the formed compact was melted in molten aluminum. And, the mechanical strength of the obtained Al-Mg alloy is compared with that of the commercial alloy.

Ｍｇ屑，Ａｌ屑ならびにＡｌ溶解フラックス混合によるＭｇ機械加工屑の圧縮成形と溶融Ａｌへの溶解実験

In recent years, the magnesium alloy is frequently used for automobile components, computer parts and digital camera parts. However, a lot of magnesium chips from the manufacturing process are dumped as the industrial waste, because the surface area per unit volume is wide and the magnesium machine chips are easy oxidized during the melting process. However, the magnesium chips will be able to be recycled by the compaction forming to avoid the oxidation. In the paper, the compaction forming experiments of the magnesium machine chips are attempted by mixing of Mg chips, Al chips and aluminum melting flux such as NaCl, MgCl2. For the compacts obtained, the check of crack, the strength test and the microstructure observation of the compact are performed. Furthermore, the formed compact was melted in molten aluminum. And, the mechanical strength of the obtained Al-Mg alloy is compared with that of the commercial alloy.

OPTIMAL CNN TEMPLATES FOR LINEARLY-SEPARABLE ONE-DIMENSIONAL CELLULAR AUTOMATA

In this tutorial, we present optimal Cellular Nonlinear Network (CNN) templates for implementing linearly-separable one-dimensional (1-D) Cellular Automata (CA). From the gallery of CNN templates presented in this paper, one can calculate any of the 256 1-D CA Rules studied by Wolfram using a CNN Universal Machine chip that is several orders of magnitude faster than conventional programming on a digital computer.

アスファルト混合によるＭｇ機械加工屑の圧縮成形と成形体のＡｌ合金添加剤への利用

In recent years, the magnesium alloy is frequently used for automobile components, computer parts and digital camera parts. However, a lot of magnesium chips from the manufacturing process are dumped as the industrial waste, because the surface area per unit volume is wide and the magnesium machine chips are easy oxidized during the fusion process. However, the magnesium chips will be able to be recycled by the compaction forming to reduce the oxidation. In the paper, the compaction forming of the magnesium machine chips is attempted by the addition of asphalt. For the compact obtained, the check of crack, the strength test and the microstructure observation of the compact are performed. Furthermore, the fusion experiment of the formed compact into aluminum melt is examined to apply as the aluminum alloy additive.

Pixel‐level snakes on the CNNUM: algorithm design, on‐chip implementation and applications

AbstractIn this paper, a new algorithm for the cellular active contour technique called pixel‐level snakes is proposed. The motivation is twofold: on the one hand, a higher efficiency and flexibility in the contour evolution towards the boundaries of interest are pursued. On the other hand, a higher performance and suitability for its hardware implementation onto a cellular neural network (CNN) chip‐set architecture are also required. Based on the analysis of previous schemes the contour evolution is improved and a new approach to manage the topological transformations is incorporated. Furthermore, new capabilities in the contour guiding are introduced by the incorporation of inflating/deflating terms based on the balloon forces for the parametric active contours. The entire algorithm has been implemented on a CNN universal machine (CNNUM) chip set architecture for which the results of the time performance measurements are also given. To illustrate the validity and efficiency of the new scheme several examples are discussed including real applications from medical imaging. Copyright © 2005 John Wiley & Sons, Ltd.

Configurable multilayer CNN-UM emulator on FPGA

A new emulated digital multilayer cellular neural network (universal machine (CNN-UM) chip architecture called Falcon has been developed. In this brief, the main steps of the field-programmable gate array (FPGA) implementation are introduced. The main results are as follows. The CNN-UM architecture emulated on Xilinx Virtex series FPGA, three-dimensional nonlinear spatio-temporal dynamics can be implemented on this architecture. The critical parameters of the implementation in a single-layer configuration are 55 million cell update/s/processor core, or, equivalently 1 giga-operation per second (GOPS) computing performance. In the face of the high performance, the power requirements of the architecture are relatively low only /spl sim/3 W per processor core. Using reconfigurable devices to implement emulated digital architectures provides more flexibility compared to the custom very large-scale integration designs because different Falcon architectures can be used on the same FPGA device.

A CNN algorithm for real time analysis of DNA microarrays

The work focuses on a new approach for DNA-chip image processing by using the cellular neural network (CNN) paradigm. In particular, the work aims to solve the main issues in automatic classification and spot validation that arise during an automatic DNA microarray analysis procedure. This contribution briefly presents the basic DNA micro-array technique and the state-of-the-art technologies, and introduces the idea of processing DNA chip data via CNNs, reporting suitable examples. The algorithm described has been developed using a high level language, dedicated to CNN universal machine (CNNUM) chip programming, and validated on a typical fluorescence image from a DNA microarray after hybridization.

A CNN framework for modeling parallel processing in a mammalian retina

AbstractWe present here a simple multi‐layer cellular neural/non‐linear network (CNN) model of the mammalian retina, capable of implementation on CNN Universal Machine (CNN‐UM) chips. The basis of the model is a simple multi‐layer cellular neural/non‐linear Network (IEEE Trans. Circuits Systems 1988; 35:1257; IEEE Trans. Circuits Systems 1993; 40:147). The characterization of the elements in the CNN model is based on anatomical and physiological studies performed in the rabbit retina. The living mammalian retina represents the visual world in a set of about a dozen different ‘feature detecting’ parallel representations (Nature 2001; 410:583–587). Our CNN model is capable of reproducing qualitatively the same full set of space–time patterns as the living retina in response to a flashed square. The modelling framework can then be used to predict the set of retinal responses to more complex patterns and is also applicable to studies of the other biological sensory systems. The work represents a major step forward in the complexity and programmability of retinal models. Copyright © 2002 John Wiley & Sons, Ltd.

Analogic algorithms for optical detection of breaks and short circuits on the layouts of printed circuit boards using CNN

Printed circuit board layout inspection methods are mostly based on local geometric information, therefore they are well suited to the CNN paradigm. Here the detection of two layout errors is considered namely, the breaks in the wires and some kind of short circuits. The designed analogic algorithms to solve the problems above were tested on real-life examples using an experimental system based on our CNN-HAB digital multiprocessor add-in-board with 1 million cell space and at a speed of 2.0 μs/cell/iteration. The break detection algorithm was tested on a 20*22 CNN Universal Machine (CNNUM) chip and the results were compared to other automatic optical inspection systems as well.

Fault-tolerant design of analogic CNN templates and algorithms-Part I: The binary output case

This paper addresses the issue of designing a class of fault-tolerant cellular neural network (CNN) templates that, combined with CNN analogic algorithms, work correctly and reliably on given CNN universal machine (CNN-UM) chips. In particular, a generic method for finding nonpropagating binary-output CNN templates is proposed. This method is based on measurements of actual CNN-UM chips and combines adaptive optimization and decomposition of theoretically ideal CNN templates in order to correct the erroneous behavior of actual CNN-UM chips, which is mainly caused by imperfections introduced during fabrication. More specifically, the entire array of cells in a CNN-UM chip is modeled by a single feed-forward virtual cell whose optimal parameters are found by a simple and effective gradient-based method. In the case of binary input-output uncoupled templates (or Boolean operators), a systematic template decomposition method is applied whenever optimization fails to find a correctly working CNN template for all possible combinations of local 3/spl times/3 binary input patterns. The resulting templates are finally combined, yielding a simple CNN analogic algorithm. Examples are presented for both binary- and analog-input operators, using two concrete stored-program CNN-UM chips to demonstrate the effectiveness of the proposed method, whose advantages and limitations are also discussed.