LSI System Research Articles

3D IC Stacking Technology for Reducing Power Consumption of Logic LSI System

3D IC Stacking Technology for Reducing Power Consumption of Logic LSI System

Guest Editorial Special Section on the IEEE International Conference on Microelectronic Test Structures

Semiconductor Devices have been, and continue to be, the core of the information society. Together with tiny and inexpensive sensors, huge amounts of physical data will be collected in cyber-systems and analyzed by artificial intelligence. In such cyber-physical system, large-scale, low-power, and reliable semiconductor devices should be integrated with sensors and actuators. In addition to the classical trend of semiconductors, the engineers of mid-2010s must explore many materials for “new functionality,” whose impact on standard LSI system is still unclear. Recent integration technology such as chip-on-chip (3-D stacked IC) increases complexity of the device fabrication and analysis. It is therefore clear that everyone must seek for reliable and productive fabrication to achieve satisfactory yields, and a key component in addressing these issues is the characterization of the technology. Test structures, as well as test methods, play a major role in technology characterization and covers elements such as feature size measurement, parameter extraction, fluctuation assessment in transistors, stability measurement, and analogue parameter characterization. For thirty years the IEEE has annually sponsored the IEEE International Conference on Microelectronic Test Structures to discuss cutting edge methods in characterization.

LSI and PCB unified noise analysis CAD system

AbstractAccompanying the faster operating frequencies of digital devices and the lower voltages for the operating voltages of LSIs, the problems clearly are longer development times and increased costs caused by noise problems such as voltage ground bounce noise, simultaneous switching noise, and EMI in devices constructed from LSIs, PKGs, SIPs, and PCBs. We have constructed a CAD system capable of creating the designs of optimum noise measures by applying the LSI and PCB unified large‐scale analysis to all of the design stages from the upstream design stage to the verification stage after completion of the design. Therefore, the creation of design patches as the result of noise problems could be eliminated. In this paper, we discuss the features of this system, application examples, and the effects. © 2007 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 90(10): 23–31, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.20335

Liquid-surface immobilization system and liquid–liquid interface bioreactor: Application to fungal hydrolysis

Novel fungal cultivation and bioconversion systems are proposed. Spores and mycelia of a fungus suspended in a liquid medium were effectively floated on a liquid surface by the aid of a ballooned microsphere (MS). Many fungi such as Aspergillus and Penicillium formed a thick and physically strong fungus-MS mat on the liquid surface followed by stationary cultivation (LSI). The fungus-MS mat of Absidia coerulea IFO 4423 was overlaid by a solution of 2-ethylhexyl acetate ( 1) in n-decane (liquid–liquid interface bioreactor, L-L IBR). The strain could efficiently catalyze the hydrolysis of 1 to 2-ethyl-1-hexanol ( 2). The accumulation of 2 in the L-L IBR was significantly higher than those in emulsion and organic-aqueous two-liquid-phase systems and a formerly reported interface bioreactor (solid–liquid interface bioreactor, S-L IBR). Furthermore, lipase production in the LSI system was also higher than that in a submerged cultivation system.

Development of General-Purpose LSI for Sensor Signal Processing

This paper describes how to develop a general-purpose LSI for analog signal processing for the signal obtained by variety of sensors. The LSI system includes eight independent elements and variety of signal processing circuit can be realized just by properly combining some of the elements functions. The eight elements are input-output full swing operational amplifiers, low noise operational amplifiers, monitor circuits, an absolute detector, filters, a current generate to adjust the filter cut-off frequency, an AGC, and reference voltage and current circuits. Among those, the input-output full swing operational amplifiers, the filters, and the absolute detector were newly designed by applying the special circuit techniques to make the circuits highly accurate. The conventional simple full swing operational amplifiers were mostly realized by C-MOS transistors, whereas the proposed circuits cannot help using the bi-polar transistors because variety of circuit elements are realized in the LSI. The LSI realized both by bi-polar and C-MOS transistors are more expensive than the LSI simply realized by bi-polar transistors. The gyrator techniques were newly employed to realize the filters by which the type of filters, i.e., HPF or LPF can be easily selected by the external connection of elements and the cut-off frequency can be easily adjusted by controlling the current to the circuit. The absolute detector does not include diodes from which the detector circuit is less-influenced by the temperatures and has the less-distortion characteristics.

The EVA trigger: Transverse momentum selection in a solenoid

A custom CMOS LSI and ECL PAL-based trigger system for a particle physics experiment is presented. The EVA apparatus at Brookhaven National Laboratory is designed to observe large angle scattering near the kinematic limit of P T for hadron-proton scattering with cross sections in the picobarn range and interaction rates of 100 MHz. The trigger selects events with high P T tracks in a solenoidal straw tube tracking magnetic spectrometer in three stages. An ECL PAL scintillation hodoscope pretrigger and timing mask is followed by P T reconstruction from three superlayers of straw tube drift chambers using custom CMOS LSI integrated circuits. The higher level CMOS trigger system is implemented on custom modules and functions at secondary trigger rates in excess of 1 MHz. A Motorola MC68000 microprocessor resides on each module and uses global information on the event to provide a third trigger level. The modules are interfaced to VMEbus, controlled by a single board VME computer.

Speech recognition LSI system including recording/reproduction device

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Speech recognition LSI system

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Newly structured expandable 52-Mbit/s, 48-channel time-division switching LSI with 2.4 Gbit/s throughput

An expandable Si bipolar 2.4 Gbit/s throughput, 52 Mbit/s 48-channel time-division switching LSI system is described. A high-throughput of 2.4 Gbit/s and a power-dissipation of 5.3 W are achieved by adopting a low-voltage swing four-serial-gated differential bipolar circuit design and super self-aligned process (SST-1A) logic-in-memory LSI technology. This LSI is applicable to the digital video time-division switching and digital crossconnect systems of future B-ISDN.

New signal-processing LSIs for the 8 mm camcorder

A novel LSI chip set for the high-band 8-mm camcorder has been developed. The new LSI system has succeeded in reducing the number of peripheral parts and power consumption by 48% and 35% for the camera block, and 37% and 26% for the VCR block, as well as improving the picture quality. Using these LSIs, a compact, lightweight, low-power, and high-picture-quality Hi8 camcorder can be achieved.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Advanced C 2MOS speech synthesizers

Employing an updated C 2MOS (clocked CMOS) technique, two types of speech synthesizer LSI circuits, based on the Parcor (partial correlation) and the ADM (adoptive delta modulation) methods, and recording watch system, are introduced and described. These LSI circuits and system have several functions • • The new Parcor LSI circuit has the circuits needed by the Parcor synthesis algorithm. It has a 64 kbit speech data ROM, output low pass filter and preamplifier. Using only this LSI circuit, 30 s to 60 s of speech can be synthesized. • • The new ADM LSI circuit has encoding and decoding circuits, a 64 kbit speech data ROM and RAM control circuit. The record and synthesis system can be easily constructed with this LSI circuit and RAM. • • The recording watch system consists of the watch LSI circuit with the ADM system and the analogue LSI circuit. In the Parcor system, various high quality and low data-rate speech outputs are obtainable. The ADM system is applied for recording and synthesizing. By applying these systems to meet market needs, it is possible to achieve good cost performance in a simple system.

Design considerations leading to the ILLIAC IV LSI process element memories

The authors present the design considerations for a 256-bit bipolar LSI memory component and the system-packaging technology by which the LSI components were assembled to provide seventy 131 072-bit 200-ns full-cycle main process element memories for the ILLIAC IV computing system. The concepts utilized allow memory modularity from about 1024 bytes to over 3,000,000 bytes while maintaining an approximately linear price per bit over the whole range. The experience on LSI memory component and system testing is discussed. Also included are observations on experiences with component designs and prices during the PEM project.