Low Noise Amplifler Research Articles

A LOW-COST DUAL-WIDEBAND ACTIVE GNSS ANTENNA WITH LOW-ANGLE MULTIPATH MITIGATION FOR VEHICLE APPLICATIONS

A low-cost dual-wideband active global navigation satellite system (GNSS) antenna is proposed for vehicle applications. An inverted shorted annular ring (ISAR) and a shorted annular ring (SAR) are used as radiation patches for low-angle multipath mitigation and operated respectively at 1164{1279MHz and 1559{1610MHz. To reduce the efiect of the mutual coupling between the ISAR and SAR, meanwhile broaden the impedance bandwidth of the ISAR, defected ground structures are etched under the microstrip feed lines of the ISAR. Two trans-directional couplers are adopted to form orthogonal dual-feed networks of the ISAR and SAR for wideband circularly polarized reception. A combiner is adopted to merge two way signals into one way amplifled by a wideband low noise amplifler with the proposed DC and RF collinear transmission technology. The experimental results show that the proposed antenna is better than the NovAtel GPS-703-GGG pinwheel antenna in terms of signal reception.

A NEW DESIGN OF DUAL-PORT ACTIVE INTEGRATED ANTENNA FOR 2.4/5.2 GHZ WLAN APPLICATIONS

A new design of dual-port monopole-slot-like microstrip active integrated antenna (AIA) is presented and discussed in this paper. The primary designed passive antenna is capable of supporting two difierent WLAN bands at 2.4{2.84GHz and 5.15{5.35GHz due to its dual-port structure. In order to reduce the transmission coe-cient between the two ports of antenna a coupling sleeve-arm and an inverted T-shaped slot are utilized on the ground plane of antenna each beneath one of the corresponding feed-lines which act as flltering structures at desirable frequencies. The proposed passive dual-port antenna is integrated with a power amplifler (PA) and a low noise amplifler forming a dual- port microstrip AIA which can be used as a full-duplex transceiver at its operating WLAN frequency bands. The measured results for both passive and active antennas show that the designed antennas have proper radiation characteristics at their desired operation frequencies. The fabricated passive antenna exhibits dual-band performance at 2{3.42GHz and 4.5{5.6GHz while the fabricated AIA covers 2.31{ 2.82GHz (at PA port) and 4.45{5.5GHz (at LNA Port) with 13dB and 9dB gain level improvement respectively.

HIGH-SPEED, SIMPLIFIED DESIGN OF AN IMAGE RECEIVER FOR WIRELESS CAPSULE ENDOSCOPY

Just over a decade ago, wireless capsule endoscopy (WCE) was introduced as a novel alternative to conventional wire or probe endoscopy to examine disorders of the human gastrointestinal (GI) tract. Yet, the persistent inability of transmitting high-quality images due to limited data rate of the telemetry system continues to be an issue of major concern. Thus, high-data-rate telemetry systems are essential due to the widespread use of the WCE technique. In this paper, we present such a telemetry system that includes a highly-simplifled receiver for the use in WCE. Unlike the conventional architecture of a radio frequency (RF) receiver, the architecture of the new receiver allows the direct conversion of analog RF signals to digital signals, eliminating the need for any frequency conversion in the analog domain. Our receiver system consists of sub-blocks, a low-noise amplifler (LNA), a logarithmic amplifler (LA), a power detector (PD), and a comparator. The common-source cascode LNA was designed with its frequency spectrum centralized at 450MHz, which was determined by electromagnetic (EM) simulation of the path loss in the GI tract of the human body. To ensure that the higher data rate, i.e., 100Mbps, could be attained, the LNA was designed for a system bandwidth of 100MHz, i.e., 400{500MHz. The LNA and the three cascading blocks in combination have total gain of 80dB to

AREA AND POWER OPTIMIZATION OF 802.15.4A UWB PULSE LOW NOISE AMPLIFIERS BY GENETIC ALGORITHMS

An Ultra Wide Band (UWB) Low Noise Amplifler (LNA) for 802.15.4a UWB PHY (physical layer) is proposed. The amplifler is designed using IHP Microelectronis CMOS 0.25m technology for lower price. The LNA area, power, and performance was optimized using the Genetic Algorithm (GA). The optimization goals included inductance values, power consumption, and performance in the frequency domain using S-parameters, then flne tuned in the time domain using the reference UWB pulses of the 802.15.4a standards. The LNA consumes around 10mW excluding the output bufier stage, has a gain of 11 to 15dB, a 1dB compression point of i9dBm, and flve inductors with a total value around 10nH.

HIGH PERFORMANCE V-BAND GAAS LOW NOISE AMPLIFIER WITH MODIFIED COPLANAR WAVEGUIDE EBG TRANSMISSION LINES TECHNOLOGY

This paper presents an integrated millimeter-wave (mmW) low noise amplifler (LNA) which is implemented by using 0.15-m baseline GaAs pHEMT technology. The design utilized mod- ifled co-planar waveguide (CPW) to perform a slow wave transmission line (TLine) with electromagnetic band gap (EBG) ground structures for the input/output matching networks. The low noise V-band LNA chip size was hence reduced by adopting the new EBG transmission lines. The developed amplifler exhibited a noise flgure of 6.21dB, and a peak gain of 17.3dB at 66GHz. Additionally, the amplifler has linear characteristics and its measured third-order intercept (IIP3) point is greater than i0:5dBm under a dc power consumption of 75mW.

ANALYSIS OF ELECTRO STATIC DISCHARGE ON GAAS-BASED LOW NOISE AMPLIFIER

This paper studies static efiect of communication Low Noise Amplifler (LNA) that utilizes GaAs wafer. It analyzes the Electro-Static Discharge (ESD) efiect, which occurs within communication components, such as GaAs LNA, and describes testing standard and methods. In order to flnd out GaAs LNA's susceptibility to static, two well-recognized communication GaAs LNA IC models were selected to be tested. Commercial program allowed measuring of static energy inserted within LNA's internal circuit by running a simulation about static discharge of GaAs LNA. Then we analyzed malfunctions caused by static and discussed about architectural problem and improvement according to the test and simulation result, from the perspective of GaAs LNA's electro static discharge.

DESIGN OF CONCURRENT LOW-NOISE AMPLIFIER FOR MULTI-BAND APPLICATIONS

A concurrent multi-band low-noise amplifler (LNA) for both WLAN and WiMAX applications covering 2.4{2.7GHz, 3.3{ 3.8GHz and 5.1{5.9GHz is mainly investigated. The proposed LNA consists of two cascaded common-source stages and employs stepped- impedance transformers and series and shunt feedback techniques to obtain good return loss, low noise and high linearity simultaneously. Test results show that the LNA features input and output return loss of 12dB, gain of 21dB, and noise flgure of 2dB across the three bands of operation, which are the state of the art among the counterparts.

LINEARITY IMPROVEMENT OF CASCODE CMOS LNA USING A DIODE CONNECTED NMOS TRANSISTOR WITH A PARALLEL RC CIRCUIT

A fully integrated 5.5GHz high-linearity low noise amplifler (LNA) using post-linearization technique, implemented in a 0.18m RF CMOS technology, is demonstrated. The proposed technique adopts an additional folded diode with a parallel RC circuit as an intermodulation distortion (IMD) sinker. The proposed LNA not only achieves high linearity, but also minimizes the degradation of gain, noise flgure (NF) and power consumption. The LNA achieves an input third-order intercept point (IIP3) of +8:33dBm, a power gain of 10.02dB, and a NF of 3.05dB at 5.5GHz biased at 6mA from a 1.8V power supply.

A COMPACT WIDEBAND MATCHING 0.18-μm CMOS UWB LOW-NOISE AMPLIFIER USING ACTIVE FEEDBACK TECHNIQUE

This work presents an ultra-wideband (UWB) low noise amplifler (LNA) with active shunt-feedback technique for wideband and ∞at gain by using standard 0.18m CMOS processes. Difierent from past resistive shunt-feedback technique, the capacitor supersedes by a transistor in active shunt-feedback technique. The active shunt- feedback provides input matching generating a 50› real part with proper design and achieves ∞at gain from 2.5GHz to 12GHz. The UWB LNA achieved 11:4 § 0:2dB gains, 4:5 » 5:2dB noise flgure (NF), 13.5mW power consumption at frequency 3.1GHz to 10.6GHz, i15dBm of 1-dB compression point (P1dB), and i3dBm of input third intercept point (IIP3) at 6GHz. The chip size including pads is only 0:6 £ 0:5mm 2 .

A NOVEL ACTIVE ANTENNA BEAMFORMING NETWORKS USING BUTLER MATRICES

In this paper, a novel architecture of using cascaded Butler Matrices (BM) integrated with Low Noise Ampliflers (LNAs) is proposed. By using the narrow beams available from the Butler Matrix, it is possible for a receiver to increase the gain in the desired signal directions and reduce the gain in interference directions. Hence, high-gain narrowbeam signals for long-range application are produced. A novel technique is introduced which uses high linearity LNAs and a second Butler Matrix, acting as a mirror of the flrst Butler Matrix, reconstructing the antenna patterns of the individual radiating elements. The resulting outputs have high linearity and broad beam width that can be used for short-range communication. Design of the Butler Matrix, Low Noise Amplifler, Wilkinson Power Divider and High Linearity Low Noise Amplifler are presented in this paper. A flnal design of active antenna beamforming network using cascaded Butler Matrices integrated with LNAs is proposed. The beamforming network provides a method, which could be applicable in vehicle communication systems, where long-range communications with roadside beacons and short-range communications with the fast moving vehicle are both required.

DESIGN OF 3 TO 5 GHZ CMOS LOW NOISE AMPLIFIER FOR ULTRA-WIDEBAND (UWB) SYSTEM

A single-stage ultra-wideband (UWB) CMOS low noise amplifler (LNA) employing interstage matching inductor on conven- tional cascode inductive source degeneration structure is presented in this paper. The proposed LNA is implemented in 0.18m CMOS technology for a 3 to 5GHz ultra-wideband system. By careful op- timization, an interstage inductor can increase the overall broadband gain while maintaining a low level of noise flgure of an amplifler. The fabricated prototype has a measured power gain of +12.7dB, input return loss of 18dB, output return loss of 3dB, reverse isolation of 35dB, noise flgure of 4.5dB and input IP3 of i1dBm at 4GHz, while consuming 17mW of DC dissipation at a 1.8V supply voltage.

DESIGN OF AN ULTRA-WIDEBAND, LOW-NOISE AMPLIFIER USING A SINGLE TRANSISTOR: A TYPICAL APPLICATION EXAMPLE

In this work, a design method of an Ultra-Wideband (UWB), low-noise amplifler (LNA) is proposed exerting the perfor- mance limitations of a single high-quality discrete transistor. For this purpose, the compatible (Noise F, Input VSWR Vi, Gain GT) triplets and their (ZS, ZL) terminations of a microwave transistor are exploited for the feasible design target space with the minimum noise Fmin(f), maximum gain GT max(f) and a low input VSWR Vi over the available bandwidth B. This multi-objective design procedure is reduced into syntheses of the Darlington equivalences of the ZSopt(f), ZLmax(f) terminations with the Unit-elements and short-circuited stubs in the T-, L-, ƒ-conflgurations and Particle Swarm Intelligence is successfully implemented as a comparatively simple and e-cient optimization tool into both veriflcation of the design target space and the design process of the input and output matching circuits. A typical design exam- ple is given with its challenging performance in the simple ƒ- and ƒ-conflgurations realizable by the microstrip line technology. Further- more the performances of the synthesized ampliflers are compared us- ing an analysis programme in MATLAB code and a microwave system simulator and verifled to agree with each other.

A 0.7V Transformer-Feedback CMOS Low-noise Amplifier for 5-GHz Wireless LAN

In this paper, we present a 0.7V low-noise amplifler(LNA) using monolithic trans- former feedback to neutralize the gate-drain overlap capacitance of a fleld-efiect transistor(FET). It is a single-ended amplifler implemented in 0.18-m CMOS technology designing for 5-GHz wire- less local-area networks (LANs). This LNA achieves a simulated power gain of 10.84dB, noise flgure(NF) of 2.4dB, and input referred 1dB compression point (P1dB) of i8dBm at 5.8GHz. Operating from a 0.7-V supply, the power consumptions for the low noise amplifler(LNA) are 4.8mW.

A 0.75V CMOS Low-Noise Amplifier for Ultra Wide-Band Wireless Receiver

An ultra-wideband (UWB) CMOS low-noise amplifler(LNA) topology that com- bines a common-gate stage for input wideband matching with a shunt-peaked folded-cascode conflguration for wideband amplifying stage is presented in this paper. The proposed UWB LNA achieves simulated power gain > 10dB from 3.3 to 10.1GHz with only 0.75V supply using 0.18m CMOS process. Its broadband matching is better than i10dB for S11 and S22 from 3.1 to 10.6GHz, and an average noise flgure is about 4dB, while consuming 11.5mw with output bufier amplifler. DOI: 10.2529/PIERS060907041726