Loop Phase Margin Research Articles

Fast and robust DC link voltage control of single-phase grid-connected converters supporting 50 Hz and 60 Hz mains with universal magnitudes range

It is well-known that dynamics of single-phase grid-connected power converters employing PI or type-II DC link voltage controllers is limited by the maximum tolerable value of utility-side current total harmonic distortion (THD). Moreover, universal DC link voltage controller must be capable of supporting both 50 Hz and 60 Hz utilities and universal range of magnitudes (85Vrms–265Vrms). As a result, DC link crossover frequency value (and hence corresponding settling time) may vary significantly in case grid voltage magnitude variations are not compensated in the controller. In order to cope with the above-mentioned deficiencies, the paper suggests a design methodology for a novel dual-frequency-tuned utility magnitude insensitive plug-in disturbance observer (DOB), supporting universal utility frequencies and magnitudes so that the transient response of a grid-connected converter is improved without altering the existing PI or type-II DC link voltage controller coefficients. These characteristics are attained by robust modification of DC link voltage loop plant to possess notch-like properties around two frequencies of interest and treating the grid voltage magnitude value as non-measurable uncertainty translated into input disturbance and subsequently cancelled. Analytical design guidelines for obtaining PI + DOB controller coefficients are provided for desired values of utility-side current THD and DC link voltage loop phase margin (PM). Simulations and experimental results are provided to validate the feasibility of proposed design methodology.

On the Minimum DC Link Capacitance in Practical PFC Rectifiers Considering THD Requirements and Load Transients

The article presents the analytical derivation of the minimum dc link capacitance in single-phase front ends with active power factor correction (PFC) without hold-up time requirements. Such systems typically employ boost-type rectifiers; operate under restricted total harmonic distortion (THD) of the grid-side current. Moreover, PFC rectifiers must be capable of tolerating step-like zero-to-rated load power variations. It is well known that these two constraints contradict each other, posing nontrivial design challenges. The revealed value of minimum capacitance is expressed by an explicit function of grid voltage and frequency, converter rated power, dc link voltage reference, and grid current THD and voltage loop phase margin set points. Experimental results validate the proposed methodology, closely matching corresponding analytical predictions.

Design of a sub-1V CMOS reference voltage generator

In this paper a low complexity, sub-1V, reference voltage generator with low voltage sensitivity over PVT variation and high power supply rejection ratio (PSRR) is proposed. It consists of a traditional bandgap reference core where resistors are used for generating both the PTAT and CTAT currents, which are then added forming a temperature-independent current. A new 1 V modified folded cascode operational amplifier is proposed and used in the main bandgap’s loop resulting in low offset, high loop gain and adequate loop phase margin of 58.9°. The loop consists of only two inverting stages and the circuit can be integrated entirely without the need of external large capacitors for frequency compensation. A regulated cascode current source is employed for accurately mirroring of the core temperature-independent current to a resistive load, where the reference voltage is generated. The proposed circuit was simulated in SPECTRE achieving an output reference voltage variation of 3.62%, without trimming, over process variation corners with ±10% variation of the 1 V power supply voltage and within the industrial temperature range, from −40 °C to 125 °C. The temperature coefficient from −40 °C to 125 °C is 6.81 ppm/°C at 1 V at the typical process corner. The PSRR at 1 Hz and the output RMS noise within a bandwidth of 100 MHz are −69.85 dB and 279 μV RMS, respectively, at the typical process corner, at a supply voltage of 1 V and temperature of 27 °C. Typical power consumption is 452 μA at 1 V.

Fractional robust PID control of a solar furnace

This paper deals with the fractional control of the temperature in solar furnace plants. As for all the concentrated solar plants, the solar furnace can be modeled as a nonlinear system, where the dynamics strongly depends on the operating temperature. However, to improve the effectiveness of this technology, the control system should guarantee an acceptable performance independently from the operating point. In order to overcome this problem, we propose to use the generalized isodamping technique, where we aim at achieving the invariance of the control loop phase margin with respect to the plant operating point through a properly designed fractional-order proportional-integral-derivative controller. A gain-scheduling algorithm is also introduced to cope with wide plant variations. Simulation and experimental results show the effectiveness of the proposed methodology.

Improved automatic tuning of PID controller for stable processes

This paper presents an improved automatic tuning method for stable processes using a modified relay in the presence of static load disturbances and measurement noise. The modified relay consists of a standard relay in series with a PI controller of unity proportional gain. The integral time constant of the PI controller of the modified relay is chosen so as to ensure a minimum loop phase margin of 30 ∘. A limit cycle is then obtained using the modified relay. Hereafter, the PID controller is designed using the limit cycle output data. The derivative time constant is obtained by maintaining the above mentioned loop phase margin. Minimizing the distance of Nyquist curve of the loop transfer function from the imaginary axis of the complex plane gives the proportional gain. The integral time constant of the PID controller is set equal to the integral time constant of the PI controller of the modified relay. The effectiveness of the proposed technique is verified by simulation results.

Frequency Domain Approach to Computing Loop Phase Margins of Multivariable Systems

The loop phase margins of multivariable control systems are defined as the allowable individual loop phase perturbations within which stability of the closed-loop system is guaranteed. This paper presents a frequency domain approach to accurately computing these phase margins for multivariable systems. With the help of unitary mapping between two complex vector space, the MIMO phase margin problem is converted using the Nyquist stability analysis to the problem of some simple constrained optimization, which is then solved numerically with the Lagrange multiplier and Newton-Raphson iteration algorithm. The proposed approach can provide exact margins and thus improves the linear matrix inequalities (LMI) results reported before, which could be conservative.

Frequency Domain Approach to Computing Loop Phase Margins of Multivariable Systems

The loop phase margins of multivariable control systems are defined as the allowable individual loop phase perturbations within which stability of the closed-loop system is guaranteed. This paper presents a frequency domain approach to accurately computing these phase margins for multivariable systems. With the help of unitary mapping between two complex vector space, the MIMO phase margin problem is converted using the Nyquist stability analysis to the problem of some simple constrained optimization, which is then solved numerically with the Lagrange multiplier and Newton-Raphson iteration algorithm. The proposed approach can provide exact margins and thus improves the LMI results reported before, which could be conservative.

On loop phase margins of multivariable control systems

This paper has two contributions. One is introduction of loop phase margins for multivariable control systems, which extends the concept of phase margin in SISO systems to MIMO systems. The other one is development of an algorithm for computing the loop phase margins. The algorithm is composed of two steps. The first is to find the stabilizing ranges of loop time delay perturbations of the MIMO system using an LMI-based stability criterion derived here. The second is to convert these stabilizing ranges of loop time delays into the stabilizing ranges of loop phases. Two numerical examples are given to illustrate the effectiveness of the proposed approach.

Relay based PI–PD design for stable and unstable FOPDT processes

A simple identification method based on relay feedback test is proposed for stable and unstable first order plus time delay (FOPDT) processes. Initially, a relay in parallel with a proportional controller is applied to an inner feedback controller-stabilized process on the usual manner to induce limit cycle output. From the measurements made on the limit cycle output, two parameters of the FOPDT process model are estimated. The steady state gain of the FOPDT process is assumed to be known a priori. Then, these parameters are used to design a two degree of freedom proportional-integral–proportional-derivative (PI–PD) controller based on the loop phase margin and gain margin criteria. Simulation examples illustrate the effectiveness and the simplicity of the proposed identification and control method.

Analysis of Charge-Pump Phase-Locked Loops

In this paper, we present an exact analysis for third-order charge-pump phase-locked loops using state equations. Both the large-signal lock acquisition process and the small-signal linear tracking behavior are described using this analysis. The nonlinear state equations are linearized for the small-signal condition and the z-domain noise transfer functions are derived. A comparison to some of the existing analysis methods such as the impulse-invariant transformation and s-domain analysis is provided. The effect of the loop parameters and the reference frequency on the loop phase margin and stability is analyzed. The analysis is verified using behavioral simulations in MATLAB and SPECTRE.

Phase-locked loops for plant tuning and monitoring

A loop's phase-margin /spl phi//sub m/ provides helpful information: often it predictably affects damping, and the corresponding frequency /spl omega//sub m/ is related to the closed-loop bandwidth. However, its use in controller design is frequently hampered by lack of knowledge of the plant's transfer-function G(s). Hence, as with the popular autotuning methods, the authors consider a simple algorithm that automatically determines the frequency /spl omega//sub d/ and gain |G(j/spl omega//sub d/)| corresponding to a prescribed plant phase-lag /spl phi//sub d/ as this information can be used simply to tune a PI regulator This adaptive approach is shown to have the structure of a phased-locked loop (PLL). The key ingredient in a PLL is its phase-sensitive detector (PSD), as phase cannot be estimated instantaneously and the deduced value is affected by harmonics and noise. Four common PSDs are compared and it is found that the Hilbert-transform PSD has uniformly effective behaviour. Predictions of the convergence and noise-rejection properties of the algorithm are presented and confirmed via simulation. The same algorithm can be used for loop monitoring, in which plant variations are tracked via on-line estimation of /spl omega//sub d/(t). A benefit of the algorithm is that it enables active probing of a plant by low-amplitude sinewaves, as good tracking is possible even with signal-to-noise ratios much less than one.

Centroid gain compensation in Shack–Hartmann adaptive optics systems with natural or laser guide star

In an adaptive optics system with an undersampled Shack-Hartmann wave-front sensor (WFS), variations in seeing, laser guide star quality, and sodium layer thickness and range distance all combine to vary WFS centroid gain across the pupil during an exposure. While using the minimum of 4 pixels per WFS subaperture improves frame rate and read noise, the WFS centroid gain uncertainty may introduce static aberrations and degrade servo loop phase margin. We present a novel method to estimate and compensate WFS gains of each subaperture individually in real time for both natural and laser guide stars.

Substrate Control of Biotechnical Fedbatch Processes Robustness and the Role of Adaptivity

Results from experiments on laboratory scale fedbatch processes are presented as well as analysis and design of the control system. The main reason for control is to track the drastic growth in feed demand during a cultivation. Variations in the amount and quality of the inocculum makes precalculated dosage schemes of limited value to obtain reproducible cultivation conditions. Two processes have been studied on a laboratory scale, production of bakers’ yeast, and production of the enzyme salicylate hydroxylase using a strain of bacteria. Direct measurement was used to monitor the feed demand. A regulator structure is proposed based on an observer for the exponentially growing feed demand. It can be viewed as a modified PID regulator around a dosage scheme, but it is less sensitive to errors in the dosage scheme than conventional PID control. The a priori knowledge of the feed profile is further relaxed by introduction of adaptation of the growth rate parameter. The obtained non-linear control system has a simple structure and stability is garanteed for a wide range of initial values using the technique of Liapunov function. The linearized system is analysed in the frequency domain and the adaptation is shown to have negligible influence on the loop phase margin. The adaptive regulator is tested in simulation against real feed profiles and shows good results.