Long-channel Metal-oxide-semiconductor Field-effect Transistor Research Articles

Field isolation for GaN MOSFETs on AlGaN/GaN heterostructure with boron ion implantation

We report the investigation of boron ion implantation as a device field isolation process for GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure. In the mesa isolation region of a bar-type MOSFET, a parasitic MOS-channel existed and widened the designed channel width, which would result in an overestimated mobility compared with a ring-type MOSFET. After boron ions implantation in the isolation region, the overestimation of field-effect mobility of bar-type MOSFETs was eliminated. The sub-threshold characteristics and on-state drain current of the bar-type MOSFETs coincide with the ring-type devices. Long-channel ring-type MOSFETs, with and without ion implantation, were fabricated on the recess region to evaluate the sub-threshold characteristics. The MOSFETs with boron ions implanted into the recess region showed a low drain current up to the gate bias of 10V. The result indicated that boron ion implantation prevented the formation of parasitic MOS-channel in the isolation region and achieved field isolation. The current–voltage characteristics of MOSFETs with the normal recess condition demonstrated no degradation of device performance after boron ions implanted into the isolation region. Boron ion implantation by further optimization can be a field isolation method for GaN MOSFETs.

An analytic drain current model for long-channel undoped gate stack surrounding-gate MOSFETs including interface fixed charges

SUMMARY On the basis of the exact solution of Poisson's equation and Pao–Sah double integral for long-channel bulk MOSFETs, a continuous and analytic drain current model for the undoped gate stack (GS) surrounding-gate (SRG) metal–oxide–semiconductor field-effect transistor (MOSFET) including positive or negative interface fixed charges near the drain junction is presented. Considering the effect of the interface fixed charges on the flat-band voltage and the electron mobility, the model, which is expressed with the surface and body center potentials evaluated at the source and drain ends, describes the drain current from linear region to saturation region through a single continuous expression. It is found that the surface and body center potentials are increased/decreased in the case of positive/negative interface fixed charges, respectively, and the positive/negative interface fixed charges can decrease/increase the drain current. The model agrees well with the 3D numerical simulations and can be efficiently used to explore the effects of interface fixed charges on the drain current of the gate stack surrounding-gate MOSFETs of the charge-trapped memory device. Copyright © 2013 John Wiley & Sons, Ltd.

Extraction of the Channel Mobility in InGaZnO TFTs Using Multifrequency Capacitance–Voltage Method

In this letter, we propose a mobility-extraction method using the frequency-independent capacitances extracted from the multifrequency capacitance-voltage method in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). This method does not use the long-channel metal-oxide-semiconductor field-effect transistor (MOSFET) current-voltage ( I-V) model and can include the effect of subgap states on the calculation of the mobility. Considering that the I-V characteristics of the disordered semiconductor transistor do not exactly follow those of the long-channel MOSFET model and the subgap states significantly affect the electrical behavior of the disordered semiconductor transistors, the proposed method is expected to be useful in the extraction of the exact values of the mobilities in disordered semiconductor transistors including a-IGZO TFTs.

Static Performance of 20 A, 1200 V 4H-SiC Power MOSFETs at Temperatures of −187°C to 300°C

Silicon carbide (4H-SiC) power metal–oxide–semiconductor field-effect transistors (MOSFETs) have been attracting tremendous attention for high-power applications at a wide range of operating temperatures, owing to their normally-off characteristics, high-speed switching operation, avalanche capability, and low on-resistance. To optimize performance of 4H-SiC MOSFETs for various applications at different temperatures, it is important to understand the mechanisms of temperature dependence of the key parameters, such as on-resistance, threshold voltage, and metal–oxide–semiconductor (MOS) channel mobility. We report on the temperature dependence of the on-resistance of 20 A, 1200 V 4H-SiC power MOSFETs for temperatures ranging from −187°C to 300°C. The MOSFET showed normally-off characteristics throughout the entire experimental temperature range. Different temperature dependences of the total on-resistance in different temperature regimes have been observed. Due to the poor MOS channel mobility and the low free carrier concentration in the inversion channel of the 4H-SiC MOSFET, the MOS channel resistance is the dominant part of the total on-resistance. This was also found to be true in a 4H-SiC long-channel lateral MOSFET.

Improved Explicit Current–Voltage Model for Long-Channel Undoped Surrounding-Gate Metal Oxide Semiconductor Field Effect Transistor

The surrounding-gate metal oxide semiconductor field effect transistor (MOSFET) provides the best device structure for the control of the short channel effect. In this paper, we present an improved explicit current–voltage (I–V) model for a long-channel undoped surrounding-gate MOSFET. The derivation of this new model considers variations in silicon film radius and gate oxide thickness. For important cases of large silicon film radius and small gate oxide thickness, the new model shows a better agreement with a numerical solution than the previous explicit model. The accuracy of the new model is verified by comparison with numerical simulations.

Gate-length and drain-voltage dependence of thermal drain noise in advanced metal-oxide-semiconductor-field-effect transistors

The high thermal-drain-noise coefficient γ for short-channel metal-oxide-semiconductor-field-effect transistors (MOSFETs) has little to do with hot electrons or velocity saturation, but is determined by the potential gradient along the channel. Consequently, an analytical model for circuit simulation, derived by integration with the surface-potential distribution along the channel, reproduces measured noise characteristics without additional fitting parameters. Furthermore, experimental and theoretical data suggest a fixed relation between the source-drain voltage (Vds) gradients of γ under the saturation condition and the threshold-voltage shift (ΔVth) relative to a long-channel MOSFET.

A Model for the Transient Behaviour of Long-Channel MOSFETs

Initial-boundary value problems modeling the time-dependent behaviour of metal oxide semiconductor field effect transistors (MOSFETs) are considered. The mathematical model is based on the drift-diffusion equations for the transport of charge carriers in a semiconductor. By formal asymptotics, the problem is reduced to a one-dimensional nonlinear diffusion equation. Although this new model containsdegeneracies giving rise to discontinuous solutions, preliminary experiments show that an efficient andreliable numerical solution by standard methods is possible.

Improving the accuracy of the charge-sheet model for the long-channel metal-oxide semiconductor field-effect transistor

It is shown that the accuracy of the charge-sheet model for the long-channel metal-oxide-semiconductor field-effect transistor can be improved by allowing for the small potential drop across the inversion layer, and by using a more accurate analytic approximation for the charge stored in the depletion region.

Subthreshold behavior of uniformly and nonuniformly doped long-channel MOSFET

The subthreshold turnoff behavior of the long-channel MOSFET (metal-oxide-semiconductor field-effect transistor) is characterized by the gate bias swing <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</tex> needed to reduce the subthreshold current one decade. Here a simple formula for S is derived which includes source-to-substrate reverse bias and ion-implanted doping profile effects. For uniformly doped structures it is shown that curves of given <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</tex> can be constructed on an oxide thickness versus doping level plot, making estimates of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</tex> for any choice of these parameters particularly simple. A separate family of curves is needed for each value of source-to-substrate bias V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</inf> . Source-to-substrate reverse bias greatly reduces S in devices with large S values, but cannot reduce S to its theoretical minimum value, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S_{\min} = (kT/q)</tex> ln 10, at reasonable values of V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</inf> . It is found that the effect of nonuniform doping is determined mainly by the dose and centroid of the depleted portion of the excess surface doping, provided buried channels do not occur and provided the implant is not primarily located in the inversion layer itself. Higher doses and deeper implants increase <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</tex> . The maximum value of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</tex> for a given implant dose and source-to-substrate reverse bias occurs for that range of implantation which places the implant near the depletion edge. Consequently, the use of implants in small MOSFET's to control threshold punchthrough and parasitic capacitances will cause turnoff degradation.

A charge-sheet model of the MOSFET

Intuition, device evolution, and even efficient computation require simple MOSFET (metal-oxide-semiconductor field-effect transistor) models. Among these simple models are charge-sheet models which compress the inversion layer into a conducting plane of zero thickness. It is the purpose of this paper to test one such charge sheet model to see whether this approximation is too severe. This particular model includes diffusion which is expected to be important in the subthreshold and saturation regions. As a test the charge sheet model is applied to long-channel devices. Long-channel MOSFET behavior has been thoroughly studied, and is very well explained by the Pao-Sah double-integral formula for the current. Hence, a clear-cut test is a comparison of the charge sheet model with the Pao-Sah model. We find the charge sheet model has two advantages over the Pao-Sah model. (1) It leads to a very simple algebraic formula for the current of long-channel devices. The same formula applies in all regimes from subthreshold to saturation. Neither splicing nor parameter changes are needed. No discontinuities occur in either the current or the small-signal parameters, or in the derivatives of the small-signal parameters. (2) It is simpler to extend the charge sheet model to two or three dimensions than the Pao-Sah model. This simplification is a result of dropping the details of the inversion layer charge distribution. An important aspect of the gradual channel approximation is brought out by the analysis. Suppose the boundary condition relating the quasi-fermi level at the drain, φ fL , to that at the source, φ fo , namely φ ƒL=φ ƒ0+V D where V D is the drain voltage, is applied in all bias regimes. Then it is shown that this means the potential at the drain end of the channel, φ sL is not related to the potential at the source end of the channel, φ so , by φ sL=φ s0+V D Instead, φ sL is computed, not imposed as a boundary condition. It is suggested that this failure of the potential to satisfy the boundary condition at the drain is justifiable. That is, φ sL should be reinterpreted as the potential at the point in the channel where the gradual channel approximation fails. Hence, (2) may be relaxed. However, the “channel length” in the gradual-channel approximation now becomes a fitting parameter and is not the metallurgical source-to-drain separation. In addition several aspects of the long-channel MOSFET are brought out: (1) Pinch-off is achieved only asymptotically as the drain voltage tends to infinity. This is in marked contrast to the often-stated, textbook view that pinch-off is achieved for some finite drain voltage, the saturation voltage. (2) The channel or drain conductance approaches zero only asymptotically. (3) The transconductance saturates only asymptotically. Figures comparing the simple charge-sheet model formulas with the usual textbook formulas are included for direct-current vs drain voltage, channel conductance vs drain voltage, and transconductance vs drain voltage. The charge-sheet model agrees with the original Pao-Sah double-integral formula for the current at all gate and drain voltages, and possesses the correct subthreshold behavior. The textbook formulas do not.