Local Oscillator Chain Research Articles

A Four-Channel Bidirectional D-Band Phased-Array Transceiver for 200 Gb/s 6G Wireless Communications in a 130-nm BiCMOS Technology

This article demonstrates a fully integrated broadband four-channel phased array transceiver, capable of wireless data rates up to 200 Gb/s covering the entire <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$D$</tex-math> </inline-formula> -band (110–170 GHz). The circuit is developed in a 130-nm SiGe BiCMOS technology, featuring ft/ fmax of 300/500 GHz, and includes localized back-side etching-based ON-chip patch antennas. In both transmit and receive modes, direct up-and down-conversions are performed by in-phase and quadrature mixers driven by a multiplier-by-four local oscillator chain. A bidirectional true time delay circuit, with a resolution of 0.446 ps, which is equivalent to the accuracy of a 4-bit phase shifter, provides the squint-free beam-steering capability. Beam-steering measurements show how the beam can be steered from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 45 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{\circ}$</tex-math> </inline-formula> to 45 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{\circ}$</tex-math> </inline-formula> in a 7 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{\circ}$</tex-math> </inline-formula> step. The transceiver achieves a 3-dB baseband bandwidth of 30 and 27 GHz in the transmit and receive modes, respectively. A wireless link demonstration is performed by mounting two chips on printed circuit boards, one in the transmit and one in the receive mode, together with plastic lenses on both sides, at a distance of 15 cm. Hardware-in-the-loop measurements show record data rates of 180 Gb/s with EVM of 12.2% using 16-QAM and 200 Gb/s with 8.3% EVM using 32-QAM. The four-channel transceiver consumes 1.95 and 2.5 W in the receive and transmit modes, respectively, which correspond to power efficiencies of 9.75 pJ/bit in the receiver mode and 12.5 pJ/bit in the transmitter mode.

A 39 GHz Dual-Channel Transceiver Chipset with an Advanced LTCC Package for 5G Multi-Beam MIMO Systems

A 39-GHz dual-channel CMOS transceiver chipset with an advanced LTCC packaging and the demonstration of a proposed dynamic multi-beam architecture based on the chipset for 5G MIMO applications. This article presents a 39 GHz transceiver front-end chipset for 5G multi-input multi-output (MIMO) applications. Each chip includes two variable-gain frequency-conversion channels and can support two simultaneous independent beams, and the chips also integrate a local-oscillator chain and digital module for multi-chip extension and gain-state control. To improve the radio-frequency performance, several circuit-level improvement techniques are proposed for the key building blocks in the front-end system. Furthermore, an advanced low-temperature co-fired ceramic process is developed to package the 39 GHz dual-channel transceiver chipset, and it achieves low packaging loss and high isolation between the two transmitting (TX)/receiving (RX) channels. Both the chip-level and system-in-package (SIP)-level measurements are conducted to demonstrate the performance of the transceiver chipset. The measurement characteristics show that the TX SIP provides 11 dB maximum gain and 10 dBm saturated output power, while the RX SIP achieves 52 dB maximum gain, 5.4 dB noise figure, and 7.2 dBm output 1 dB compression point. Single-channel communication link testing of the transceiver exhibits an error vector magnitude (EVM) of 3.72% and a spectral efficiency of 3.25 bit·s −1 ·Hz −1 for 64-quadrature amplitude modulation (QAM) modulation and an EVM of 3.76% and spectral efficiency of 3.9 bit·s −1 ·Hz −1 for 256-QAM modulation over a 1 m distance. Based on the chipset, a 39 GHz multi-beam prototype is also developed to perform the MIMO operation for 5G millimetre wave applications. The over-the-air communication link for one- and two-stream transmission indicates that the multi-beam prototype can cover a 5–150 m distance with comparable throughput.

A 66-76 GHz Wide Dynamic Range GaAs Transceiver for Channel Emulator Application.

In this study, we developed a single-channel channel emulator module with an operating frequency covering 66–67 GHz, including a 66–76 GHz wide dynamic range monolithic integrated circuit designed based on 0.1 µm pHEMT GaAs process, a printed circuit board (PCB) power supply bias network, and low-loss ridge microstrip line to WR12 (60–90 GHz) waveguide transition structure. Benefiting from the on-chip multistage band-pass filter integrated at the local oscillator (LO) and radio frequency (RF) ends, the module’s spurious components at the RF port were greatly suppressed, making the module’s output power dynamic range over 50 dB. Due to the frequency-selective filter integrated in the LO chain, each clutter suppression in the LO chain exceeds 40 dBc. Up and down conversion loss of the module is better than 14 dB over the 66–67 GHz band, the measured IF input P1 dB is better than 10 dBm, and the module consumes 129 mA from a 5 V low dropout supply. A low-loss ridged waveguide ladder transition was designed (less than 0.4 dB) so that the output interface of the module is a WR12 waveguide interface, which is convenient for direct connection with an instrument with E-band (60–90 GHz) waveguide interface.

Wide Tuning-range LO Chain with a Hybrid Inductor for LTE and SAW-less GSM Transceiver

A low phase noise, multi-standard local oscillator (LO) chain for LTE and GSM is presented. The LO chain is composed of a dynamic divider and a CMOS VCO with a hybrid inductor using both bondwire and a planar spiral inductor in the same area. This approach improves both tuning range and phase noise characteristics without additional area loss. Based on this concept, the LO chain with a hybrid inductor VCO is implemented in a 65nm CMOS process. The measured performance satisfies wide tunability and most stringent GSM transmitter phase noise specification, which proves that the LO chain can be used for LTE and SAW-less GSM transceiver.

LO Chain (×12) Integrated 190-GHz Low-Power SiGe Receiver With 49-dB Conversion Gain and 171-mW DC Power Consumption

A 190-GHz mixer-based down-conversion receiver realized in a 130-nm SiGe BiCMOS technology featuring high-speed heterojunction bipolar transistors (HBTs) with ( $f_{\text {T}}$ , $f_{\text {max}}$ ) = (300, 500) GHz is presented. The core part of the receiver consists of a low-noise amplifier (LNA), an active tunable fundamental mixer, an intermediate frequency (IF) buffer amplifier (BA), and an active inverse balun. A wideband, high conversion gain (CG) local oscillator (LO) chain is integrated to make the receiver suitable for applications requiring tunable LO, which contains a multiplier with a multiplication factor of 12 ( $\times 12$ ) and a driver amplifier. To exploit the best possible performance with ultralow dc power consumption ( $P_{\text {dc}}$ ), the mixer and LNA transistors operate at forward-biased base–collector junction voltage ( $V_{\text {BC}}$ ). With a fixed IF frequency at 1 GHz, this receiver exhibits a peak CG of 49 dB with a 14-dB tuning range and a minimum single-sideband noise figure (NF) of 16.5 dB, consuming only 29-mW static dc power for the core part and 171 mW overall, including the LO chain. Within the CG tuning range, this receiver achieves a 6-dB RF bandwidth (BW) from 25 to 32 GHz. Compared with previously reported receivers at similar frequencies, the highest CG and the lowest $P_{\text {dc}}$ with highly competitive performance in terms of BW, CG tuning range, 1-dB output compression point, and NF have been achieved.

A Low-Power 255-GHz Single-Stage Frequency Quadrupler in 130-nm SiGe BiCMOS

A frequency quadrupler for the up-conversion of a 63.75-GHz signal to an output frequency of 255 and 12.7 GHz of bandwidth for use in a local oscillator chain is presented. The presented circuit extends the common push–push architecture to a single-stage frequency quadrupler and improves upon existing designs concerning frequency of operation and conversion core efficiency. By replacing the usual $2\times 2$ architectures with the presented solution, the total dc power consumption can be reduced by over 75% with respect to state-of-the-art designs, while maintaining useful output power levels. To showcase the performance of the core, the design abstains from any buffers at the input or output. Consuming 22.4 mW the circuit produces −8.4 dBm of output power. Excluding the losses in the passive input network, the circuit achieves a conversion loss of 4.4 dB. The fundamental suppression is higher than 40 dB.

480-GHz Sensor With Subharmonic Mixer and Integrated Transducer in a 130-nm SiGe BiCMOS Technology

A 480-GHz sensor consists of signal stimulus and the transducer element as well as a subharmonic mixer in a 130-nm SiGe BiCMOS technology is reported. It features a mixer-first architecture based on down-conversion subharmonic mixer, an local oscillator (LO) chain at 240-GHz using a frequency doubler with variable-gain characterization, and a 480-GHz RF chain, making the fully integrated 480-GHz receiver possible. In a frequency range of 210-270 GHz at a maximum of 1.5-V supply offset, the LO chain has a 14-dB power-level variation, comprising with a 120-GHz frequency quadrupler, a power amplifier, and a variable frequency doubler. The proposed subharmonic receiver is driven by the RF and LO chain with a multiplier factor of 16 and 8, respectively. In this way, 480-GHz signal is generated, fed through the transducer, and hetero-mixed at subharmonic mixer. The measured output power difference is adjustable over 8 dB. Along with the intermediate frequency (IF) bandwidth of 20 GHz, the wide RF bandwidth makes it suitable for submillimetre-wave receiver-based dielectric spectroscopy applications. The chip occupies an area of 2.2 mm 2 and consumes 290 mW.

Frequency Multiplier and Mixer MMICs Based on a Metamorphic HEMT Technology Including Schottky Diodes

This paper reports on the monolithic integration of layout-optimized Schottky diodes realized in an established 50-nm gate-length metamorphic high-electron-mobility transistor technology for use in multifunctional nonlinear circuits. The suitability of the realized Schottky diodes is demonstrated by a broadband millimeter-wave I/Q-mixer (In-phase/Quadrature) and local oscillator (LO) chain comprising two power amplifiers and a frequency tripler, fabricated on monolithic microwave integrated circuits (MMICs). Both circuits are based on an anti-parallel Schottky diode topology. The subharmonically-pumped I/Q-mixer covers an RF (radio frequency) and IF (intermediate frequency) range of at least 75 GHz to 110 GHz and 0.5 GHz to 15 GHz, respectively. The single-sideband conversion loss is between 14 dB and 16 dB across most of the entire RF and IF bands. The core of the LO chain consists of a frequency tripler (multiplier by three) and features a bias-adjustable output power with almost constant conversion efficiency and a control range of more than 8 dB. The fully-integrated LO chain MMIC matches the needs of the presented I/Q-mixer and exhibits an average output power of 16.3 dBm with a covered frequency range of 38 GHz to 60 GHz. The unwanted harmonics are suppressed by at least -25.9 dBc below the third harmonic for the entire frequency range and better than -32.1 dBc for most part of the band. Thus, the mixer and tripler MMICs demonstrate state-of-the-art performance with regards to, e.g., covered bandwidth, output power, harmonic suppression, or 1 dB compression point.

A G-Band 2-Pixel Heterodyne Receiver with Integrated Local Oscillator Chain

A 2-pixel heterodyne receiver working in the 173–205-GHz band is presented in this paper. This receiver prototype is mainly composed of two balanced Schottky-based quadrature mixers and an integrated local oscillator (LO) chain. Based on sub-harmonically pumped mixing and quadrature coupling schemes, the proposed receiver operates in double sideband (DSB) mode or single sideband (SSB) mode. With combination of an external intermediate frequency (IF) 3-dB quadrature hybrid, the receiver can furtherly operate in sideband separation (2SB) mode. E-plane Riblet short-slot couplers combined with probe transitions are firstly employed in the radio frequency (RF) and LO path to realize quadrature configuration simultaneously; detailed theoretical derivation on 2SB operation is also given. The 2-pixel receiver is fabricated and tested, the measured SSB conversion loss of each channel achieves 12–20 dB when pumped with 18 dBm of input power at Ku-band, and the imbalance of conversion loss is less than 2 dB between all the IF ports. The typical sideband rejection ratio (SRR) is 12–16 dB over the operation frequency band. The corresponding achievements are valuable in the follow-up focal plane array detection system.

A 2–18 GHz Compressed Sensing Receiver With Broadband LO Chain in 0.13-$\mu$ m BiCMOS

We present an integrated 2–18 GHz four-channel compressed sensing receiver (CSRX), which performs a $128.5\times $ sub-Nyquist acquisition with 36-Gb/s pseudorandom bit sequence (PRBS) generators in 0.13- $\mu \text{m}$ BiCMOS. The integrated four-channel CSRX consists of broadband receiver chains, each of which includes a distributed RF buffer that operates as an active balun at 2–18 GHz, followed by a double-balanced passive mixer for high local-oscillator (LO)-to-intermediate frequency (IF) isolation at the IF band, and a 700-MHz variable gain amplifier (VGA). Four independent 36-Gb/s PRBS generators are integrated to perform the compressed sensing by mixing the PRBS signal as the random modulator. To deliver the generated wideband PRBS signal to the mixer, the LO driver conducts band-equalization by applying a shunt-shunt feedback amplifier to compensate for the high-frequency degradation of the PRBS LO tones through the LO generation stage. The chip consumes 195 mA per channel with a 2.5-V supply.

Low noise 874 GHz receivers for the International Submillimetre Airborne Radiometer (ISMAR).

We report on the development of two 874 GHz receiver channels with orthogonal polarizations for the International Submillimetre Airborne Radiometer. A spline horn antenna and dielectric lens, a Schottky diode mixer circuit, and an intermediate frequency (IF) low noise amplifier circuit were integrated in the same metallic split block housing. This resulted in a receiver mean double sideband (DSB) noise temperature of 3300 K (minimum 2770 K, maximum 3400 K), achieved at an operation temperature of 40 °C and across a 10 GHz wide IF band. A minimum DSB noise temperature of 2260 K at 20 °C was measured without the lens. Three different dielectric lens materials were tested and compared with respect to the radiation pattern and noise temperature. All three lenses were compliant in terms of radiation pattern, but one of the materials led to a reduction in noise temperature of approximately 200 K compared to the others. The loss in this lens was estimated to be 0.42 dB. The local oscillator chains have a power consumption of 24 W and consist of custom-designed Schottky diode quadruplers (5% power efficiency in operation, 8%-9% peak), commercial heterostructure barrier varactor (HBV) triplers, and power amplifiers that are pumped by using a common dielectric resonator oscillator at 36.43 GHz. Measurements of the radiation pattern showed a symmetric main beam lobe with full width half maximum <5° and side lobe levels below -20 dB. Return loss of a prototype of the spline horn and lens was measured using a network analyzer and frequency extenders to 750-1100 GHz. Time-domain analysis of the reflection coefficients shows that the reflections are below -25 dB and are dominated by the external waveguide interface.

A compact 220 GHz heterodyne receiver module with planar Schottky diodes

This letter presents the development of a compact 220 GHz heterodyne receiver module for radars application in which a novel low pass wide stop band intermediate frequency (IF) filter is integrated. The planar Schottky anti-parallel mixing diode based subharmonic mixer (SHM) is used as the receiver’s first stage. The diode is flip-chip mounted on a 50 μm thick quartz substrate. The accurate modeling of the self and mutual inductance of the diode’s air-bridges are discussed. The measured conversion loss (CL) of the SHM has a minimum value of 6.2 dB at 210.5 GHz, and is lower than 8.4 dB in the frequency range 209.4–219.6 GHz with a 10 mW input power from a local oscillator (LO). The LO chain consists of a 110 GHz passive tripler, two Ka-band amplifiers and a Ka-band active tripler. The tested minimum double side band (DSB) noise temperature of the integrated 220 GHz heterodyne receiver is 725 K at 205.2 GHz and lower than 1550 K in the frequency range 199–226 GHz.

A 76- to 81-GHz Multi-Channel Radar Transceiver

This paper presents a packaged 76- to 81-GHz transceiver chip implemented in SiGe BiCMOS for both long-range and short-range automotive radars. The chip contains a two-channel transmitter (TX), a six-channel receiver (RX), a local-oscillator (LO) chain, and built-in self-test (BIST) circuitry. Each transmit channel includes multiple variable-gain amplifiers and a two-stage power amplifier. Measured on-die output power per channel is +18 dBm at 25 °C, decreasing to +16 dBm at 125 °C. Each receive channel includes a current-mode mixer, followed by intermediate-frequency buffers. At 25 °C, measured on-die noise figure is 10–11 dB, conversion gain is 14–15 dB, and input 1-dB compression point exceeds +1 dBm. An integrated LO chain drives the transmit and receive chains and includes an 18.5- to 20.6-GHz voltage-controlled oscillator connected to cascaded frequency doublers and a divide-by-four prescaler. At 25 °C, measured phase noise is −100 dBc/Hz at 1-MHz offset from a 77-GHz carrier. Integrated BIST circuits enable the measurement of signal power, RX gain, channel-to-channel phase, and internal temperature. The chip is flip-chip packaged into a ball-grid array and extracted interconnect loss for the package is 1.5 to 2 dB. Total power consumption for the chip is 1.8 W from 3.3 V for a single-TX, six-RX mode.

A High-Power G-band Schottky Local Oscillator Chain for Submillimeter Wave Heterodyne Detection

Local oscillator (LO) sources with sufficient output power are indispensable modules in submillimeter wave heterodyne detectors. In this work, we report on the design and characterization of a ×6×2 frequency multiplier chain that covers 176-196 GHz band. The LO chain mainly includes a W-band active times-6 frequency multiplier, a commercial W-band isolator, a W-band power module, a W-band band-pass filter (BPF) and a varactor-based G-band power-combined frequency doubler. First of all, design and performance of the W-band sextupler (×6), power module and BPF are briefly introduced. This is followed by a detailed description of the G-band frequency doubler as the key content. The final stage doubler employs two 50 μm thick quartz circuits and two commercially available varactor diodes. A circuit scheme named power-combining frequency multiplication is used for the doubler design. This circuit scheme is able to double the power handling capability of the frequency multiplier compared to the un-combined one. Therefore, the final stage doubler can fully make use of the driving power delivered by the power module to increase the output power. Each module is fabricated and assembled, and the discrete modules and the cascaded chain are measured, respectively. At room temperature, when pumped with 0 dBm at Ku-band, the LO chain produces at least 12.5 dBm in the 172-196 GHz band with a measured peak power of 16 dBm at 178 GHz. This power level is sufficient to pump a 0.36 THz heterodyne detector and makes it possible to deploy multi-pixel heterodyne imaging arrays in this frequency range.

Design and implemention of very compact band‐stop filter with petal‐shaped stub for radar applications

AbstractIn this article, we introduce a compact microstrip band stop filter (BSF) at X‐band frequency range and this shall be used in local oscillator chain for X‐band transceiver. Presented microstrip filter consists of a transmission line with a petal‐shaped stub and a ground plane with a modified rectangular‐shaped defected ground structure (DGS). Operation frequencies of the filter can be easily controlled by changing four protruded T‐shaped strips in the petal‐shaped structure. The DGS slot evolved from photonic band gap (PBG) is embedded to achieve a good impedance matching and the required filter's characteristics. The proposed band‐stop filter has wide bandwidth from 8–12 GHz for X‐band Communications that can be used in Radar applications. Good agreement between simulated and measured results cause that excellent stop‐band performance could be obtained through the X‐band frequency range. The proposed microstrip filter fabricated on a Rogers RT/Duroid 5880 substrate with a relative dielectric constant of 2.2 and has a very small size of 10 × 15 mm2. © 2013 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:1130–1132, 2013; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27518

Physics-Based Design and Optimization of Schottky Diode Frequency Multipliers for Terahertz Applications

Planar Schottky diode frequency multipliers are by far the most employed devices for local oscillator (LO) power generation at terahertz frequencies. In order to push up to the limit the available LO power at terahertz frequencies, the use of accurate physics-based simulation tools is highly necessary to develop multiplier circuits with the highest performance. This paper investigates the potential capabilities of Schottky multipliers for LO power generation up to 2.4 THz by means of an in-house computer-aided design tool that combines harmonic balance techniques with an accurate physics-based numerical model of the semiconductor device. According to numerical simulation results, a 32-μW LO power could be theoretically achieved with a 2.4-THz LO chain at room temperature from a 150-mW W-band solid-state LO source. This demonstrates that there is still a broad margin for the improvement of state-of-the-art terahertz LO power sources.

Local oscillator chain for 1.55 to 1.75THz with 100-/spl mu/W peak power

We report on the design and performance of a fix-tuned /spl times/2/spl times/3/spl times/3 frequency multiplier chain that covers 1.55-1.75THz. The chain is nominally pumped with 100mW at W-band. At 120K the measured output power is larger than 4/spl mu/W across the band with a peak power of 100/spl mu/W at 1.665THz. A similar chain operated at room temperature produced a peak power of 21/spl mu/W. These power levels now make it possible to deploy multipixel heterodyne imaging arrays in this frequency range.

The application of semiconductors in a 860 mc radio receiver

An all solid state, FM radio receiver operating at 860 mc is described. The active elements used are transistors and variable reactance diodes. The receiver is of the double conversion type with IF frequencies at 63 and 10.7 mc. The first local oscillator chain uses four stages to generate a signal at 923 mc. The crystal controlled oscillator and two frequency doublers use diffused base transistors. The output of the second doubler, at a frequency of approximately 300 mc, is then tripled in a circuit employing a varactor diode in order to obtain the desired local oscillator signal. The receiver has a 6 db bandwidth of 30 kc. If the output is equalized for a phase modulated signal, 10 db of noise quieting is obtained with a 0.8 microvolt input signal.