Load-pull System Research Articles

A Time-Domain Multi-Tone Distortion Model for Effective Design of High Power Amplifiers

This paper proposes a new time-domain multi-tone distortion (TD-MTD) model suitable for accurately predicting the non-linear behavior of packaged high power radio frequency (RF) transistors over a range of discrete non-uniformly distributed frequencies. This proposed TD-MTD model uses a single expression rather than multiple distinct frequency specific behavioral models to describe the underlying behavior of the high power RF transistor at multiple fundamental frequencies. Furthermore its extraction is carried out using a time-domain representation of the travelling waves that can be acquired using a generic vector load-pull characterization system and without imposing additional requirements. The proposed model is extracted as an artificial neural network (ANN) and is implemented as a Netlist to serve in a harmonic balance simulator based power amplifier design process. The proposed model is validated in two phases. First, its ability to reproduce the large-signal behavior of a high power RF LDMOS transistor was demonstrated in simulation. Then, the TD-MTD model was used to validate the design of a high power two-way asymmetric Doherty power amplifier and the simulated output-power-dependent power efficiency, AM/AM, AM/PM and input return loss characteristics were compared to those obtained in measurement. The excellent agreement between the simulation and measurement results confirms the usefulness of the proposed model despite the simplicity of its extraction routine and measurement data.

High Output Power Density of 2DHG Diamond MOSFETs With Thick ALD-Al2O3

This article reports on the high operation voltage large-signal performance of two-dimensional hole gas diamond metal-oxide semiconductor field-effect transistors (MOSFETs) with thick atomic-layer-deposition (ALD)-Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> formed on high purity polycrystalline diamond with a (110) preferential orientation. MOSFETs with a 1- μm gate-length having a gate oxide layer of 200-nm-thick Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> , formed by ALD and asymmetric structures, to withstand high-voltage operations. The large-signal performances were evaluated at a quiescent drain voltage of greater than -60 V for the first time in diamond field-effect transistor (FET). As a result, an output power density of 2.5 W/mm under class-A operation at 1 GHz, which is higher than that of diamond FETs fabricated by a self-aligned gate process, was obtained. Moreover, an output power density of 1.5 W/mm was exhibited by the MOSFET when biased at a quiescent drain voltage of -40 V under class-AB operation at 3.6 GHz using an active load-pull system. This is the highest recorded value for diamond FETs at a frequency greater than 2 GHz, owing to the high-voltage operation. These results indicate that diamond p-FETs under high-voltage operations are the most suitable for high-power amplifiers with complementary circuits.

New Transistor Behavioral Model Formulation Suitable for Doherty PA Design

This work presents a new artificial neural network (ANN) model formulation for RF high-power transistors which includes the S-parameters of the active device. This improves the small-signal extrapolation capability, and the OFF-state impedance approximation, making it suitable for Doherty power amplifier (DPA) design. This extrapolation capability plays a key role in the correct Doherty load modulation prediction, since, at low power levels, the peaking PA is subjected to active loads that cannot be synthetized with a passive load-pull system, forcing the model to extrapolate. Thus, the proposed model formulation is able to solve the issues that are normally observed when ANN-based models are used in complex PA architectures as the Doherty PA. To validate the proposed behavioral model, a 700-W asymmetrical LDMOS DPA, centered at 1.84 GHz, was simulated and measured.

On different load configurations for mixed-mode load-pull measurements, hybrid imperfections, and tuning ranges

AbstractEach of the various methods for mixed-mode load-pull measurements, which can be found in literature, has its own advantages and disadvantages. In this publication, we analyze two of the most commonly used setups and a third setup of which we provided an initial treatment in a previous publication. We investigated the impact of 180° hybrids on the tuning capabilities of a mixed-mode load-pull system. Furthermore, we provide a rule-of-thumb to easily estimate this impact using only some specifications of hybrids. For all analyzed setups, we use measurement results to show that the tuning range of the newly proposed setup is superior compared to the other setups, though hardware effort and tuning complexity are greater.

Envelope emulation

Researchers from the UK present a novel characterisation system that is capable of emulating a complete envelope tracking power amplifier (ET-PA) environment around a microwave power transistor. The system achieves this by using modulated impedance synthesis and a dynamic supply voltage generation, as well as industry-standard modulated signals and digital pre-distortion. The authors believe that the system will be of use to designers of ET-PAs, allowing more complete investigation of the performance of ET-PAs in realistic modulated and load impedance conditions. As communication systems evolve to transmit ever-larger volumes of data, including the ongoing roll-out of 5G worldwide, we will need to develop more advanced modulation schemes to satisfy the rampant growth and to improve spectral efficiency. Whilst new modulation schemes offer higher data throughput levels, they are characterised by high peak-to-average power ratios (PAPRs). Power amplifiers (PA) are the major power consumer in mobile communication systems, and thus several power amplifier architectures have been proposed to improve average PA efficiency, including the Doherty PA and envelope tracking (ET). Authors (right to left) Sattam Alsahali, Alexander Alex,Dr. Jonathan Lees and Dr. Peng Chen. Set-up of the present work. Average PAE for 28 V fixed bias (blue solid contours) and for ET (green dotted contours). ET works by rapidly changing the supply voltage of the PA in response to the input signal, providing low supply voltage for low powers and vice versa. Whilst ET presents itself as a strong candidate for a wide range of applications due to its potential to support both multimode and multiband operations, the design of the ET-PA presents an array of challenges relating to optimisation of and interaction between involved sub-systems, in particular the radiofrequency (RF) potential of the ET-PA. Characterising the performance of a radiofrequency power amplifier (RFPA) and optimising its performance as early as possible within the ET environment is highly desirable. Load-pull, the colloquial term for the process of systematically varying impedance presented to a device under test, is a robust approach commonly utilised at the beginning of the design phase of an RFPA to characterise the device's performance at fundamental and harmonic frequencies, typically in terms of output power, efficiency, gain and linearity. The work presented by Alsahali et al. is the first work that combines a fast, modulated load-pull system (known as the Mesuro RAPID system) and digital pre-distortion, producing a powerful ET characterisation bench. Achieving this ET characterisation bench wasn't easy, the team had to combine and synchronise a number of different systems. In particular, the efficiency measurement and the time alignment between the RF signal and the tracking signal were especially challenging to characterise. Despite the challenges, the team's Letter shows that they ultimately succeeded in pulling together myriad subsystems to produce a highly useful package. The authors hope that their proposed system will be useful for the future design of ET-PAs by providing a powerful emulation tool. This first example only allows for fundamental load pull, in order to fully investigate the potential of the new measurement architecture, the ability to incorporate harmonics, specifically the 2nd and 3rd harmonics (significant in realising highly efficient PA modes of operation), will be highly beneficial. In addition, it was found that the modulation bandwidth of the Mesuro RAPID load-pull system is limited to 40 MHz. A 5G system will require at least 100 MHz to fully characterise the nonlinearity of RFPAs, which requires at least five times the modulation bandwidth. The group has already begun working on these bandwidth enhancements - watch this (ever expanding) space.

Direct ${E}$ -Field Measurement and Imaging of Oscillations Within Power Amplifiers

We present, for the first time, a measurement system that is capable of directly detecting and identifying the physical location of an oscillation within radio frequency (RF) and microwave power amplifiers (PAs). The method uses a combined external electrooptic, nonlinear vector network analyzer, and vector load-pull measurement system, which allows the measurement of cross-frequency phase-coherent multiharmonic vector electric fields ( ${E}$ -fields) above the transistor with an 8- $\mu \text{m}$ spatial resolution and 20 MHz–40 GHz bandwidth. Raster scans above the amplifier allow the time-domain ${E}$ -fields to be animated and superimposed on top of the amplifier image, enabling immediate identification of any oscillations by direct inspection. The method is first demonstrated on a low-power PA composed of two parallel 0.1-W pseudomorphic high electron mobility transistors that is intentionally designed to have an odd-mode oscillation. The applicability of the method is further demonstrated by measuring and animating in-package parametric odd-mode oscillations within a 260-W laterally diffused metal–oxide–semiconductor transistor operating at 2.2 GHz under pulsed RF conditions with 10- $\mu \text{s}$ pulses and 10% duty cycle. The measurement and identification technique are applicable to all semiconductor devices as the external ${E}$ -field is noninvasively measured above the amplifier.

3.8 W/mm RF Power Density for ALD Al2O3-Based Two-Dimensional Hole Gas Diamond MOSFET Operating at Saturation Velocity

This letter reports the small-signal and large-signal performances at high drain voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> ) ranging up to 60 V for a 0.5 μm gate length two-dimensional hole gas diamond metal-oxide-semiconductor field-effect transistor with a 100-nm-thick atomic-layer-deposited Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> film on a IIa-type polycrystalline diamond substrate with (110) preferential surfaces. This diamond FET demonstrated a cutoff frequency (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> ) of 31 GHz, indicating that its carrier velocity was reaching 1.0 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> cm/s for the first time in diamond. In addition, a f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> of 24 GHz was obtained at V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> = -60 V, thus giving a f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> × V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> product of 1.44 THz·V. This diamond FET is promising for use as a high-frequency transistor under high voltage conditions. Under application of a high voltage, a maximum output power density of 3.8 W/mm (the highest in diamond) with an associated gain and power added efficiency were 11.6 dB and 23.1% was obtained when biased at V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> = -50 V using a load-pull system at 1 GHz.

Load-pull measurement analysis of AlGaN/GaN HEMT taking into account number of gate fingers**Project supported by the National Natural Science Foundation of China (No. 61204086).

This paper investigates load-pull measurement of AlGaN/GaN high electron mobility transistors (HEMTs) at different numbers of gate fingers. Scalable small-signal models are extracted to analyze the relationship between each model's parameters and the number of device's gate fingers. The simulated S-parameters from the small-signal models are compared with the reflection coefficients measured from the load-pull measurement system at X-band frequencies of 8.8 and 10.4 GHz. The dependency between the number of device's gate fingers and load-pull characterization is presented.

(Invited) Reliability and Pulsed I-V Analysis of Vertically-Scaled GaN MIS-Hemts

GaN solid-state power amplifiers are becoming more frequently utilized in RF applications due to their significant power density advantages over conventional III-V semiconductor materials. Development of the core transistor technology, GaN high-electron-mobility transistors (HEMTs), has been the research focus of numerous groups around the globe. One of the most recent thrusts in the community has been to extend the frequency performance of GaN HEMTs to the millimeter wavelength (MMW) range of 30 – 300 GHz. To obtain power gain at these frequencies, device and heterostructure dimensions must be scaled down to minimize electron transit delay. However, this scaling raises the peak electric fields in the device to extremely high levels and often limits the operational voltage range due to excessive leakage current related breakdown. Historical solutions for managing peak electric fields, such as the use of source-connected field plates in microwave HEMTs, are generally avoided due to the excessive parasitic capacitance introduced. Without field-plate management of peak fields, a critical question that remains to be answered is how to achieve reliable high power operation in a MMW GaN device. In our laboratory we have been exploring methods to simultaneously achieve high power gain at MMW frequencies along with high breakdown voltage [1, 2]. This talk will discuss an initial study that has investigated the effect of SiN gate insulator thickness on MMW GaN HEMT reliability. As illustrated in Fig. 1, the heterostructure used in this work consists of an ultra-thin 2.3 nm In0.17Al0.83N / 1 nm AlN barrier, GaN channel and buffer layers grown on SiC by metalorganic chemical vapor deposition. After heterostructure growth, molecular beam epitaxy was used to deposit 1, 3, 5, or 6 nm of SiN gate insulator at 575 °C. Metal-insulator-semiconductor (MIS) HEMTs with 120 nm gate length were then fabricated using standard processing procedures described previously [2]. For the 5 nm SiN sample, an SF6 plasma recess etch was performed prior to gate metallization, creating a Schottky gate variant as a reference device. After initial dc, pulsed, and RF electrical testing, devices from each sample were biased in class AB at VDS = 20 V on a Maury on-wafer load-pull system that had been tuned to achieve maximum output power. To perform RF operation life testing (RFOL), large signal input power at 40 GHz was set to achieve peak power-added-efficiency while output power (Pout) and drain current were monitored as a function of time. Fig. 2 shows the change in Pout over time for pairs of samples with different gate insulator thickness. Interestingly, samples with thicker SiN showed less degradation in Pout relative to initial values. The dc characteristics of the 6 nm SiN sample before and after stress are shown in Fig. 3. This talk will discuss the measured results and implications for future MMW GaN HEMT design. Acknowledgements: The authors thank N. Green for his assistance with device fabrication. This work was supported by the Office of Naval Research (P. Maki).

A $W$-Band On-Wafer Active Load–Pull System Based on Down-Conversion Techniques

A new W-band active load-pull system is presented. It is the first load-pull system to implement a 94 GHz load by means of an active loop exploiting frequency conversion techniques. The active loop configuration demonstrates a number of advantages that overcome the typical limitations of W-band passive tuners or conventional active open-loop techniques in a cost-effective way: load reflection coefficients Γ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> as high as 0.95 in magnitude can be achieved at 94 GHz, thus providing a nearly full coverage of the Smith chart. Possible applications of the setup include technology assessment, large-signal device model verification at sub-terahertz frequencies, and W-band monolithic microwave integrated circuit design and characterization. The availability of direct and accurate load-pull measurements at W-band should prove an asset in the development of sub-terahertz integrated circuits. First measurements performed on high-performance InP double heterojunction bipolar transistors and GaN high electron-mobility transistors are presented.

Fast Multiharmonic Active Load–Pull System With Waveform Measurement Capabilities

A novel fast multiharmonic active load-pull system is presented, which allows for the acquisition of the complete voltage and current waveforms. The system is capable of measuring multiple different load impedance or input power states within a short time instance (typically 180 states within 20 ms). It also facilitates high-power capability (up to 100 W) and high-frequency operation (up to 50 GHz). Furthermore, the dynamic range at the higher order harmonics is significantly improved by introducing an equalizer in cascade with the wideband harmonic samplers. A new algorithm for presenting the wanted load impedance to the device-under-test is also proposed. The method allows for simultaneous optimization on multiple harmonics, converging within five iterations. This method is applicable to all open loop active load-pull systems and could significantly reduce the number of iterations, hence reducing the measurement time. This paper provides a detailed description of the measurement system, including on-wafer verification measurements.

Linearity Characterization and Optimization of Millimeter-Wave GaN HEMTs

This paper presents the first comprehensive study of the linearity characteristics of GaN/SiC high-electron mobility transistors (HEMTs) at millimeter-wave (mmW). Similar size devices from three sources are compared using AM-AM, AM-PM, two-tone, and 16-quadrature-amplitude modulation (16QAM) modulated waveforms measurements at 31.5 GHz. Additionally, error vector magnitude (EVM) and spectrum regrowth [adjacent channel power ratio (ACPR)] data are also presented. The results were measured, using a unique digital waveform system integrated with a mmW (50-GHz) load-pull system, for HEMTs at different classes of operation: A, AB, and B. In all devices, it is observed that a “balanced AB” (b-AB) class of device bias condition where linearity and efficiency are simultaneously optimized. A linearity figure of merit FOM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">linearity</sub> , based on single-tone power measurements, is defined and calculated for each class. The FOM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">linearity</sub> closely correlates with linearity performance of the HEMT under two-tone and digitally modulated drive conditions. Compared with class A, at a fixed output power, a b-AB class showed a 5-10-dB improvement in intermodulation distortions, combined with 1.2 × to 1.9 × enhancement in drain efficiency. The characterization methodology and derived FOM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">linearity</sub> should benefit monolithic microwave integrated circuit (MMIC) designers to optimize the operation of GaN HEMTs. The results also indicate that GaN HEMTs can provide linearity characteristics suitable for applications such as satellite communications, while maintaining high efficiency and power density.

Highly Efficient InP/GaAsSb DHBTs With 62% Power-Added Efficiency at 40 GHz

We report the large-signal load-pull characterization of InP/GaAsSb double heterojunction bipolar transistors (DHBTs) with fT and fMAX cutoff frequencies as high as 380 and 320 GHz, respectively. Measurements were performed at 40 GHz in a passive load-pull system to characterize the output power and power-added-efficiency (PAE) performance. A PAE of 60% with an output power of 10 dBm (corresponding to power densities of approximately 870 mW/mm and 1.45 mW/μm2) was achieved in class AB operation. This excellent performance can be attributed to the low offset and knee voltages associated with the InP/GaAsSb type-II heterojunctions. To the best of our knowledge, the present performance exceeds published state-of-the-art results for HBTs at a frequency of 40 GHz.

Technique for harmonic minimisation in high-power MMIC antenna switches using load-pull tuners

Harmonic suppression in front-end monolithic microwave integrated circuit (MMIC) antenna switches for multi-band mobile phones is critical, and achieving sufficiently low values is challenging to meet. This study presents a novel technique for harmonic minimisation based on harmonically matching the input impedance of the relevant transmit port. It is shown how a load-pull system with an appropriate setup can be used for this purpose. This technique was successfully implemented on a single-pole-four-through switch, and harmonics were significantly reduced to values well below the specifications. Information extracted from the load-pull analysis was then used to design discrete matching networks as part of the application solution in commercial applications.

고조파 제어 회로를 이용한 X-대역 전력 증폭기의 효율 개선에 관한 연구

본 논문에서는 간단하면서도 효과적인 능동적인 로드 풀(active load-pull) 방법을 제시하고, 고조파의 임피던스 성분을 제어하는 회로를 사용하여, X-대역 전력 증폭기의 효율을 개선시킬 수 있는 방법에 관하여 연구하였다. 제안된 능동적인 로드 풀 시스템은 크게 방향성 결합기와 위상 변위기, 단락 회로, 그리고 전력 증폭기로 구성되어 있으며, 전통적인 능동적인 로드 풀 방법에 비해 반사 계수가 1인 지점까지 임피던스를 쉽게 가져다 놓을 수 있다. 본 논문에서 사용된 소자는 Mitsubishi사의 GaAs FET인 MGF1801이며, 9 GHz의 동작 주파수에서 class-A일 때, 21.65 dBm의 출력 전력과 24.9 %의 드레인 효율을 얻었고, class-AB일 때, 21.46 dBm의 출력 전력과 53.3%의 드레인 효율을 얻었다. 고조파 제어 회로는 실험에 사용된 초고주파 부품의 주파수 대역폭의 한계로 인해, 2차와 3차 항 성분까지만 고려하여 설계하였으며, class-AB에서, 6.4 %의 효율이 증가된 것을 확인하였다. In this paper, a simple and effective active load-pull method is proposed, and the method to improve the efficiency of X-band power amplifier using harmonic control circuit is presented. The proposed active load-pull system mainly consists of directional coupler, phase shifter, short circuit, and power amplifier, and allows a user to access reflection coefficients near the edge of the Smith chart(<TEX>$\Gamma$</TEX>=1) easily. The device used in this paper is Mitsubishi's GaAs FET MGF1801, and the operating frequency of the power amplifier is 9 GHz, The amplifier had output power of 21.65 dBm and drain efficiency of 24.9 % at class-A, and had output power of 21.46 dBm and drain efficiency of 53.3 % at class-AB. Harmonic control circuit is designed only second and third harmonic components because of the bandwidth limitation of the microwave components. The drain efficiency is improved as much as 6.4 % compared with class-AB power amplifier.

DC and RF Degradation Induced by High RF Power Stresses in 0.18- $\mu\hbox{m}$ nMOSFETs

Both the degradations of dc and RF characteristics of nMOS transistors due to hot-carrier effect and instantaneous high RF power stresses are presented in this paper. The drain current, threshold voltage, output power, and power-added efficient were degraded after the output power exceeded the power capacity. At this condition, the voltage between drain and gate became large and made the oxide soft breakdown happen. The load-pull system is used to set up the measurement for optimized input and output power matching networks. The shift of the optimum load impedance and constant power-gain circles for power match indicated that the parameters of the stressed cells were changed by the damage in the gate oxide. The signal distortion, gate voltage swing, and thermal effect were all considered in this paper. The cells were fabricated by a 0.18-μm CMOS process. All of the characteristics of the devices were measured at 5.2 GHz.

Agile harmonic envelope load-pull system enabling reliable and rapid device characterization

This paper presents a robust heterodyne mode of operation for the envelope load-pull system. Extensive performance evaluation and verification demonstrate the reliable, flexible and accurate nature of the system. The new system was compared with the active open-loop load pull, with the new system standing out as having superior performance in terms of measurement throughput, thereby improving the yield and turn-around in the design of power amplifiers. Finally, measurements on commercially available microwave transistor devices show some of the immediate recognized application areas of the developed system.

An Accurate Calibrate-Able Multiharmonic Active Load–Pull System Based on the Envelope Load–Pull Concept

After calibration, since the systematic imperfections of the envelop load-pull (ELP) components were now fully accounted for, the user is able to rapidly set accurate terminations with full Smith chart coverage. This functionality has been achieved by optimizing the hardware configuration of the envelop load-pull concept. Development of a system whose systematic errors could be described by a magnitude invariant error flow model was critical. As a consequence, a robust calibration mechanism, that is analogous to the one-port error correction of a vector network analyzer, was exploited and comprehensively verified. After calibration, since the systematic imperfections of the ELP components were now fully accounted for, the user is able to set accurately terminations with full Smith chart coverage. Finally, measurements on commercially available transistor devices are presented that verify the rapid nature, accuracy, flexibility, reliability, and ease of calibration of the multiharmonic load-pull system.

Impact of Group Delay on the Load Emulation in Multi-Tone Active Envelope Load-Pull System

Power amplifiers used in modern day wireless communication systems need to be characterised under complex excitations, into variable load impedances, for the determination of optimum matching conditions. Envelope load-pull technique provides the most realistic possibility for impedance emulation under complex modulation. The system developed for continuous wave modulation, when used under multi-tone excitation, experiences group delay in the feedback loop. This paper explains the impact of group delay on the emulated load and a proposal to overcome the inherent group delay in the feedback loop.

Recent Advances in Real-Time Load-Pull Systems

In this paper, some of the latest advances in real-time load-pull technologies will be described. A recently introduced ultralow-loss directional coupler, which has been designed and realized by the authors, provides a number of advantages when used in load-pull test sets. This device has been called the <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">load-pull</i> <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">head</i> . The new ultralow-loss load-pull head can transform any passive precalibrated load-pull system into an easily calibrated and accurate real-time load-pull test set, without losing high-reflection-coefficient capabilities. Moreover, if used to realize an active loop, the load-pull head reduces the risks of oscillations and the amount of the loop amplifier output power. As an example application, measurements with a passive real-time load-pull setup of a 30-W laterally diffused MOS (LDMOS) transistor are presented. Furthermore, some advice to bypass the remaining unavoidable losses due to probes and cables is given. We will show, with measurements and with very simple calculations, that the combined use of load-pull heads, a passive tuner, and an active loop not only boosts the available Gamma <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</sub> but also decreases the loop amplifier output power, with a sensible reduction in the overall cost of the system.