Lithography Area Research Articles

Optical direct write of Dolan–Niemeyer-bridge junctions for transmon qubits

We characterize highly coherent transmon qubits fabricated with a direct-write photolithography system. Multi-layer evaporation and oxidation allow us to change the critical current density by reducing the effective tunneling area and increasing the barrier thickness. Surface treatments before resist application and again before evaporation result in high-coherence devices. With optimized surface treatments, we achieve energy relaxation T1 times in excess of 80 μs for three dimensional transmon qubits with Josephson junction lithographic areas of 2 μm2.

Photoresist Residue Detection in Advanced Packaging

Abstract Semiconductor manufacturers are continuously driving efforts to put more computing power and speed into less volume. At the same time, consumers are demanding devices with more functionality that integrate a variety of interconnected circuit types. The result has been an increasing reliance on advanced packaging technologies that use fab-like processes to integrate multiple chips and to provide the increased I/O capability required. With continued focus on device miniaturization, the rapid detection of trace chemical residue during intermediate processing steps becomes increasingly difficult. In the lithography area, detection of polymer residue on wafer surfaces presents special opportunities. One area of opportunity for the detection of lithographic polymer residue takes advantage of the fact that these materials possess unique optical properties not found in metals or other inorganic materials used in semiconductor manufacturing. Rudolph Technologies has submitted patent applications for a novel defect illumination technique that offers key advantages over traditional white light inspection. This paper will present the results of using this inspection technique for the detection of photoresist residue on test wafers as well as on actual customer devices. Sample data included herein are representative of advanced packaging technology used today by a wide range of semiconductor manufacturers and OSAT facilities. While this novel inspection technique will not be a panacea for all trace residue detection problems, it offers a method complementary with bright field or dark field inspection when these two traditional inspection methods lack the sensitivity required.

Developing a Tω (the weakest t-norm) fuzzy GERT for evaluating uncertain process reliability in semiconductor manufacturing

This paper develops a novel weakest t-norm ( T ω ) fuzzy Graphical Evaluation and Review Technique (GERT) simulation technology. This proposal is designed to be useful in a realistic environment and improve upon the traditional fuzzy GERT insofar as it has been developed for analyzing complex systems in uncertain environments; the traditional system usually adopts α-cut arithmetic operations for its calculations. In this research, the fuzzy support system develops the T ω fuzzy GERT as a substitute for traditional fuzzy GERT technology. In the examples, the fuzzy support system constructs a model of 300 mm manufacturing processes in the context of a lithography area. Moreover, the manufacturing processes model is examined with regard to the fuzzy support system using two types of fuzzy arithmetic: α-cut arithmetic and the T ω operator. Notably: (1) both types of fuzzy arithmetic provide a reliable analysis of the fuzzy GERT model with regard to a lithography area; (2) under the traditional fuzzy GERT model, the α-cut arithmetic provides results such that the fuzziness of the model calculation was fuzzier than that of the T ω fuzzy arithmetic due to the accumulation of fuzziness of the α-cut arithmetic; (3) the α-cut arithmetic cannot effectively preserve the original shape of a membership function; and (4) the T ω arithmetic gives a justifiable fuzziness/fuzzy spread because it takes only the maximal fuzziness encountered and calculates that into the operation. Our proposed T ω fuzzy GERT can successfully analyze a 300 mm manufacturing process; this has been evidenced in the research. Additionally, the proposed model uses simple arithmetic operations rather than traditional fuzzy GERT with applications in complex manufacturing systems. Moreover, the T ω arithmetic provides more credible (or conservative) information/results with regard to the amount of fuzziness in the 300 mm manufacturing processing model.

Evaluating the manufacturing capability of a lithographic area by using a novel vague GERT

This study proposes a novel vague graphical evaluation and review technique (GERT) for evaluating wafer manufacturing yield and finishing time in lithographic area. Wafer manufacturing reparability in lithographic area often requires reentry operations. Besides, many manufacturing steps, variable products, and flows can cause many difficulties and uncertainties. Hence, lithographic area is always the bottleneck in wafer fab manufacturing procedures. The main purpose of this study is to resolve the reentry problem in wafer manufacturing by GERT, and to solve the uncertainty problem by using vague set. Based on the manufacturing procedure of lithographic area in the 300mm wafer fab, the algorithm steps for vague GERT are proposed, and a simple decision support system is developed to process the complex calculation procedure for providing more information to managers. We also hope to enhance the capability of lithographic area in order to improve overall system performance.

Polyimide-based X-ray masks with advanced performance of pattern accuracy and thermal stability

Polyimide-based X-ray masks which are generated by optical lithography and electroplating of gold absorbers on a polyimide mask membrane gain attention as low cost masks. The organic membranes generally have problem of (1) pattern edge sharpness, (2) miniaturization of pattern and (3) thermal stability. To make the masks commodity in deep and accurate lithography area, Optnics Precision, Japan, has overcome the above difficulties and realized the masks with advanced performance of pattern accuracy and thermal stability by improving the making process and the material. Good results were obtained in the exposure experiment that used this mask. When this X-ray mask is combined with the electroforming technique and the material development technique that Optnics has, the application to various fields like an industrial field and medical field can be expected.

Spatial and Temporal Distributions of a Gaseous Pollutant During Simulated Preventive Maintenance and Pipe Leaking Events in a Working Cleanroom

Sulfur hexafluoride (SF <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sub> ) of > 99.9% in purity was artificially released to simulate the emission sources in the etching/thin-film area of a working cleanroom in a semiconductor fab at the rate of 492 g/h. The temporal and spatial dispersion patterns of the gas pollutant were studied during the simulated preventive maintenance (PM) and pipe leaking exhaust events experimentally and numerically. Three mobile Fourier transform infrared spectrometers (FTIRs, detection limit: 10 ppb) were used simultaneously to measure the real time SF <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sub> concentrations in different locations of the etching/thin-film area of the cleanroom. An additional open-path FTIR with very low detection limit of 0.4 ppb was installed before the recirculation duct in the lithography area to monitor if the pollutant drifted from the etching/thin-film area to the lithography area. The results show that the 3-D numerical model predicts the unsteady gas concentration accurately in both the peak concentration and the time required to reach the peak concentration. Due to high dilution of the pollutant in the cleanroom, the current gas sensors may not be sensitive enough and a better monitoring system and strategy is needed to protect workers from injury and ensure good product yield. The well-mixed model predicts the peak pollutant concentrations within a reasonable range which is 0.34-1.33 times the experimental values except when the monitored distance is very close to the release point. Although it is not able to predict the time required to reach the peak concentration and the time for the concentration to drop below a small level, the simple well-mixed model can be used to obtain an estimation of the peak concentration quickly when the emission rate and the ventilation condition of the cleanroom are different than the current study.

Operational analysis of synchrotron-based X-ray lithography: comparison of 200 mm and 300 mm wafer flows

A companion paper describes a discrete-event simulation model that captures the processing of wafers through a next-generation X-ray lithography area employing multiple synchrotrons as the source of exposure radiation. The model incorporates the best current information on unit-cell design and processing times; implements the spectrum of events that interrupt the flow of wafers processing on the cell; and provides estimates of weekly throughput for the cell and the frequency of SEMI E-10 equipment states for the corresponding exposure tool. In this paper we apply the model to compare the performance of cells fabricating 200 mm wafers with that of cells fabricating 300 mm wafers. Results illustrate the dependence of average wafer throughput on lot size, exposure times, and assumptions regarding the number of die per wafer. For fixed assumptions regarding differential lot sizes for different wafer diameters, maximum throughput of wafers is achieved for 200 mm wafers with 25/spl times/25 mm field size. Ignoring wafer-sort losses, however, a maximum throughput of chips is realized for 300 mm wafers with 22/spl times/22 mm fields with 11/spl times/22 devices. Remarkably, the distribution of equipment states remains relatively unchanged across simulation experiments. These results suggest a useful analytical approximation for cell performance. When calibrated against the simulation results, this static model reinforces the conclusion that, all else being equal, acceptable throughput can be achieved for 300 mm wafers using the smaller wafer lots required to maintain acceptable cycle times.

Operational analysis of synchrotron-based X-ray lithography: simulation model of wafer flows

A discrete-event simulation is developed that captures the processing of wafers through an advanced X-ray lithography area employing multiple synchrotrons as the source of exposure radiation. The model incorporates the best current information on unit cell design and processing. Detailed model logic implements a range of unscheduled events that represent interruption of the flow of wafer processing on the cells, as well as recovery from these downtime events. Performance measures estimated from the simulation include the weekly wafer throughput for each unit cell and the frequency of equipment states for the corresponding exposure tool. Equipment states defined in the model are based on an expansion of the SEMI E-10 guidelines to account for downtimes associated with beam charge and preventive maintenance and for uptimes associated with processing send-ahead wafers. In this paper we discuss the rationale for the simulation and consider in detail the operating assumptions embedded in the simulation model. In a companion paper we describe a simulation study in which the model is applied to compare the performance of the X-ray lithography running 200 mm and 300 mm wafers.

Operational analysis of synchrotron-based X-ray lithography: comparison of 200 mm and 300 mm wafer flows

A companion paper describes a discrete-event simulation model that captures the processing of wafers through a next-generation X-ray lithography area employing multiple synchrotrons as the source of exposure radiation. The model incorporates the best current information on unit-cell design and processing times; implements the spectrum of events that interrupt the flow of wafers processing on the cell; and provides estimates of weekly throughput for the cell and the frequency of SEMI E-10 equipment states for the corresponding exposure tool. In this paper we apply the model to compare the performance of cells fabricating 200 mm wafers with that of cells fabricating 300 mm wafers. Results illustrate the dependence of average wafer throughput on lot size, exposure times, and assumptions regarding the number of die per wafer. For fixed assumptions regarding differential lot sizes for different wafer diameters, maximum throughput of wafers is achieved for 200 mm wafers with 25/spl times/25 mm field size. Ignoring wafer-sort losses, however, a maximum throughput of chips is realized for 300 mm wafers with 22/spl times/22 mm fields with 11/spl times/22 devices. Remarkably, the distribution of equipment states remains relatively unchanged across simulation experiments. These results suggest a useful analytical approximation for cell performance. When calibrated against the simulation results, this static model reinforces the conclusion that, all else being equal, acceptable throughput can be achieved for 300 mm wafers using the smaller wafer lots required to maintain acceptable cycle times.

Ballistic transport of electrons in T-shaped quantum waveguides

Ballistic transport of electrons through T-shaped quantum waveguides with stubs of small lithographic area (0.075 μm2) has been studied. Measurements of the conductance G at 90 mK as a function of the top gate voltage, which changes the stub height, show well-defined, almost periodic oscillations in G. A theoretical analysis, involving estimation of the shape and size of the device under gate biases and computation of the transmission probabilities from numerical analysis of the Schrödinger equation, successfully explains the main features of the experimental observations. The observed minima in G can be attributed to reflection resonances of electron waves from the resonant states of the stub cavity. This work establishes the potential of electron stub tuners in microelectronics applications.

Combined lithographies for the reduction of stitching errors in lithography

A new way of lithography is presented, which makes use of overlapping address fields to expose patterns by conventional or unconventional lithographies and uses the overlap area to position subsequent pattern areas with high accuracy by image processing. Dot marks are generated by beam induced deposition in the overlap areas at the end of the exposure process of each field. Then the sample is moved to the next field. The marks are searched by taking a highly magnified image scan in a reduced area. The mark position is evaluated by processing of this image to determine the new position of the sample. The position is obtained in the address scale used for exposure with an accuracy of ±1 address steps, which makes it possible to stitch the adjacent pattern in the next field with this precision. Having a ‘‘coarse’’ field or stage positioning means with 1-μm precision is now sufficient to obtain patterns, which are stitched with an accuracy of 1 nm by using an address field of ≳14 bit for the overlapping fields and by sacrificing an area of &amp;lt;1% of the address area for the mark detection in the overlap region. The method is especially applicable to nanolithography with instruments and processes that allow inspection of the mark without destroying the lithography area. In this case, only the mark area of the size of a few pixels is lost for the patterning within the fields. This is especially valid for scanning probe lithographies and beam induced deposition lithography methods.