Lithographic Feature Size Research Articles

Low-loss broadband bi-layer edge couplers for visible light.

Low-loss broadband fiber-to-chip coupling is currently challenging for visible-light photonic-integrated circuits (PICs) that need both high confinement waveguides for high-density integration and a minimum feature size above foundry lithographical limit. Here, we demonstrate bi-layer silicon nitride (SiN) edge couplers that have ≤ 4 dB/facet coupling loss with the Nufern S405-XP fiber over a broad optical wavelength range from 445 to 640 nm. The design uses a thin layer of SiN to expand the mode at the facet and adiabatically transfers the input light into a high-confinement single-mode waveguide (150-nm thick) for routing, while keeping the minimum nominal lithographic feature size at 150 nm. The achieved fiber-to-chip coupling loss is about 3 to 5 dB lower than that of single-layer designs with the same waveguide confinement and minimum feature size limitation.

Millimeter-long metamaterial surface-emitting antenna in the silicon photonics platform.

Integrated optical antennas are key components for on-chip light detection and ranging technology (LIDAR). In order to achieve a highly collimated far field with reduced beam divergence, antenna lengths on the order of several millimeters are required. In the high-index contrast silicon photonics platform, achieving such long antennas typically demands weakly modulated gratings with lithographic minimum feature sizes below 10 nm. Here, we experimentally demonstrate a new, to the best of our knowledge, strategy to make long antennas in silicon waveguides using a metamaterial subwavelength grating (SWG) waveguide core loaded with a lateral periodic array of radiative elements. The mode field confinement is controlled by the SWG duty cycle, and the delocalized propagating mode overlaps with the periodic perturbations. With this arrangement, weak antenna radiation strength can be achieved while maintaining a minimum feature size as large as 80 nm. Using this strategy, we experimentally demonstrate a 2-millimeter-long, single-etched subwavelength-engineered optical antenna on a conventional 220 nm SOI platform, presenting a measured far-field beam divergence of 0.1° and a wavelength scanning sensitivity of 0.13°/nm.

Size and shape control of a variety of metallic nanostructures using tilted, rotating evaporation and lithographic lift-off techniques

Here, we demonstrate a simple top-down method for nanotechnology whereby electron beam (ebeam) lithography can be combined with tilted, rotated thermal evaporation to control the topography and size of an assortment of metallic objects at the nanometre scale. In order to do this, the evaporation tilt angle is varied between 1 and 24°. The technique allows the 3-dimensional tailoring of a range of metallic object shapes from sharp, flat bottomed spikes to hollow cylinders and rings—all of which have rotational symmetry and whose critical dimensions are much smaller than the lithographic feature size. The lithographic feature size is varied from 400 nm down to 40 nm. The nanostructures are characterized using electron microscopy techniques—the specific shape can be predicted using topographic modelling of the deposition. Although individual nanostructures are studied here, the idea can easily be extended to fabricate arrays for e.g. photonics and metamaterials. Being a generic technique—depending on easily controlled lithographic and evaporation parameters—it can be readily incorporated into any standard planar process and could be adapted to suit other thin-film materials deposited using physical means.

A CMOS Compatible Ultracompact Silicon Photonic Optical Add-Drop Multiplexer with Misaligned Sidewall Bragg Gratings

We experimentally and via simulations demonstrate ultracompact single-stage and cascaded optical add-drop multiplexers using misaligned sidewall Bragg grating in a Mach–Zehnder interferometer for the silicon-on-insulator platform. The single-stage configuration has a device footprint of 400 ${\mu }\text{m}\,\times$ 90 ${\mu }\text{m}$ , and the cascaded configuration has a footprint of 400 ${\mu }\text{m}\,\times$ 125 ${\mu }\text{m}$ . The proposed designs have 3-dB bandwidths of 6 nm and extinction ratios of 25 dB and 51 dB, respectively, and have been fabricated for the transverse electric mode. A minimum lithographic feature size of 80 nm is used in our design, which is within the limitation of 193 nm deep ultraviolet lithography.

Exploiting Dark Fluorophore States to Implement Resonance Energy Transfer Pre-Charge Logic

As lithographic feature sizes approach fundamental scaling limits, a variety of computational domains remain incompatible with integrated circuits merely due to their operating principles. Resonance energy transfer (RET) logic offers a molecular-scale solution for accessing these untapped domains. This emerging technology uses self-assembled networks of fluorescent molecules to perform computation at scales far below the diffraction limit and in environments that preclude silicon electronics. In this article, the authors propose a new form of RET logic design that yields a library of nonlinear logic gates that can be cascaded to build more complex integrated molecular circuits.

Self Priming Low Stress Aqueous Developable Benzocyclobutene (AD-BCB) Photodielectric Materials for Advanced Wafer Level Packaging

As the semiconductor industry drives to more functionality in smaller and lighter devices, it requires new materials to meet the changing requirements of new and more advanced chip designs and packaging solutions. Photoimagable polymeric dielectric materials are a key building block for wafer level packaging (WLP); these include polyimide (PI), polybenzoxazole (PBO), acrylics, silicones, epoxy-phenolics and benzocyclobutene (BCB). Because of low copper diffusion, low temperature curing, high reliability and low moisture adsorption, BCB was the platform chosen for modification. In this work, we will focus on the development of self priming, low stress, aqueous developable version of BCB, known as AD-BCB. This new photodielectric material has improved mechanical properties of <25MPa film stress value and >28% elongation while maintaining good post develop and post cure adhesion on various substrates including silicon, silicon oxide, silicon nitride, copper, aluminum and epoxy molding compound. Elongation is significantly increased for this positive tone, aqueous developable, photodielectric materials, while film stress and wafer bow are significantly reduced. In addition, this new formulation is self priming and does not require a spin-on adhesion promoter. The material can be cured at as low as 200 °C with lithographic feature size of <10 μm and dielectric constant of 3.0.

A High-Efficiency Nonuniform Grating Coupler Realized With 248-nm Optical Lithography

We describe a high-efficiency grating coupler (GC) fabricated on a silicon-on-insulator wafer with 220 nm top silicon layer. One single 60 nm shallow etch is required to define the diffractive gratings with a minimum lithographic feature size of 180 nm, which is within the limitation of 248 nm deep ultraviolet lithography. The measured average insertion loss is 3.1 ± 0.2 dB ~1550 nm with a 1 dB bandwidth of 41 ± 4 nm for TE polarization, whereas the best device exhibits 2.7 dB loss. The measured GC backreflection loss is better than 17 dB across the wafer. Cross-wafer data shows good uniformity and tolerance to fabrication variations. This is the best result reported for the commonly used 220 nm thickness Si that uses only a shallow etch step.

A novel design for maskless direct laser writing nanolithography: Combination of diffractive optical element and nonlinear absorption inorganic resists

Maskless laser direct writing lithography has been applied in the fabrication of optical elements and electric-optical devices. With the development of technology, the feature size of the elements and devices is required to reduce down to nanoscale. Increasing the numerical aperture of converging lens and shortening the laser wavelength are good methods to obtain the small spot and reduce the feature size to nanoscale, while this will cause the reduction of the depth of focus. The reduction of depth of focus will lead to some difficulties in the focusing and tracking servo controlling during the high speed laser direct writing lithography. In this work, the combination of the diffractive optical elements and the nonlinear absorption inorganic resist thin films cannot only extend the depth of focus, but also reduce the feature size of the lithographic marks down to nanoscale. By using the five-zone annular phase-only binary pupil filter as the diffractive optical elements and AgInSbTe as the nonlinear absorption inorganic resist thin film, the depth of focus cannot only extend to 7.39 times that of the focused spot, but also reduce the lithographic feature size down to 54.6nm. The ill-effect of sidelobe on the lithography is also eliminated by the nonlinear reverse saturable absorption and the phase change threshold lithographic characteristics.

Neutron Reflectivity Characterization of the Photoacid Reaction-Diffusion Latent and Developed Images of Molecular Resists for Extreme Ultraviolet Lithography

Lithographic feature size requirements have approached a few radius of gyration of photoresist polymers used in thin-film patterning. Furthermore, the feature dimensions are commensurate with the photoacid diffusion length that defines the underlying latent image. Smaller imaging building blocks may enable reduced feature sizes; however, resolution limits are also dependent upon the spatial extent of the photoacid-catalyzed reaction diffusion front and subsequent dissolution mechanism. The reaction-diffusion front was characterized by neutron reflectivity for ccc stereoisomer-purified, deuterium-labeled tert-butoxycarbonyloxy calix[4]resorcinarene molecular resists. The spatial extent of the reaction front exceeds the size of the molecular resist with an effective diffusion constant of (0.13 ± 0.06) nm(2)/s for reaction times longer than 60 s, with the maximum at shorter times. Comparison to a mean-field reaction-diffusion model shows that a photoacid trapping process provides bounds to the spatial and extent of reaction via a reaction-limited mechanism whereas the ratio of the reaction rate to trapping rate constants recovers the effective diffusion peak. Under the ideal step-exposure conditions, surface roughness was observed after either positive- or negative-tone development. However, negative-tone development follows a surface-restructuring mechanism rather than etch-like dissolution in positive-tone development.

Two‐ and Three‐Terminal Resistive Switches: Nanometer‐Scale Memristors and Memistors

AbstractThe logical relationship between two previously defined “memory resistors” is revealed by constructing and experimentally demonstrating a three‐terminal memistor equivalent circuit using two two‐terminal memristors. A technique is then presented, using nanoimprint lithography in combination with angle evaporation, to fabricate a single nanoscale device with a footprint of 4F2, where F is the minimum lithographic feature size, that can be operated as either a two‐terminal lateral memristor or a three‐terminal memistor inside a crossbar structure. These devices exhibit repeatable bipolar nonvolatile switching behavior with up to 103 ON/OFF conductance ratios, as well as the desired three‐terminal behavior.

Templated Solid‐State Dewetting to Controllably Produce Complex Patterns

Templated formation of complex patterns via solid-state dewetting is demonstrated. Thin films often dewet from their substrates when they are heated, even while remaining in the solid state throughout the process. It is shown that solid-state dewetting of epitaxial films can be templated through lithographic pre-patterning, so as to reproducibly form complex structures with sub lithographic feature sizes. Detailed facts of importance to specialist readers are published as ”Supporting Information”. Such documents are peer-reviewed, but not copy-edited or typeset. They are made available as submitted by the authors. Please note: The publisher is not responsible for the content or functionality of any supporting information supplied by the authors. Any queries (other than missing content) should be directed to the corresponding author for the article.

Multiphoton photoresists giving nanoscale resolution that is inversely dependent on exposure time

Recent advances in materials science have made it possible to perform photolithography at the nanoscale using visible light. One approach to visible-light nanolithography (resolution augmentation through photo-induced deactivation) uses a negative-tone photoresist incorporating a radical photoinitiator that can be excited by two-photon absorption. With subsequent absorption of light, the photoinitiator can also be deactivated before polymerization occurs. This deactivation step can therefore be used for spatial limitation of photopatterning. In previous work, continuous-wave light was used for the deactivation step in such photoresists. Here we identify three broad classes of photoinitiators for which deactivation is efficient enough to be accomplished by the ultrafast excitation pulses themselves. The remarkable properties of these initiators result in the inverse scaling of lithographic feature size with exposure time. By combining different photoinitiators it is further possible to create a photoresist for which the resolution is independent of exposure over a broad range of fabrication speeds.

Film Edge Nonlocal Spin Valves

Spintronics is a new paradigm for integrated digital electronics. Recently established as a niche for nonvolatile magnetic random access memory (MRAM), it offers new functionality while demonstrating low-power and high-speed performance. However, to reach high density spintronic technology must make a transition to the nanometer scale. Prototype devices are presently made using a planar geometry and have an area determined by the lithographic feature size, currently about 100 nm. Here we present a new nonplanar geometry in which one lateral dimension is given by a film thickness, on the order of 10 nm. With this new approach, cell sizes can shrink by an order of magnitude. The geometry is demonstrated with a nonlocal spin valve, where we study devices with an injector/detector separation much less than the spin diffusion length.

InP Bipolar ICs: Scaling Roadmaps, Frequency Limits, Manufacturable Technologies

Indium phosphide heterojunction bipolar transistors (HBTs) find applications in very wide-band digital and mixed-signal integrated circuits (ICs). Devices fabricated in high-yield process flows at 500 nm feature size obtain 450 GHz cutoff frequencies and 5 V breakdown and enable high yield fabrication of integrated circuits having more than 3000 transistors. Laboratory devices at 250 nm feature size obtain 755 GHz . We describe device and circuit bandwidth limits associated with HBTs, develop scaling roadmaps for HBTs having lithographic minimum feature sizes between 512 and 64 nm, and identify key technological challenges in realizing 480-GHz digital ICs and 1000-GHz amplifiers. Key features of manufacturable self-aligned dielectric sidewall processes are described in detail.

Nanowire-based programmable architectures

Chemists can now construct wires which are just a few atoms in diameter; these wires can be selectively field-effect gated, and wire crossings can act as diodes with programmable resistance. These new capabilities present both opportunities and challenges for constructing nanoscale computing systems. The tiny feature sizes offer a path to economically scale down to atomic dimensions. However, the associated bottom-up synthesis techniques only produce highly regular structures and come with high defect rates and minimal control during assembly. To exploit these technologies, we develop nanowire-based architectures which can bridge between lithographic and atomic-scale feature sizes and tolerate defective and stochastic assembly of regular arrays to deliver high density universal computing devices. Using 10nm pitch nanowires, these nanowire-based programmable architectures offer one to two orders of magnitude greater mapped-logic density than defect-free lithographic FPGAs at 22nm.

Read channels for prepatterned media with trench playback

Patterned media can be prepared by depositing conventional continuous-film media on prepatterned substrates, such as DVD-like plastic disks. Significant playback signals are produced from media deposited in the substrate trenches, at terabits-per-inch/sup 2/ lithographic feature size limits. Three recording channels are analyzed to deal with these signals - standard symmetric-pulse partial response maximum likelihood (ignoring the trench signal), an asymmetric partial response channel with different positive and negative pulse targets, and simple cancellation of the trench signal. The latter has the best bit-error rate (BER), even with 10% cancellation errors. Perpendicular media without an underlayer had superior BER to horizontal.

Low stress development of poly(methylmethacrylate) for high aspect ratio structures

Magnetic head fabrication for >100 Gbit/in.2 areal density requires minimum lithographic feature size <0.15 μm, with aspect ratios of 8:1–10:1. Electron-beam lithography can provide adequate resolution for research and development of magnetic heads, and at 100 kV can provide greater than 10:1 aspect ratios in 1–3 μm thick single-layer resist poly(methylmethacrylate). Poly (methylmethacrylate) (PMMA) is well known for withstanding the rigors of plating baths, but at these thicknesses requires a nonswelling, low-stress developer such as the LIGA mixture (also known as “GG Developer (U.S. Patent No. 4,393,129)”). In this work we present the results of isopropyl alcohol:water development for thick PMMA, and describe the dependence of resist contrast on the temperature of the developer. We also demonstrate the advantage of ultrasonic agitation during development. These development techniques have brought resist profiles in PMMA to the theoretical limit predicted by Monte Carlo simulations.

Subwavelength lithography over extended areas

We demonstrate a systematic approach to subwavelength resolution lithographic image formation on films covering areas larger than a wavelength squared. For example, it is possible to make a lithographic pattern with a feature size resolution of $\ensuremath{\lambda}/[2(N+1)]$ by using a particular 2M-photon, multimode entangled state, where $Nl~M,$ and banks of birefringent plates. By preparing such a statistically mixed state, one can form any pixel pattern on a ${2}^{M\ensuremath{-}N}(N+1)\ifmmode\times\else\texttimes\fi{}{2}^{M\ensuremath{-}N}(N+1)$ pixel grid occupying a square with side ${L=2}^{M\ensuremath{-}N\ensuremath{-}1}\ensuremath{\lambda}.$ Hence, there is a trade off between the exposed area, the minimum lithographic feature size resolution, and the number of photons used for the exposure. We also show that the proposed method will work even under nonideal conditions, albeit with somewhat poorer performance.

Advanced lithography for ULSI

Lens technology has advanced to the point where lithographic feature sizes equal to, or even smaller than, the wavelength of the light used in the stepper can be achieved in production. How far optical lithography can go from here depends both on how short a wavelength is possible and how close we can come to the absolute limit of diffraction. In this article, we will examine the current thinking on these questions, and discuss what might happen if and when optical lithography really can no longer be used.

Solid state [1995 technological forecast

Competition among semiconductor manufacturers has intensified, quickening the pace of technological development. In the drive to capture market share, companies are turning out new generations of products with dizzying speed. Subhalf-micrometer lithographic feature sizes in commercial products have pegged new lows, while 275 MHz processing speeds have reached new highs. With feature sizes progressing toward 0.25 /spl mu/m, scientists are optimizing everything from process-monitoring software to circuit boards and modules. Some are already looking at the next step/spl minus/linewidths of 0.18 /spl mu/m and below/spl minus/that will be needed to make 1-gigabit memories. To keep up with product demand and rapidly advancing technology, new factories are going up all over the world, and marketing strategies have changed. The latest developments are discussed including microprocessors that can save power when machines are idle, and the new Alpha 275 MHz chip and Si-Ge technology. >