Linear Shunt Capacitance Research Articles

Effect of Shunt Capacitances on Performance of Current-Mode Class-DE Power Amplifier at Any Active Time

In this paper, a current-mode Class-DE (CMCDE) power amplifier is presented. The CMCDE with linear shunt capacitance under zero-current switching (ZCS) and zero current-derivative switching (ZCDS) conditions at any active time is analyzed, simulated, and fabricated. An analytical theory along with the design simulation and verification by experimental results at active time $\tau _{d}= \pi / 2$ are given. It was shown that the peak switch voltage can be adjusted with active time $\tau _{d}$ . The proposed amplifier offers several desirable features, such as simple structure and possibility to include the parasitic inductance and shunt capacitance of the mosfet into a load network, so that ZCS condition is maintained. The results show that the switch voltage and current obtained in CMCDE amplifier are inversed in comparison to the voltage-mode Class-DE (VMCDE) amplifier by using a simple output matching network and series inductance. Also, we could control the harmonics in one resonator in comparison to multiple resonators used in some high-efficiency power amplifiers. The measured maximum drain efficiency of 88% and power gain of 22 dB at 42-dBm output power was obtained at 4 MHz for CMCDE amplifier at active time $\tau _{d}= \pi / 2$ .

Design and analysis of optimised class E power amplifier using shunt capacitance in the output structure

ABSTRACTIn this paper, a class E power amplifier (PA) with operating frequency of 1 MHz is presented. MOSFET non-linear drain-to-source parasitic capacitance, linear external capacitance at drain-to-source port and linear shunt capacitance in the output structure are considered in design theory. One degree of freedom is added to the design of class E PA, by assuming the shunt capacitance in the output structure in the analysis. With this added design degree of freedom it is possible to achieve desired values for several parameters, such as output voltage, load resistance and operating frequency, while both zero voltage and zero derivative switching (ZVS and ZDS) conditions are satisfied. In the conventional class E PA, high value of peak switch voltage results in limitations for the design of amplifier, while in the presented structure desired specifications could be achieved with the safe margin of peak switch voltage. The results show that higher operating frequency and output voltage can also be achieved, compared to the conventional structure. PSpice software is used in order to simulate the designed circuit. The presented class E PA is designed, fabricated and measured. The measured results are in good agreement with simulation and theory results.

Effect of Nonlinearity of Parasitic Capacitance on Analysis and Design of Class E/F<sub>3</sub> Power Amplifier

In this paper, the analysis and comparison of a Class-E/F3 power amplifier with nonlinear and linear shunt capacitance at 50% duty ratio are presented. An analytical analysis for nonlinear and linear shunt capacitance is presented, and its effects on the performance of the power amplifier are discussed. The different parameters, such as series reactance, peak switch voltage, and power output capability are compared for power amplifiers with linear and nonlinear shunt capacitance. Two design examples of the Class-E/F3 power amplifiers with IRF530 mosfets and lumped elements at an operating frequency of 4 MHz are analyzed. The PSpice simulation and measurement for the power amplifier with nonlinear shunt capacitance have been done. The results agree with the analytical expressions that show the validity of the analytical expressions derived at zero-voltage switching and zero derivative voltage switching conditions.

Generalized Design Considerations and Analysis of Class-E Amplifier for Sinusoidal and Square Input Voltage Waveforms

In this paper, analytical expressions and design equations are presented for a class-E amplifier with MOSFET nonlinear drain-source capacitance and linear gate-drain parasitic capacitance, along with external linear shunt capacitance. The class-E amplifier characteristics are presented as functions of the ratio of the sum of the external linear shunt capacitance and the MOSFET linear gate-drain capacitance to the MOSFET drain-source junction capacitance when the switch voltage is zero. Although the effect of the MOSFET linear gate-drain capacitance is similar to that of the external linear shunt capacitance on the design of the class-E amplifier with a square input voltage, the difference between their effects should be considered for the sinusoidal input voltage, which is one of the most important suggestions in this paper. Additionally, analytical expressions of the output power capability is given, which is considerably affected by the external linear shunt capacitance. Two design examples are presented, taking into account as design specification the output power of 8.7 W and the operating frequency of 4 MHz, along with the PSpice-simulations and experimental waveforms.

Analysis, Design, and Implementation of the Class-E ZVS Power Amplifier With MOSFET Nonlinear Drain-to-Source Parasitic Capacitance at any Grading Coefficient

In this paper, analytical expressions for waveforms and design relationships are derived for the class-E power amplifier with the MOSFET nonlinear drain-to-source parasitic capacitance under the subnominal operation, i.e., only zero-voltage switching (ZVS) condition, for any grading coefficient m of the MOSFET body junction diode and 50% duty ratio. Only the MOSFET nonlinear drain-to-source parasitic capacitance is used for the analysis of the class-E ZVS power amplifier, and its nonlinearity is determined by the grading coefficient m. The switch voltage waveform does not satisfy the class-E ZVS switching condition when only the linear shunt capacitance is considered. The grading coefficient m is used as an adjustment parameter that provides accurate design to satisfy the given output power and peak switch voltage simultaneously. Therefore, the grading coefficient m is the important parameter to satisfy the class-E ZVS condition and given design specifications, which is the most important result in this paper. Additionally, the output power capability and maximum operating frequency are affected by the grading coefficient m. The analytical expressions are obtained by considering the grading coefficient m as an adjustment parameter, which is validated by PSpice simulations and laboratory experiments. The measurement and PSpice simulation results agreed with the analytical expressions quantitatively, which denotes the usefulness and effectiveness of our obtained analytical expressions.

Analysis of class E amplifier with both linear and nonlinear shunt capacitance at any duty cycle, grading coefficient and supply modulation

This work studies the effects of the drain pn capacitance grading coefficient, duty cycle and supply modulation on the operation of class E amplifier. The class E operation analysis with a combination of nonlinear and linear output capacitances is revisited and duty cycle is added to the equations to allow further investigations for optimum class E circuit tuning. The presented analysis method can be used for synthesis as well, where necessary load components are calculated for a transistor with a specific grading coefficient both in the output capacitance and in the nonlinear feedback capacitance. Further, the grading coefficient of the nonlinear output capacitance is varied in the paper while investigating the changes in normalized peak voltages and harmonics. Drain efficiency, supply-to-amplitude modulation (V dd /AM) and supply-to-phase modulation (V dd /PM) are studied. It is shown that by varying the device duty cycle, one can scale the optimum load and the level of peak voltages over the switching device. Also, the choice of grading coefficient affects the drain efficiency, V dd /AM and V dd /PM behaviour of the class E amplifier. Last, a case study about increasing the efficiency of a class E amplifier with hyperabrupt output junction capacitance is shown.

Analysis of Class-DE Amplifier With Linear and Nonlinear Shunt Capacitances at 25% Duty Ratio

The class-E zero-voltage switching/zero-derivative switching operation within class-DE amplifiers can be easily achieved by adding external shunt capacitances. This paper gives the analytical expressions for the designs of the class-DE amplifiers with the shunt capacitances composed of linear and nonlinear capacitances for any grading coefficient m of MOSFET body junction diodes at the switch-on duty ratio D=0.25 . In the analysis, an equivalent linear shunt capacitance of the nonlinear MOSFET drain-source parasitic capacitances is derived. Analytical results show good agreements with the simulation and experimental ones, which validate our analysis.

High-Frequency Power Amplitude Modulators with Class-E Tuned Amplifiers

A high-frequency power amplifier used in a drain amplitude modulator must have linear dependence of output HF voltage Vo versus its supply voltage VDD. This condition essential for obtaining low-level envelope distortions is met by a theoretical class-E amplifier with a linear shunt capacitance of the switch. In this paper the influence of non-linear output capacitance of the transistor in the class-E amplifier on its Vo(VDD) characteristic is analyzed using PSPICE simulations of the amplifiers operating at frequencies 0.5 MHz, 5 MHz and 7 MHz. These simulations have proven that distortions of theVo(VDD) characteristic caused by non-linear output capacitance of the transistor are only slight for all analyzed amplifiers, even for the 7 MHz amplifier without the external (linear) shunt capacitance. In contrast, the decrease of power efficiency of the class-E amplifier resulting from this effect can be significant even by 40%

Off-Nominal Operation of Class-E Amplifier at Any Duty Ratio

Design equations for satisfying the suboptimum operating condition, i.e., only the zero-voltage switching (ZVS) condition, of a class-E amplifier with a linear shunt capacitance at any duty ratio are derived. By exploiting the suboptimum class-E operation, various amplifier parameters such as operating frequency, output power, load resistance, and component values can vary, while the ZVS operation and high efficiency can be achieved. An example of a design procedure of the class-E amplifier is given. The theoretical results were verified with PSpice simulation and an experiment.

Design procedure of class-E amplifier for off-nominal operation at 50% duty ratio

Design equations for satisfying the off-nominal operating condition [i.e., only the zero-voltage switching (ZVS) condition] of the Class-E amplifier with a linear shunt capacitance at a duty ratio D=0.5 are derived. A new parameter s (V/s), called the slope of switch voltage when the switch turns on is introduced to obtain an image of the distance from the nominal conditions. By examining off-nominal Class-E operation degree of the design freedom of the Class-E amplifier increases by one. In addition various amplifier parameters such as operating frequency, output power, and load resistance range can be set as design specifications. For example, the peak switch voltage and switch current can be taken into account in the design procedure. Examples of a design procedure of the Class-E amplifier for off-nominal operation are given. The theoretical results were verified with PSpice simulation and experiments.

Analysis and Design of Class E Amplifier With Shunt Capacitance Composed of Nonlinear and Linear Capacitances

The Class E amplifier requires exact shunt capacitance to achieve optimum operation. Most Class E amplifiers are usually constructed by adding an external capacitor to the output capacitance of the power transistor in order to obtain the total required shunt capacitance. The output capacitance of the power transistor is nonlinear and the external capacitance is linear. Therefore, neither design equations for linear shunt capacitance nor the design equations for nonlinear shunt capacitance can be used in most designs, especially when the two are comparable. This paper presents an analysis and a design procedure for the Class E amplifier with a shunt capacitance composed of both a transistor nonlinear output capacitance and a linear external capacitance for the duty cycle D=0.5. Because the design equations do not have analytical forms, this paper provides a table and figures, which show results of numerical analysis. The Class E amplifier can be designed using these table and figures. A design example is given to illustrate the design procedure. Simulation results of the example circuit with PSpice and experimental results are presented to verify the theoretical results.

Comparison of class-E amplifier with nonlinear and linear shunt capacitance

Comparison of various parameters of the class-E amplifier with nonlinear and linear shunt capacitance is given. A concept of an equivalent linear shunt capacitance is introduced. The following parameters are compared for the amplifiers with nonlinear and linear shunt capacitance at the duty cycle D=0.5: series reactance, peak switch voltage, and power capability. A design procedure for the class-E amplifier with a nonlinear shunt capacitance is presented. Simulation of the designed class-E amplifier is performed to verify the design equations that ensure zero-voltage-switching operation.

The use of parasitic nonlinear capacitors in class E amplifiers

The most common class E amplifier configuration uses a single transistor with a shunt capacitor and a series resonant output filter. Until now a linear shunt capacitance has been assumed. However, to achieve operation at 900 MHz and above, it is of interest to rely solely upon the nonlinear parasitic collector-substrate capacitance of the transistor. An analytical theory for operation at 50% duty cycle and nonlinear capacitance is presented in this correspondence, and the effects on the power capability of the amplifier are discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>