Linear Circuit Applications Research Articles

InGaP/GaAs camel-like gate field-effect transistor with InGaAs pseudomorphic doped-channel layer

In this paper, we first fabricate and demonstrate the InGaP/GaAs camel-like gate field-effect transistor with InGaAs pseudomorphic heavy-doped channel. Due to the large gate potential barrier for the use of the n+-GaAs/p+-InGaP/n-GaAs camel-like gate and the thin as well as heavy doping n+-InGaAs channel layer, the effective conduction band discontinuity is substantially extended and a high gate turn-on voltage up to 2.0 V is obtained. The device exhibits a relatively broad gate voltage swing resulting from the high gate turn-on voltage. In addition, a maximum drain current of 393 mA/mm and a maximum transconductance of 96 mS/mm are measured. These results indicate that the studied device is suitable for signal amplifier and linear circuit applications.

Design consideration of [formula omitted]-doping channels for high-performance n + - GaAs / p + -InGaP/n-GaAs camel-gate field effect transistors

The influence of δ -doping channels on the performance of n +-GaAs/p +-InGaP/n-GaAs camel-gate field effect transistors is investigated by theoretical analysis and experimental results. The depleted pn junction of the camel gate and the existence of considerable conduction band discontinuity at the InGaP/GaAs heterojunction enhance the potential barrier height and the forward gate voltage. As the concentration–thickness products of the n-GaAs layer and δ -doping layer are fixed, the higher δ -doping device exhibits a higher potential barrier height, a larger drain current, and a broader gate voltage swing, whereas the transconductance is somewhat lower. For a n +=5.5×10 12 cm −2 δ -doping device, the experimental result exhibits a maximum transconductance of 240 mS/mm and a gate voltage swing of 3.5 V. Consequently, the studied devices provide a good potential for large signal and linear circuit applications.

Radiation-Hardened CMOS Devices for Linear Circuit Applications

In the past, the use of MOS devices in a radiation environment has normally been restricted to applications requiring a 15 volt power supply or less. This paper discusses a new process for manufacturing high-voltage (30 volt) radiation-hardened CMOS devices for linear circuit applications. Devices have been fabricated which demonstrate hardness above 2 Mrads(Si). This paper also discusses necessary controls and design rules for this process.

Linear circuit applications of operational amplifiers

Some of the most frequently encountered linear circuit applications of operational amplifiers are discussed in this article. Included are details of differential dc amplifiers, bridge amplifiers, analog integrators, differentiators, line-driving amplifiers, ac coupled feedback amplifiers, current-to-voltage converters, reference-voltage sources, voltage regulators, current amplifiers, and charge amplifiers.

Linear applications of p-n-p-n tetrode

If a four-terminal p-n-p-n device is connected in such a way that its center junction is reversed-biased and the other two junctions are forward-biased, the device can operate as a small-signal semiconductor tetrode amplifier. This capability is demonstrated in this paper by investigating the following linear circuit applications; a controllable-gain amplifier, a signal multiplier, an amplitude modulator, and a voltage-controlled adjustable negative resistance.

A figure of merit for digital systems

The product of the signal propagation delay times the average power dissipation has been used as a figure of merit for digital systems in much the same way as the gain times bandwidth product has been used to evaluate and compare devices intended for linear circuit applications. In this paper it is shown that for simple logic systems, the delay × power product can be expressed in the form W = KΔV V cc C T , where C T is the total circuit capacitance, V cc is the power supply voltage, ΔV is the magnitude of the signal voltage transitions, and K is a constant which is usually determined by the circuit configuration but may depend on the pulse repetition frequency. Some simple logic systems are compared using this figure of merit and the results are discussed.

Quantized Probability Circuit Design Principles Applied to Linear Circuits

A circuit design method for linear circuits is needed which will adequately predict circuit per formance as a function of component tolerances. This paper describes a method which weights the probable component variation from its nominal value into one of three groups; the group assignment depends on how seriously the component variation affects over-all performance This technique, identified as the quantized probability design (QPD) method, is compared with the absolute worst case (AWC), the Taylor worst case (TWC), and the uniform probability (UP) methods. The QPD procedure is given, based on the circuit performance equation. Two linear circuit applications are presented and analyzed whic show the effect each component will have on circuit performance. A comparison of design methods shows that the quantized probability design predicts less amplifier gain variation. Actual experience has shown that a closer correlation exists with the quantized probability design method, and therefore its use for linear circuits is recommended.