Linewidth Standards Research Articles

Tip–sample characterization in the AFM study of a rod-shaped nanostructure

Accurate measurements of line-width standards, sidewalls and non-spherical nanoparticles performed at the nanoscale by means of atomic force microscopy (AFM) suffer from errors due to the tip shape and size. To reduce the uncertainty, the study here presented aims to investigate a bio-plant nanostructure, namely the tobacco mosaic virus (TMV), as a candidate reference tip characterizer.The TMV has a rod-shaped structure with a diameter of about 18 nm, reported earlier from x-ray fibre diffraction, thus representing a reference at the nanoscale. When imaged by AFM, the diameter of the TMV is determined as the top height of the rod from the reconstructed cross-section profile of isolated virions, deposited on a flat substrate like mica. A mean diameter of 16.5 nm, smaller than the nominal value by fibre diffraction measurements, is determined with our metrological AFM. Meanwhile, tip–sample–substrate interactions are discussed with reference to experimental data and models in the literature, in order to determine deformations and the associated uncertainty of corrections, with which the difference between the AFM-reconstructed top-height diameter and the nominal value reduces to about 0.3 nm.Once the virus is fully characterized, a tip profile is estimated by the AFM-reconstructed cross-section profiles of the TMV. The approach is used to evaluate the tip-related enlargement from the nominal circle size, assumed undeformed, of the TMV cross-section profile. A good repeatability of the reconstructed tip shape is achieved from subsequent imaging of virions, while tip degradations are somewhat visible over the working time.

Process optimization for lattice-selective wet etching of crystalline silicon structures

Lattice-selective etching of silicon is used in a number of applications, but it is particularly valuable in those for which the lattice-defined sidewall angle can be beneficial to the functional goals. A relatively small but important niche application is the fabrication of tip characterization standards for critical dimension atomic force microscopes (CD-AFMs). CD-AFMs are commonly used as reference tools for linewidth metrology in semiconductor manufacturing. Accurate linewidth metrology using CD-AFM, however, is critically dependent upon calibration of the tip width. Two national metrology institutes and at least two commercial vendors have explored the development of tip calibration standards using lattice-selective etching of crystalline silicon. The National Institute of Standards and Technology standard of this type is called the single crystal critical dimension reference material. These specimens, which are fabricated using a lattice-plane-selective etch on (110) silicon, exhibit near vertical sidewalls and high uniformity and can be used to calibrate CD-AFM tip width to a standard uncertainty of less than 1 nm. During the different generations of this project, we evaluated variations of the starting material and process conditions. Some of our starting materials required a large etch bias to achieve the desired linewidths. During the optimization experiment described in this paper, we found that for potassium hydroxide etching of the silicon features, it was possible to independently tune the target linewidth and minimize the linewidth nonuniformity. Consequently, this process is particularly well suited for small-batch fabrication of CD-AFM linewidth standards.

Traceable Nano Geometric Structure Measurement and International Comparison

The accuracy of geometric structure plays a key role to guarantee high quality of the nano function device and electronic device. In June 1998, the Consultative Committee for Length (CCL) of International Committee for Weights and Measures decided to carry out international comparisons of five different types of artifacts: Step height standards, 1D-gratings, line scales, 2D-gratings and line width standards. The paper described the activity of NIM in the international comparison measurement of first three items, include the characters of artifacts, the working principle of instruments, the measuring procedures, the calculation methods, the comparison results and the measurement uncertainty.

Model based reference metrology for dimensional characterization of micro- and nanostructures

The requirements on the precision of dimensional metrology are especially stringent in the area of semiconductor manufacturing. This holds in particular for the measurement and control of the linewidths of the smallest structures on masks and silicon wafers and their corresponding reference metrology. In this paper we will describe the physical models and the reference instrumentation which were developed for photomask linewidth metrology at the PTB. It will be shown, how the results of the different methods can be used for comparative analyses. Application of these methods will be demonstrated exemplarily on the basis of newly developed photomask linewidth standards.

Fabrication and characterization of sub-45 nm multiple linewidth samples

A method of fabricating nanometre scale multiple linewidth standards based on multilayer thin film deposition techniques is presented. Three layers of chromium (Cr) thin films and three layers of silicon nitride (Si3N4) thin films were alternately deposited on a silicon substrate in the radio frequency (RF) magnetron sputtering system and the low-temperature plasma enhanced chemical vapour deposition (PECVD) system. The deposition thicknesses of the Cr thin films are equal to the desired linewidths. The silicon substrate was then cut into small pieces, and the cross-section of each piece was metallographically polished. Perpendicular to the cross-section Si3N4 was etched with reactive ion etching (RIE) and nanometre scale multiple linewidth samples with nominal linewidths of 20 nm, 25 nm and 35 nm were fabricated. The fabricated samples were characterized with a scanning electron microscope (SEM). The line edge roughness (LER) and the linewidth roughness (LWR) of the lines of the fabricated samples were evaluated by an offline image analysis algorithm. The lines of the fabricated samples have uniform attributes and good linearity over hundreds of microns. The results show that the presented method is a promising method for the fabrication of nanometre scale multiple linewidth standards.

Electrical linewidth standards for advanced lithography characterization

Electrical linewidth standards for advanced lithography characterization

Life on the edge: measuring linewidths

How to measure the width of lines on a semiconductor photomask is a classic example of how NBS responds to industrial needs. The problem came to the attention of NBS researchers when a commercial standards maker sought measurements to check his linewidth standards against NBS standards.

Low-Voltage Accelerating-Voltage SEM Magnification Standard Prototype

The National Bureau of Standards has had a continuing effort for almost a decade to develop feature-size measurement techniques and the associated linewidth standards for the semiconductor industry. Recently, work began on a scanning electron microscope (SEM) based feature-size measurement program specifically aimed at the development and certification of SEM linewidth standards and the associated techniques for their calibration and use.Primary to the development and use of SEM linewidth measurement standards is the calibration of the magnification of the SEM. The only standard reference material presently available from NBS for calibrating the magnification of the SEM is the NBS SRM 484.1 This standard provides a known pitch between gold lines in a nickel matrix that is traceable to NBS primary standards. This standard has proven useful for many SEM applications and should continue to be useful for some time to come. However, since SRM 484 was developed prior to the recent interest in low accelerating voltage operation for integrated circuit wafer inspection and measurement, this SRM, in its present form, is unsuitable for use in many of the newly introduced SEM measurement instruments.

Development of accurate linewidth measurement techniques for in-process wafers

Measurements of the device geometries on “in-process” wafers present some interesting challenges. Sample coating is not possible and the measurement probe must not damage the devices. The Scanning Electron Microscope (SEM) is the standard tool for submicrometer measurements. However, operating at the low electron beam accelerating voltage required to avoid damage to integrated circuits introduces problems in resolution. Also, the measurement accuracy may be limited by the effects of surface charging and topography. Further, SEM linewidth standards do not exist at the present time. Optical measurements are attractive because, in general, they display greater precision, are typically less expensive to implement and have a higher throughput. However, diffraction effects associated with the complex three-dimensional geometries of integrated circuit structures make accurate measurements very difficult. The "blur" regions that occur in the optical image at each edge must be interpreted to predict the actual location of the structure edges.

Submicrometer linewidth metrology in the optical microscope

The recent impetus of the semiconductor industry toward submicrometer feature sizes on integrated circuits has generated an immediate need for measurement tools and standards suitable for these features. Optical techniques have the advantages of being nondestructive and of having high throughput, but the disadvantage of using wavelengths comparable to feature size which results in complex scattered fields and image structures that are difficult to interpret. Although submicrometer optical linewidth measurement is possible for 0.3 μm feature sizes, current instrumentation and linewidth standards, particularly for wafers, will have to radically improve in accuracy as well as in precision to meet the anticipated needs of the integrated circuit (IC) industry for submicrometer dimensional metrology. This paper discusses the effects of inadequate precision and accuracy on process control in IC fabrication and suggests some ways of circumventing these limitations until better instrumentation and standards become available.