LED Current Ripple Research Articles

Single‐stage triple‐output Cuk power factor correction converter

SummaryTraditional multiple‐output AC‐DC power supply with power factor correction (PFC) function usually employs a two‐stage cascaded topology that is composed of prestage PFC converter and N independent poststage DC‐DC converters to achieve PFC and voltage or current regulation of N outputs. Hence, the conventional two‐stage cascaded multiple‐output AC‐DC power supply needs N + 1 magnetic components as power inductors or transformers and N + 1 controllers, which increases the cost and size of the multioutput converters. The conventional multiple‐string AC‐DC LED driving circuits usually employ a two‐stage topology to realize PFC and independent current regulation of each LED string. To address the issue of complexity, high cost, and large size of the two‐stage multistring LED driving circuit, a single‐stage triple‐output Cuk PFC converter is proposed by cascading boost converter and single‐inductor triple‐output buck converter with sharing main power switch in this paper. The topology operation principle, control strategy, design consideration, and operation characteristics of the proposed circuit are investigated in detail. With the switch sharing and inductor multiplexing technologies at the same time, the proposed converter utilizes only single‐stage converter to achieve PFC function, independent regulation of triple‐channel output current, and flicker‐free with low twice line frequency LED current ripple. The proposed converter is verified by a 50‐W experimental prototype of LED driver for triple string LEDs. The proposed converter only uses two power inductors and a set of controller to achieve greater than 0.945 PF, up to 90.5% efficiency, low LED current ripple, and independent current regulation for triple LED strings with different forward voltage, which may significantly reduce the cost and size of the traditional AC‐DC multistring LED driving circuit.

Single‐stage PFC bridgeless converter

A power factor correction (PFC) charge-pump (CP) bridgeless converter for LEDs is presented. In the input stage, coupled inductors, together with CP capacitors, are integrated into a half-bridge inverter, thus characterising the single stage. This topology even being bridgeless due to the positioning of the load operates with a bus voltage below the bending voltage. The CP configuration is used to reduce the LED's current ripple. The prototype achieves an output power of 60 W with high power factor, achieving the efficiency of up to 94%, 127 Vac input, total harmonic distortion of input current, with harmonic magnitudes within the IEC 61000-3-2 standard class C the device limits and flicker in conformed with the recommendation of IEEE 1789.

An AC–DC LED Driver With a Two-Parallel Inverted Buck Topology for Reducing the Light Flicker in Lighting Applications to Low-Risk Levels

This paper presents an ac-dc LED driver that consists of two-parallel inverted buck converters. To buffer the twice-line-frequency energy, one inverted buck converter (also known as a floating buck converter) conveys energy to a storage capacitor, simultaneously performing the power factor correction. The other inverted buck converter regulates the LED current to maintain a constant brightness in the LEDs for reducing the light flicker to low-risk levels. The proposed architecture reduces the voltage stress and the size of the storage capacitor, enabling the use of a film capacitor instead of an electrolytic capacitor. Considering the power factor and the flicker standards, a design procedure to achieve a high power factor, while minimizing the storage capacitance and the LED current ripple, is presented. A prototype of the proposed LED driver has been implemented with an on-chip controller IC fabricated in a 0.35-μm CMOS process and its functionality and performance have been verified experimentally. It demonstrates a power factor of 0.94 and a peak power efficiency of 85.4% with an LED current ripple of 6.5%, while delivering 15 W to the LEDs.

Bipolar Ripple Cancellation Method to Achieve Single-Stage Electrolytic-Capacitor-Less High-Power LED Driver

Conventional topologies for high-power LED drivers with high power factors (PFs) require large capacitances to limit the low frequency (100 or 120 Hz) LED current ripples. Electrolytic capacitors are commonly used because they are the only capacitors with sufficient energy density to accommodate high-power applications. However, the short life span of electrolytic capacitors significantly reduces the life span of the entire LED lighting fixture, which is undesirable. This paper proposes a bipolar (ac) ripple cancellation method with two different full-bridge power structures to cancel the low-frequency ac ripple in the LED current and minimize the output capacitance requirement, enabling the use of long-life film capacitors. Compared with the existing technologies, the proposed circuit achieves zero double-line-frequency current ripple through LED lamps and achieves a high PF and high efficiency. A 100-W (150 V/0.7 A) LED driver prototype was built which demonstrates that the proposed method can achieve the same double-line-frequency LED current ripple with only 44- $\mu \text{F}$ film capacitors, compared with the 4700- $\mu \text{F}$ electrolytic capacitors required in the conventional single-stage LED drivers. Meanwhile, the proposed prototype has achieved a peak power efficiency of 92.5%, benefiting from active clamp technology.

A Novel Double Integrated Buck Offline Power Supply for Solid-State Lighting Applications

A single-stage offline power supply for LED lighting applications, based on the integration of a buck power factor corrector (PFC) and a tapped buck dc/dc converter, is presented in this paper. In addition to the high step-down capability and the output current regulation, the proposed topology effectively provides PFC to comply with the harmonic injection and energy-saving standards EN 61000-3-2 and Energy Star. The low bus voltage level, resulting from the use of an input step-down PFC stage, actually allows the use of film technology capacitors, instead of short lifetime electrolytic capacitors, to filter the bus voltage and reduce the LED current ripple component at twice the line frequency. Due to the high reliability, the simple structure, the good line-side spectral performance, and the low component count, the proposed topology effectively results to be very suitable for medium-power solid-state lighting applications, as in the case of LED downlighting. The issues related to the operation of the presented solution and to its design optimization will be carefully discussed. A prototype of the proposed ac/dc converter has been built and tested. The main experimental results will be described.

Storage Capacitance Minimization In Led Drivers Based On Photometrical Constraints And Converter Integration


 This work proposes a novel combined approach for reducing the storage capacitances in off-line high power factor LED drivers. The proposal is to combine converter integration (power factor correction plus power control stages sharing a common switch) with photometrical constraints on the maximum allowable LED current ripple. An experimental setup was used to assess the upper limit for current ripple on the LEDs based on luminous flux drop, efficacy drop and chromaticity coordinate change. By combining the ripple design constraint obtained from photometrical measurements with the design methodology of an integrated converter, the largest storage capacitances (bus and output capacitors) were greatly reduced, allowing the use of small film capacitors of long lifespan, rather than relying on large short-lived electrolytic capacitors. As a design example, an integration between a SEPIC power factor preregulator and a buck-boost power control stage was chosen and a prototype was built, fed from 220 V / 60 Hz mains voltage and feeding 56 series-associated LEDs (ca. 70 W). The driver imposed a 50% current ripple on the LEDs, value for which it was found to yield only 0.2% decrement in luminous flux, while preserving color stability.

A Study on LED Retrofit Solutions for Low-Voltage Halogen Cycle Lamps

In this paper, a study on LED retrofit solutions for low-voltage halogen cycle lamps is conducted. In the first part of this paper, a lamp based on a LED array is designed to operate in substitution of a 12-V/50-W halogen lamp, for lighting fixtures in which these lamps are supplied using a line transformer. The design includes the selection of an adequate LED array in terms of lumen output and color temperature and the calculation of the necessary heatsink to assure the correct operation of the LED lamp within the selected temperature range. In the second part of this paper, a passive converter based on a bridge rectifier and a limiting resistance is studied and tested in the laboratory. Next, an active solution based on a buck–boost converter operating in discontinuous conduction mode is designed and experimentally evaluated. Finally, a comparison in terms of input power factor, input current harmonic content, LED current ripple, LED current regulation, efficiency, and photometric characteristics is carried out.