Layered Orthogonal Lattice Detector Research Articles

Hardware Implementation of the Preprocessing QR-Decomposition for the Soft-Output MIMO Detection With Multiple Tree Traversals

Compared with the single tree detector, the layered orthogonal lattice detector (LORD), developed by Siti et al. , is a well-known soft-output multiple input multiple output detector to exploit ${M}$ parallel tree traversals to deliver data with ${M}$ times of detection throughput rate. The preprocessing QR-decomposition (QRD) of the ${M}$ -by- ${M}$ channel matrix for the single tree detector is of complexity proportional to ${M^{3}}$ . However, the preprocessing QRD for the LORD needs to compute the ${M}$ permuted channel matrices that are constructed from the original ${M}$ -by- ${M}$ channel matrix through the root conditioning criterion. The original LORD algorithm for this root conditioning QRD (RC-QRD) relies on the Gram-Schmidt orthogonalization and is of complexity proportional to ${M^{4}}$ for large ${M}$ . In this brief, we apply the Givens rotation and take advantage of the relationships among the ${M}$ permuted matrices to develop an RC-QRD algorithm with complexity proportional to ${M^{3}}$ . Furthermore, when ${M}$ is large, our proposed RC-QRD algorithm requires the number of real Givens rotations about 1.8 times necessary for computing a conventional matrix QRD. Also, for ${M=4}$ , our proposed RC-QRD hardware architecture requires gate count 2.1 times that required by the conventional triangular systolic array to compute a matrix QRD. Accordingly, with only about two times of complexity for the preprocessing RC-QRD, the LORD is able to perform ${M}$ tree traversals to deliver data with ${M}$ times of throughput rate.

Hardware oriented, quasi-optimal detectors for iterative and non-iterative MIMO receivers

Abstract In this article we study hardware-oriented versions of the recently appeared Layered ORthogonal lattice Detector (LORD) and Turbo LORD (T-LORD). LORD and T-LORD are attractive Multiple-Input Multiple-Output (MIMO) detection algorithms, that aim to approach the optimal Maximum-Likelihood (ML) and Maximum-A-Posteriori (MAP) performance, respectively, yet allowing a complexity quadratic in the number of transmitting antennas rather than exponential. LORD and T-LORD are also well suited to a hardware (e.g., ASIC or FPGA) implementation because of their regularity, parallelism, deterministic latency, and complexity. Nevertheless, their complexity is still high in case of high cardinality constellations, such as the 64-QAM foreseen by the 802.11n standard. We show that, when only global latency constraints exist, e.g., a fixed time to detect the whole OFDM symbol, the LORD and T-LORD complexity can be remarkably reduced, still approaching the ML and MAP performance, respectively. Notwithstanding the suboptimal low-complexity and hardware-oriented implementation, LORD and T-LORD approach the EXtrinsic Information Transfer of the ML and MAP detectors, respectively. To focus on a specific setting, we consider the indoor MIMO wireless LAN 802.11n standard, taking into account errors in channel estimation and a frequency selective, spatially correlated channel model.

Hardware oriented, quasi-optimal detectors for iterative and non-iterative MIMO receivers

In this article we study hardware-oriented versions of the recently appeared Layered ORthogonal lattice Detector (LORD) and Turbo LORD (T-LORD). LORD and T-LORD are attractive Multiple-Input Multiple-Output (MIMO) detection algorithms, that aim to approach the optimal Maximum-Likelihood (ML) and Maximum-A-Posteriori (MAP) performance, respectively, yet allowing a complexity quadratic in the number of transmitting antennas rather than exponential. LORD and T-LORD are also well suited to a hardware (e.g., ASIC or FPGA) implementation because of their regularity, parallelism, deterministic latency, and complexity. Nevertheless, their complexity is still high in case of high cardinality constellations, such as the 64-QAM foreseen by the 802.11n standard. We show that, when only global latency constraints exist, e.g., a fixed time to detect the whole OFDM symbol, the LORD and T-LORD complexity can be remarkably reduced, still approaching the ML and MAP performance, respectively. Notwithstanding the suboptimal low-complexity and hardware-oriented implementation, LORD and T-LORD approach the EXtrinsic Information Transfer of the ML and MAP detectors, respectively. To focus on a specific setting, we consider the indoor MIMO wireless LAN 802.11n standard, taking into account errors in channel estimation and a frequency selective, spatially correlated channel model.

Low Complexity, Quasi-Optimal MIMO Detectors for Iterative Receivers

We propose a novel family of Soft-Input Soft-Output detectors for iterative, point-to-point, MIMO receivers. Compared to the optimal Maximum A Posteriori receiver, low complexity is achieved restricting the detector search to small subsets of the entire QAM hyper-symbol constellation, through simple criteria. These criteria are applied to an improved version of the non-iterative Layered ORthogonal lattice Detector. We show that, notwithstanding the suboptimal low-complexity implementation, this detector approaches the EXtrinsic Information Transfer of the MAP detector. Therefore, when included in an iterative receiver it delivers the same performance. Furthermore, the deterministic complexity and highly parallelizable structure of the proposed detector are well suited for HDL and ASIC implementation. To focus on a specific setting, we consider the indoor MIMO wireless LAN 802.11n standard, taking into account errors in Channel Estimation and a frequency selective, spatially correlated channel model.