Lateral Bipolar Transistor Structure Research Articles

A high performance charge plasma based lateral bipolar transistor on selective buried oxide

In this paper, we present a new structure of lateral bipolar transistor on selective buried oxide. The device does not use highly doped regions; however, it employs the concept of creating n and p type charge plasma in undoped silicon by using metal electrodes of different work functions. The proposed device is named as the selective buried oxide based bipolar charge plasma transistor (SELBOX-BCPT). An extensive 2D simulation study has revealed that the proposed SELBOX-BCPT device not only possesses all the advantages of the conventional BCPT device, but it also addresses various severe problems of the BCPT device. A significant improvement in major issues of poor cutoff frequency (fT), low breakdown voltage and thermal efficiency has been achieved. It has been observed that the fT has increased by ∼94.6%, the breakdown voltage by 23.47% and the device is much cooler than the conventional BCPT device. A large current gain is obtained in the proposed device and is on a par with the conventional BCPT device. Further, by using mixed-mode simulation feature of the Atlas simulator, inverting amplifiers based on SELBOX-BCPT and the conventional BCPT have been realized. A significant improvement of 15% in switching-on transient time and 25.8% in switching-off transient time has been achieved in the proposed device in comparison to the conventional BCPT device.

Conformal mapping techniques for the analytical, two-dimensional calculation of currents in lateral bipolar transistor structures

Compact modelling of lateral bipolar transistors (available in CMOS and in bipolar processes) in a circuit designers' environment is still carried out by using theoretical approaches, which were developed for vertical transistors. These models do not reflect the two- or three-dimensionality of the current flow in these devices correctly. In this paper, an analytical theory of two-dimensional current flow in lateral bipolar transistors is presented. This theoretical approach uses conformal mapping techniques extensively. The basic mathematical and physical principles are explained, and a specially developed decomposition strategy for lateral structures is presented. With this background, a two-dimensional description of the current flow at all injection levels in these devices is derived in an analytical closed form. The presented results are in excellent agreement with numerical simulations and reveal significant differences to quasi-one-dimensional models with respect to the prediction of layout- and process-related device behaviour.

Characterization of lateral bipolar transistor structures

Semiconductor devices are being scaled down into the submicron regime in order to meet technological demands for increased device-packing densities. Other factors considered for device design include low power dissipation, noise immunity, speed and high driving capability. Of these factors, high packing densities and low power dissipation can be derived using Coinplementary-Metal-Oxide-Semiconductor (CMOS) schemes. Bipolar-Junction-Transistor (BJT) schemes on the other hand provide driving capability, low noise performance and speed, at the expense however of greater device power- consumption. Combining CMOS and BJT technologies, a compromise can be struck between devicespeed and power dissipation. Most such combinations have resulted in vertical BJT requiring complex fabrication sequences. Recently, simpler lateral BJTs have been proposed for use in Bipolar CMOS processes. The viability of such semiconducting devices depends in part on the absence or controlled presence of structural defects. Diagnostic techniques are therefore required that are capable of high spatial resolution, for investigating the origin, behavior and possible elimination of fabrication-process-induced defects. Transmission electron microscopy (TEM) of device cross-sections can be effectively used for this purpose. In this study, lateral BJT structures are characterized using cross-section TEM and the results are correlated with electrical device-behavior.

A lateral silicon-on-insulator bipolar transistor with a self-aligned base contact

A novel lateral bipolar transistor structure in silicon-on-insulator (SOI) is presented. The structure allows for a minimum geometry base width yet still provides for a metal contact to the entire base region. Fabricated transistors exhibit a base resistance of less than 20 Ω.