Large-signal Measurements Research Articles

A Compact GaN Power Amplifier Module for New Generation Cellular Basestations

This paper presents a compact class-AB Power Amplifier Module (PAM) designed for new generation massive Multiple Input Multiple Output (MiMo) cellular base stations. The module is designed at the center frequency of 3.5GHz targeting Long Term Evolution (LTE) and 5G New Radio (NR) bands. The module is a hybrid design that incorporates a Gallium Nitride (GaN) High Mobility-Electron Transistor (HEMT) die, discrete components-based input, and output matching networks. The entire design is realized on an 8.5 x 5.2 mm, 2-layer Rogers4003C substrate. The module is assembled on a PCB as an open-top for post-characterization tuning. The small signal and large signal measurements are in quite good agreement. The measurement results show that the amplifier is unconditionally stable, the input return loss is 12.2 dB, the output return loss is 7.7 dB, and the small signal gain is 13.4 dB. The saturated output power is 33.3 dBm with a Power Added Efficiency of 20.1%. The small signal gain drops to 11.2 dB at around 22 dBm of input power due to GaN technology’s intrinsic soft compression characteristics.

Physics‐informed neural network assisted automated design of power amplifier by user defined specifications

AbstractThis article presents a model that can automatically produce a power amplifier's (PA) design parameters, that is, transmission lines (TLs) dimension, from a dataset of user‐specified design goals like gain, efficiency, linearity, and scattering (S‐) parameters. Based on the applied boundary conditions, a synthetic dataset is generated with the best range of design parameters (W and L). This dataset is utilized for training the physics‐informed neural network (PINN) model with user‐specified design goals as input and design parameters as target to produce the optimum value of W and L as the resultant output. Furthermore, utilizing the obtained dimensions, design, simulation, fabrication, and measurement of a PA are performed to validate our proposed model. The results of large signal measurements of PA are drain efficiency (DE) of 26.9%, power added efficiency (PAE) of 24.7%, output power (Pout) of 30.98 dBm at an input power of 19 dBm, and gain of 12.41 dB at an operating frequency of 1.625 GHz. It has been observed that the design parameters produced by the model have a significant agreement with the validated output. Also, the statistical error analysis is done by calculating the error metrics between the validated output and the actual output of the PA design.

Giant electrostriction in bulk RE (III) substituted CeO2: Effect of RE-[formula omitted] interaction and RE concentration

Recent discovery of giant electrostriction in bulk polycrystalline ceramics and thin films of rare earth (RE (III)) substituted ceria (CeO2) driven by electroactive defect complexes and their coordinated elastic response, expands the material spectrum for electrostrain applications beyond the conventional piezoelectric materials. Bulk ceramics provide an ideal platform to systematically study electrostriction as a function of parameters such as RE3+-defect (VO••) interaction and RE concentration. In this work, we perform structure-property correlation studies in bulk ceramics of RE3+ substituted ceria (RECO) with RE=Y, La and Gd, all of them having weak dopant-defect interaction, with Y- VO•• being attractive, La-VO•• being repulsive, and Gd-VO•• being neutral. We employ large signal measurements to measure the electrostrictive coefficients of all the RECO ceramics, with varying concentration of RE3+, and show that an attractive defect-dopant interaction with atleast 20% of substituent ion concentration yields both giant M and Q electrostrictive response.

Investigation of the large-signal electromechanical behavior of ferroelectric HfO2–CeO2 thin films prepared by chemical solution deposition

Investigation of the large-signal electromechanical behavior of ferroelectric HfO2–CeO2 thin films prepared by chemical solution deposition

Compact silicon photonic Mach-Zehnder modulators for high-energy physics

The characterization of compact non-traveling-wave Mach-Zehnder modulators for optical readout in high-energy physics experiments is reported to provide power-efficient alternatives to conventional traveling-wave devices and a more resilient operation compared to ring modulators. Electro-optical small-signal and large-signal measurements showcase the performances of custom NTW-MZMs designed and fabricated in iSiPP50G IMEC's technology in the framework of INFN's FALAPHEL project. Bit-error-rate results demonstrate their potential suitability for optical links up to 25 Gb/s when equipped with either conventional deep-etched or radiation-hardened shallow-etched free-carrier-based phase shifters.

Ionic–electronic dynamics in an electrochemical gate stack toward high-speed artificial synapses

Despite their great synaptic potential, the trade-off between programming speed and energy consumption of electrochemical random-access memory (ECRAM) devices are major hindrance to their incorporation into practical applications. In this work, we experimentally study the main limiting factor for high-speed programming of ECRAMs, the ionic current in the gate stack. We use two-terminal structures composed of LiCoO2/Li3PO4/amorphous-Si to represent the ECRAM gate stack (reservoir/electrolyte/channel). We perform electrical characterization including impedance spectroscopy (small-signal) and large-signal transient measurements across nine orders of magnitude in the time domain. We find that at the sub-microseconds range, the current is governed by the energy barrier for Li+ ions at the electrolyte interfaces. After a period of ∼1 μs, ionic migration through the ∼80 nm electrolyte layer dictates the current. At ∼50 μs, the ionic double layer at the interface is fully charged and the gate current drops by several orders of magnitude, indicating that the Li3PO4/Si interface is saturated, and the measured current is dominated by the electronic leakage component. Furthermore, we evaluate ECRAM performance under various pulse parameters. Our predictions show that an aggressively scaled (atomically thin) channel having a low carrier density of ∼1011 cm−2 can be programmed at ∼nanosecond using a gate current of ∼100 A/cm2.

Dependence of Device Performances on Fin Ratios of AlGaN/GaN Nanoscale Fin-HEMTs

In this article, we report the fabrication and characterization of AlGaN/GaN fin-type high electron mobility transistors (Fin-HEMTs) grown on high-resistance silicon substrates. The Fin-HEMTs have a gate length of 125 nm by using electron-beam lithography with various fin ratios, which are defined as the total effective periodic gate widths over the gate width, along the whole gate width. The Fin-HEMTs are designed with three fin ratios of 0.5, 0.3, and 0.25. The on-resistance decreases with reducing the fin ratio and reaches 1.1 Ω mm at the fin ratio of 0.25. In addition, the Fin-HEMT with a fin ratio of 0.25 still exhibits a 14% higher drain current density than the planar device. With tetramethylammonium hydroxide (TMAH) etching, the current collapse caused by surface traps on the fin’s sidewalls is significantly reduced from 28.9% to 2.4% by the pulse I-V measurement. The Fin-HEMTs also can improve the gate control capability through the analyses of small-signal and large-signal measurements.

Dual-Band Dual-Output Doherty Power Amplifier for Unsynchronized Time-Division Duplexing

Conventional multiband power amplifiers (PAs), when working in time-division duplex (TDD), require the transmit–receive intervals of all bands to be synchronized. This is an undesirable constraint in modern radio base stations. This article proposes a dual-output dual-band Doherty PA (DB-DPA) that enables the loading of one band to be switched on-and-off without impacting the other band in normal transmission. A thorough analysis of the proposed dual-output DB-DPA architecture is presented, and a dual-output DB-DPA prototype operating at 1.4 and 2.6GHz has been designed as a proof of concept. The large-signal measurements of the prototype DB-DPA indicate Doherty behavior at both frequencies with over 56% saturation efficiency and 45% efficiency at 6-dB power back-off (PBO). Furthermore, single-band and concurrent dual-band linearized modulated measurements, using 10-MHz new radio (NR) signals with 6-dB peak-to-average power ratio (PAPR), demonstrate the linearizability of the proposed DB-DPA and its usefulness for unsynchronized TDD applications.

Characteristics Comparison of Nanochannel GaN-on-Si and GaN-on-SiC HEMTs

A comparative investigation on device characteristics of GaN-on-Si and GaN-on-SiC high electron mobility transistors (HEMTs) fabricated with the gate lengths of 175, 150, and 125 nm is conducted. The device performance of the HEMTs is evaluated through DC current-voltage, small-signal, and large-signal measurements. The HEMTs with 125 nm gate length exhibit better characteristics than the HEMTs with other gate lengths. Besides, obvious increases of maximum transconductance (Gm), drain current density (JD), on/off current ratio, cutoff frequency (fT), maximum oscillation frequency (fmax), power gain, and power-added efficiency (PAE) are observed for GaN-on-SiC HEMTs as compared with those for the GaN-on-Si HEMTs. The GaN-on-SiC HEMT with a gate length of 125 nm delivers a maximum Gm of 299 mS mm−1, a JD larger than 1.1 A mm−1, an on/off current ratio of 3.8 × 104, a fT of 59.4 GHz, a fmax of 62.3 GHz, a power gain of 17.6 dB, and PAE of 63.8%, which make it promising for RF power amplifier application.

The Effect of Collector Region Design on Large-Signal Performance of Horizontal Current Bipolar Transistor (HCBT)

The impact of collector region design on large-signal performance of horizontal current bipolar transistor (HCBT) technology is investigated by calibrated time-domain load-pull measurements. Three representative high-performance devices of the same geometry but with different collector doping profiles, namely, uniform, n-well, and low-doped, are subjected to large-signal measurements wherein the radio frequency (RF) time-domain waveforms of current and voltage are measured to facilitate the determination of the maximum output power for each device. The extensive measurements outline the boundaries of the maximum collector current and voltage swings at RF determining linear operating area, which are a result of the physical phenomena in the high-current and high-voltage regimes, namely, the Kirk effect and impact ionization, respectively. While the highest-doped n-well HCBT provides the highest output power of 25.3 dBm at 1-dB gain compression, and the lowest-doped HCBT enables a wideband match at the collector, the HCBT with a uniform doping profile provides a tradeoff between the output power and bandwidth of the output match. The results show the versatility of HCBT technology as an alternative to CMOS and/or sillicon–germanium (SiGe) large-signal RF circuits for the front-ends (FEs) in the sub-6 GHz wireless communications range.

Submicrometer‐Thick Step‐Graded AlGaN Buffer on Silicon with a High‐Buffer Breakdown Field

Submicrometer‐thick AlGaN/GaN high‐electron‐mobility transistor (HEMT) epilayers grown on silicon substrate with a state‐of‐the art vertical buffer breakdown field as high as 6 MV cm−1 enabling a high transistor breakdown voltage of 250 V for short gate‐to‐drain distances despite such a thin structure are reported. HEMTs with a gate length of 100 nm exhibit good DC characteristics with a low drain‐induced barrier, going as low as 100 mV V−1 for a VDS of 30 V. Breakdown voltages of each epilayer from the decomposed heterostructure reveals that the outstanding breakdown strength is attributed to the insertion of Al‐rich AlGaN in the buffer layers combined with an optimized AlN nucleation layer. As a result, large signal measurements at 10 GHz could be reliably achieved up to VDS = 35 V despite the use of a 100 nm gate length. These results demonstrate the potential of submicrometer‐thick buffer GaN‐on‐Si heterostructures for high‐frequency applications.

Uncertainties in Small-Signal and Large-Signal Measurements of RF Amplifiers Using a VNA

Uncertainties in typical small-signal and large-signal amplifier parameters measured using a vector network analyzer (VNA) are investigated in this paper. Methods to evaluate the measurement uncertainty in return losses, input power, output power, power gain, 1 dB compression point, etc., based on the use of the VNA dynamic uncertainty option (VNA-DUO) software tool from Keysight Technologies, are applied to a commercial amplifier between 0.5 GHz and 8 GHz.

DC Power-Optimized Ka-Band GaN-on-Si Low-Noise Amplifier With 1.5 dB Noise Figure

A <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Ka</i> -band low-noise amplifier for low-consumption robust receivers is presented in this letter. The monolithic microwave integrated circuit (MMIC) is designed on a 100 nm GaN-on-Si technology provided by OMMIC foundry and decibel gain, average noise figure (NF) of 1.5 dB, with input–output return losses better than 15 dB in the whole 27–31 GHz design band. Large signal measurements show a OP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1 dBcp</sub> of +16 dBm and survivability to RF input power verified up to +25 dBm without showing critical degradation. These performances have been achieved with only 150 mW dc power consumption in linear operating condition, 30% less than other <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Ka</i> -band GaN LNAs published in the open literature.

Advances in Microwave Large-Signal Metrology: From Vector-Receiver Load-Pull to Vector Signal Network Analyzer and Time-Domain Load-Pull Implementations (Invited Paper)

Radiofrequency (RF) power amplifiers (PAs) are important elements of modern communication systems. The most important components in PAs are the transistors, which are operated under large-signal regimes in such applications. Designing and optimizing PAs are challenging tasks that demand the highest accuracy on large-signal measurements at both device and circuit levels. Large-signal power transistor characterization demands the development and utilization of high-frequency and low-frequency load-pull systems. Furthermore, the static and dynamic characterization of two-input PAs requires the development of new measurement systems that consist of an nonlinear vector network analyzer (NVNA) and an arbitrary waveform generators (AWG). This paper reviews the research activities, achievements, and current research goals at CICESE Research Center in Mexico in the large-signal microwave metrology field.

GaN MMICs on a diamond heat spreader with through-substrate vias fabricated by deep dry etching process

GaN monolithic microwave integrated circuits (MMICs) on a diamond heat spreader were successfully fabricated and demonstrated. The diamond was bonded to the back-side surface of the GaN on SiC devices by atomic diffusion bonding. In addition, through-substrate vias (TSVs) of diamond and SiC were fabricated using a deep dry etching process. This study marks the first development of GaN MMIC on diamond with TSVs fabricated using diamond etching. From the large-signal measurement of GaN MMICs at 7 GHz, the output power of the device with diamond during continuous wave operation was improved by 11% compared to that of without diamond.

High-Temperature Characterization of Multiple Silicon-Based Substrate for RF-IC Applications

This paper focuses on the comparison of various advanced substrates such as trap-rich (TR), porous silicon (PSi), gold-doped (Au-Si) and smart-implants PN-junction (DP) in terms of RF performances. Both small-and large-signal measurements were performed, including the study of the influence of temperature and DC bias voltage. The purpose of this paper is to provide an overview, and a more in-depth analysis of DP substrate, of the characteristics of these multiple substrates to facilitate design choices for RF-IC applications.

An Accurate Neural Network-Based Consistent Gate Charge Model for GaN HEMTs by Refining Intrinsic Capacitances

Neural network-based capacitance models are accurate, but some of them are not charge-conservative. In this work, a novel consistent gate charge model for GaN high electron mobility transistors is presented based on neural networks. The equivalent circuit parameters are extracted using the multiobjective gray wolf optimizer-based hybrid method, which improves the accuracy of parameter extraction. To obtain more reliable data sets for accurate neural network-based modeling, the outliers in the extracted intrinsic capacitances are automatically detected and removed using the isolation forest technique. The gate charge is obtained by integrating the capacitances with the voltages at different temperatures. A neural network is used to model the bias- and temperature-dependent gate charges, and the intrinsic capacitance formulation is obtained by taking the partial derivative of the gate charge function with respect to the voltages. The proposed model is charge-conservative and requires no transcapacitances. The large-signal model is implemented in the Advanced Design System and verified by small- and large-signal measurements. Good agreement is obtained between the measurements and simulations.

Comparison of Different Large Signal Measurement Setups for High Frequency Inductors

The growing interest of miniaturized power converters has pushed the development of high frequency inductors integrated in Power Supply on Chip or Power Supply in Package. The proper characterization of inductor impedance is a challenge due to the dependence of the impedance on the current, the high quality factor (Q) and the high frequency range where these devices operate. In this paper, we present a comparison of different measuring methods to characterize high frequency and high Q inductors. The comparison is based on a systematic analysis of the measurement process, quantifying the influence of the parameters that affect the measurement result. Four common measurement setups are analyzed and compared. To validate the calculations, the resistance of a high frequency, high-Q inductor is characterized using every presented setup. The good match between calculations, simulation and measurement validates the analysis and the conclusions extracted.

Trapping Dynamics in GaN HEMTs for Millimeter-Wave Applications: Measurement-Based Characterization and Technology Comparison

Charge trapping effects represent a major challenge in the performance evaluation and the measurement-based compact modeling of modern short-gate-length (i.e., ≤0.15 μm) Gallium Nitride (GaN) high-electron mobility transistors (HEMT) technology for millimeter-wave applications. In this work, we propose a comprehensive experimental methodology based on multi-bias large-signal transient measurements, useful to characterize charge-trapping dynamics in terms of both capture and release mechanisms across the whole device safe operating area (SOA). From this dataset, characterizations, such as static-IV, pulsed-IV, and trapping time constants, are seamlessly extracted, thus allowing for the separation of trapping and thermal phenomena and delivering a complete basis for measurement-based compact modeling. The approach is applied to different state-of-the-art GaN HEMT commercial technologies, providing a comparative analysis of the measured effects.

Large-Signal Modeling of GaN HEMTs Using Hybrid GA-ANN, PSO-SVR, and GPR-Based Approaches

This article presents an extensive study and demonstration of efficient electrothermal large-signal GaN HEMT modeling approaches based on combined techniques of Genetic Algorithm (GA) with Artificial Neural Networks (ANN), and Particle Swarm optimization (PSO) with Support Vector Regression (SVR). Another promising Gaussian Process Regression (GPR) based large-signal modeling approach is also explored and presented. The GA-ANN addresses the typical problem of local minima associated with the backpropagation (BP) based ANN. The GA successfully aids in the determination of optimal initial values for BP-ANN and enables it to find a unique optimal solution after subsequent of iterations with higher rate of convergence. This is also achieved using PSO-SVR with lower optimization variables. The developed modeling techniques are demonstrated and used to simulate the gate and drain currents of a 2-mm GaN device. All the models are relatively simple, practical, and easy to implement. The gate and drain currents models are embedded in an equivalent large-signal circuit's model and built in Advanced Design System (ADS) software. The implemented model is validated by large-signal measurements and very good fitting results have been obtained. The model also showed an accurate simulation for a nonlinear power amplifier with very good computational speed and convergence.