Ion Gel Gate Dielectrics Research Articles

Atomically thin alkane passivation layer for flexible and transparent graphene electronics

We report an atomically-thin passivation layer composed of a self-assembled alkane monolayer, that protects graphene from outside dopants and external contamination while retaining its transparency, flexibility and superior electron transfer ability. These advantages allowed successful fabrication of passivated graphene field-effect transistors (G-FETs) on a plastic substrate with ion-gel gate dielectrics for transparent and flexible electronics. This highly transparent, flexible, and ultra-thin organic passivation layer has many possible applications in electronics that use graphene.

Highly Tunable, Broadband, and Negative Photoresponse MoS2 Photodetector Driven by Ion-Gel Gate Dielectrics.

Revealing the light-matter interaction of molybdenum disulfide (MoS2) and further improving its tunability facilitate the construction of highly integrated optoelectronics in communication and wearable healthcare, but it still remains a significant challenge. Herein, polyvinylidene fluoride and 1-ethyl-3-methylimidazolium bis(trifluoromethylsulfonyl)imide (PVDF-EMIM-TFSI) ion-gel are employed to replace the oxide to fabricate a MoS2-based phototransistor. The high capacitance enables a large tunability of the carrier concentration that results in ambipolar transport of MoS2. It is found that the photoelectrical effect of the MoS2 ion-gel phototransistor can be greatly tuned by the gate voltage including its photoresponsivity, detectivity, and response wavelength. An abnormal negative photoelectrical effect in both the electron branch and the hole branch is observed which is due to the adsorption/desorption of the C2F6NO4S2- ion. By tuning the carrier concentration, the photoresponse can be extended from the visible region to the short infrared region. At 1200 nm, the photoresponse and detectivity can be tuned as large as 0.90 A/W and 1.88 × 1011 Jones, respectively. Ultimately, by combining the tunability of gate voltage and wavelength, it is demonstrated that the photoelectrical effect is dominated by the photogating effect in the hole carrier, while it is coregulated by a photogating and photothermal effect in electron carrier. This study provides new insights for developing a highly tunable broadband photodetector with low consumption.

In-Plane Amorphous Oxide Ionotronic Devices and Circuits with Photochemically Enabled Favorable Interfaces.

Here, we demonstrate a side-gated in-plane structure of solution-processed amorphous oxide semiconductor ionotronic devices and logic circuits enabled by ion gel gate dielectrics with a monolithically integrated nanoscale passivation architecture. The large capacitance of the electric double layer (EDL) in the ion gel allows a device structure to be a side gate geometry, forming an in-plane structured amorphous In-Ga-Zn-O (a-IGZO) ionotronic transistor, which can be translated into a simplified logic gate configuration with a low operation voltage. Particularly, the monolithic passivation of the coplanar electrodes offers advantages over conventional inhomogeneous passivation, mitigating unintentional parasitic leakage current through the ion gel dielectric layer. More importantly, the monolithically integrated passivation over electrodes was readily obtained with a complementary metal-oxide semiconductor-compatible photochemical process by employing a controlled ultraviolet light manipulation under ozone ambient, which introduced not only much enhanced electrical characteristics but also a scalable device architecture. We investigated various electrical behaviors of the side-gated a-IGZO ionotronic transistor based on EDL, which is called an electric double layer transistor (EDLT), and logic circuits enabled by photochemically realized monolithic aluminum oxide (AlOX) passivation comparing to the native or polymerized passivation layer, which reveals that the photoassisted AlOX secures high-performance a-IGZO EDLTs with a low off current (<5.23 × 10-8 A), high on/off ratio (>1.87 × 105), and exceptional high carrier mobility (>14.5 cm2 V-1 s-1). Owing to the significantly improved electrical characteristics, an inverter circuit was successfully achieved with broad operation voltages from an ultralow VDD of 1 mV to 1.5 V, showing a fully logical voltage transfer characteristic with a gain of more than 4 V V-1.

Sub‐3 V ZnO Electrolyte‐Gated Transistors and Circuits with Screen‐Printed and Photo‐Crosslinked Ion Gel Gate Dielectrics: New Routes to Improved Performance

AbstractA facile, high‐resolution patterning process is introduced for fabrication of electrolyte‐gated transistors (EGTs) and circuits using a photo‐crosslinkable ion gel and stencil‐based screen printing. The photo‐crosslinkable gel is based on a triblock copolymer incorporating UV‐sensitive terminal azide functionality and a common ionic liquid. Using this material in conjunction with conventional photolithography and stenciling techniques, well‐defined 0.5–1 μm thick ion gel films are patterned on semiconductor channels as narrow as 10 μm. The resulting n‐type ZnO EGTs display high electron mobility (&gt;2 cm2 Vs−1) and on/off current ratios (&gt;105). Further, EGT‐based inverters exhibit static gains &gt;23 at supply voltages below 3 V, and five‐stage EGT ring oscillator circuits display dynamic propagation delays of 50 μs per stage. In general, the screen printing and photo‐crosslinking strategy provides a clean room‐compatible method to fabricate EGT circuits with improved sensitivity (gain) and computational power (gain × oscillating frequency). Detailed device analysis indicates that significantly shorter delay times, of order 1 μs, can be obtained by improving the ion gel conductance.

Ultralow voltage operation of biologically assembled all carbon nanotube nanomesh transistors with ion-gel gate dielectrics

The demonstration of field-effect transistors (FETs) based entirely on single-walled carbon nanotubes (SWNTs) would enable the fabrication of high-on-current, flexible, transparent and stretchable devices owing to the excellent electrical, optical, and mechanical properties of SWNTs. Fabricating all-SWNT-based FETs via simple solution process, at room temperature and without using lithography and vacuum process could further broaden the applicability of all-SWNT-FETs. In this work, we report on biologically assembled all SWNT-based transistors and demonstrate that ion-gel-gated network structures of unsorted SWNTs assembled using a biological template material enabled operation of SWNT-based transistors at a very low voltage. The compatibility of the biologically assembled SWNT networks with ion gel dielectrics and the large capacitance of both the three-dimensional channel networks and the ion gel allowed an ultralow operation voltage. The all-SWNT-based FETs showed an Ion/Ioff value of >102, an on-current density per channel width of 2.16 × 10−4 A/mm at VDS = 0.4 V, and a field-effect hole mobility of 1.12 cm2/V · s in addition to the low operation voltage of <−0.5 V. We envision that our work suggests a solution-based simple and low-cost approach to realizing all-carbon-based FETs for low voltage operation and flexible applications.

Large‐Area Schottky Barrier Transistors Based on Vertically Stacked Graphene–Metal Oxide Heterostructures

The fabrication of all‐transparent flexible vertical Schottky barrier (SB) transistors and logic gates based on graphene–metal oxide–metal heterostructures and ion gel gate dielectrics is demonstrated. The vertical SB transistor structure is formed by (i) vertically sandwiching a solution‐processed indium‐gallium‐zinc‐oxide (IGZO) semiconductor layer between graphene (source) and metallic (drain) electrodes and (ii) employing a separate coplanar gate electrode bridged with a vertical channel through an ion gel. The channel current is modulated by tuning the Schottky barrier height across the graphene–IGZO junction under an applied external gate bias. The ion gel gate dielectric with high specific capacitance enables modulation of the Schottky barrier height at the graphene–IGZO junction over 0.87 eV using a voltage below 2 V. The resulting vertical devices show high current densities (18.9 A cm−2) and on–off current ratios (&gt;104) at low voltages. The simple structure of the unit transistor enables the successful fabrication of low‐power logic gates based on device assemblies, such as the NOT, NAND, and NOR gates, prepared on a flexible substrate. The facile, large‐area, and room‐temperature deposition of both semiconducting metal oxide and gate insulators integrates with transparent and flexible graphene opens up new opportunities for realizing graphene‐based future electronics.

이온젤 전해질 절연체 기반 고분자 비휘발성 메모리 트랜지스터

We demonstrate the utilization of ion gel gate dielectrics for operating non-volatile transistor memory devices based on polymer semiconductor thin films. The gating process in typical electrolyte-gated polymer transistors occurs upon the penetration and escape of ionic components into the active channel layer, which dopes and dedopes the polymer film, respectively. Therefore, by controlling doping and dedoping processes, electrical current signals through the polymer film can be memorized and erased over a period of time, which constitutes the transistor-type memory devices. It was found that increasing the thickness of polymer films can enhance the memory performance of device including (i) the current signal ratio between its memorized state and erased state and (ii) the retention time of the signal.

Stretchable Carbon Nanotube Transistors Enabled By Buckled Carbon Nanotube Thins Films, Ion Gel Gate Dielectrics, and Metal Electrodes

Deformable field-effect transistors (FETs) are expected to facilitate new technologies like stretchable displays, conformal devices, and electronic skins. Thin film percolating networks of electronic-type controlled semiconducting carbon nanotubes are highly intriguing options for the active channel of stretchable FETs due to the excellent mechanical resilience of individual nanotubes, their possibility to accommodate large strain in thin film form via nanotube–nanotube sliding and buckling, and their exceptional charge transport properties. We demonstrate stretchable FETs based on buckled thin films of polyfluorene-wrapped semiconducting single-walled carbon nanotubes as the channel, buckled metal films as electrodes, and unbuckled flexible ion gel films as the dielectric.[1] The buckled thin film morphology is induced by depositing the nanotubes onto a pre-strained polydimethylsiloxane (PDMS) substrate and then releasing it, greatly improving the device stretchability. The FETs are stretchable up to 50% without appreciable degradation in performance before failure of the ion gel film. We furthermore show that by buckling the ion gel, the integrity and performance of the nanotube FETs are extended to nearly 90% elongation, limited by the stretchability of the elastomer substrate.[2] The FETs maintain an on/off ratio of >104 and a field-effect mobility of 5 cm2 V−1 s−1 under elongation and demonstrate invariant performance over 1000 stretching cycles. [1] Xu F, Wu M-Y, Safron NS, Singha Roy S, Jacobberger RM, Bindl DJ, Seo J-H, Chang T-H, Ma Z, Arnold MS, Highly Stretchable Carbon Nanotube Transistors with Ion Gel Gate Dielectrics, NANO LETTERS, 4 (2), pp 682–686 (2014). [2] Wu M-Y, Zhao J, Xu F, Chang T-H, Jacobberger RM, Ma Z, Arnold MS, Highly Stretchable Carbon Nanotube Transistors Enabled by Buckled Ion Gel Gate Dielectrics, APPLIED PHYSICS LETTERS, 107, 053301 (2015).

Solution-processed lithium-doped zinc oxide thin-film transistors at low temperatures between 100 and 300 °C

Lithium-doped zinc oxide (Li-ZnO) thin-film transistors (TFTs) were fabricated by solution process at the low temperatures ranged from 100 to 300 °C. Li-ZnO TFTs fabricated at 300 °C under nitrogen condition showed a mobility of 1.2 cm2/Vs. Most importantly, the mobility of Li-ZnO TFT devices fabricated at 100 °C could be increased significantly from 0.08 to 0.4 cm2/Vs by using double spin-coated and UV irradiation-treated Li-ZnO film, and the on-/off-current ratio is in the order of 106. Notably, the XPS analyses proved that the performance improvement was originated from the chemical composition or stoichiometry evolution, in which the hydroxide was converted into metal oxide and accelerated the formation of the oxygen vacancies. Furthermore, low-voltage operating Li-ZnO TFTs were demonstrated by using a high-capacitance ion gel gate dielectrics. The Li-ZnO TFTs with an operating voltage as low as 2 V exhibited the carrier mobilities of 2.1 and 0.65 cm2/Vs for the devices treated at 300 and 100 °C, respectively. The low-temperature, solution-processed Li-ZnO TFTs showed greatly potential applications in flexible displays, smart label, and sensors.

Graphene Nanoribbons from Tetraphenylethene‐Based Polymeric Precursor: Chemical Synthesis and Application in Thin‐Film Field‐Effect Transistor

AbstractGraphene nanoribbons (GNRs) with a non‐zero bandgap are regarded as a promising candidate for the fabrication of electronic devices. In this study, large‐scale solution synthesis of narrow GNRs was firstly achieved by the intramolecular cyclodehydrogenation of kinked tetraphenylethene (TPE) polymer precursors prepared by A2B2‐type Suzuki‐Miyaura polymerization. After the cyclization reaction, the nanoribbons have a better conjugation than the twisted polymer precursor, resulting in obvious red shift in UV/vis absorption and photoluminescence (PL) spectra. The efficient formation of conjugated nanoribbons was also investigated by Raman, FTIR spectroscopy, and microscopic studies. Furthermore, such structurally well‐defined GNRs have been successfully developed for top‐gated field‐effect transistor (FET) by directly solution processing. The AFM images show that the prepared‐GNRs thin films form crystalline fibrillar intercalating networks, which can effectively facilitate the charge transport. These FET devices with ion‐gel gate dielectrics exhibit low‐voltage operation (&lt;5 V) with excellent mobility up to 0.41 cm2·V−1·s−1 and an on‐off ratio of 3×104, thus opening up new opportunities for flexible GNRs‐based electronic devices.

Electrolyte-gated graphene Schottky barrier transistors.

A new device architecture for flexible vertical Schottky barrier (SB) transistors and logic gates based on graphene-organic-semiconductor-metal heterostructures and ion gel gate dielectrics is demonstrated. The devices show well-behaved p- and n-type characteristics under low-voltage operation (<1 V), yielding high current densities (>100 mA cm(-2) ) and on/off current ratios (>10(3) ).

Optical phonons in twisted bilayer graphene with gate-induced asymmetric doping.

Twisted bilayer graphene (tBLG) devices with ion gel gate dielectrics are studied using Raman spectroscopy in the twist angle regime where a resonantly enhanced G band can be observed. We observe prominent splitting and intensity quenching on the G Raman band when the carrier density is tuned away from charge neutrality. This G peak splitting is attributed to asymmetric charge doping in the two graphene layers, which reveals individual phonon self-energy renormalization of the two weakly coupled layers of graphene. We estimate the effective interlayer capacitance at low doping density of tBLG using an interlayer screening model. The anomalous intensity quenching of both G peaks is ascribed to the suppression of resonant interband transitions between the two saddle points (van Hove singularities) that are displaced in the momentum space by gate-tuning. In addition, we observe a softening (hardening) of the R Raman band, a superlattice-induced phonon mode in tBLG, in electron (hole) doping. Our results demonstrate that gate modulation can be used to control the optoelectronic and vibrational properties in tBLG devices.

Photo-patternable ion gel-gated graphene transistors and inverters on plastic

We demonstrate photo-patternable ion gel-gated graphene transistors and inverters on plastic substrates. The photo-patternable ion gel can be used as a negative photoresist for the patterning of underlying graphene as well as gate dielectrics. As a result, an extra graphene-patterning step is not required, which simplifies the device fabrication and avoids a side effect arising from the photoresist residue. The high capacitance of ion gel gate dielectrics yielded a low voltage operation (∼2 V) of the graphene transistor and inverter. The graphene transistors on plastic showed an on/off-current ratio of ∼11.5, along with hole and electron mobilities of 852 ± 124 and 452 ± 98 cm2 V−1 s−1, respectively. In addition, the flexible graphene inverter was successfully fabricated on plastic through the potential superposition effect from the drain bias. These devices show excellent mechanical flexibility and fatigue stability.

Selective Decoration of Au Nanoparticles on Monolayer MoS2 Single Crystals

We report a controllable wet method for effective decoration of 2-dimensional (2D) molybdenum disulfide (MoS2) layers with Au nanoparticles (NPs). Au NPs can be selectively formed on the edge sites or defective sites of MoS2 layers. The Au-MoS2 nano-composites are formed by non-covalent bond. The size distribution, morphology and density of the metal nanoparticles can be tuned by changing the defect density in MoS2 layers. Field effect transistors were directly fabricated by placing ion gel gate dielectrics on Au-decorated MoS2 layers without the need to transfer these MoS2 layers to SiO2/Si substrates for bottom gate devices. The ion gel method allows probing the intrinsic electrical properties of the as-grown and Au-decorated MoS2 layers. This study shows that Au NPs impose remarkable p-doping effects to the MoS2 transistors without degrading their electrical characteristics.

Highly Flexible MoS2 Thin-Film Transistors with Ion Gel Dielectrics

Molybdenum disulfide (MoS(2)) thin-film transistors were fabricated with ion gel gate dielectrics. These thin-film transistors exhibited excellent band transport with a low threshold voltage (<1 V), high mobility (12.5 cm(2)/(V·s)) and a high on/off current ratio (10(5)). Furthermore, the MoS(2) transistors exhibited remarkably high mechanical flexibility, and no degradation in the electrical characteristics was observed when they were significantly bent to a curvature radius of 0.75 mm. The superior electrical performance and excellent pliability of MoS(2) films make them suitable for use in large-area flexible electronics.

Low-voltage solution-processed graphene transistors based on chemically and solvothermally reduced graphene oxide

We have developed solution-processed reduced graphene oxide (RGO) transistors with ion gel gate dielectrics. The combination of solution-processed high-capacitance ion gel gate dielectrics and spray-coated RGO films yielded high-performance RGO transistors that operated below 4 V. Two reduction processes were applied to GO: (i) chemical reduction by hydrazine and (ii) solvothermal reduction in N-methyl-2-pyrrolidone. Chemical reduction provided a more efficient route to reduce GO than solvothermal reduction, and the resulting RGO films yielded higher electron and hole mobilities than films based on solvothermal methods. Temperature-dependent transport studies revealed that higher mobilities in RGO films based on chemical reduction result from (i) more effective delocalization of the charge carriers, (ii) more numerous localized states near the Fermi energy, and (iii) a longer optimum hopping distance, compared to those for films based on solvothermal reduction.

High-Performance Flexible Graphene Field Effect Transistors with Ion Gel Gate Dielectrics

A high-performance low-voltage graphene field-effect transistor (FET) array was fabricated on a flexible polymer substrate using solution-processable, high-capacitance ion gel gate dielectrics. The high capacitance of the ion gel, which originated from the formation of an electric double layer under the application of a gate voltage, yielded a high on-current and low voltage operation below 3 V. The graphene FETs fabricated on the plastic substrates showed a hole and electron mobility of 203 +/- 57 and 91 +/- 50 cm(2)/(V x s), respectively, at a drain bias of -1 V. Moreover, ion gel gated graphene FETs on the plastic substrates exhibited remarkably good mechanical flexibility. This method represents a significant step in the application of graphene to flexible and stretchable electronics.

Printed, Sub-3V Digital Circuits on Plastic from Aqueous Carbon Nanotube Inks

Printing electronic components on plastic foils with functional liquid inks is an attractive approach for achieving flexible and low-cost circuitry for applications such as bendable displays and large-area sensors. The challenges for printed electronics, however, include characteristically slow switching frequencies and associated high supply voltages, which together impede widespread application. Combining printable high-capacitance dielectrics with printable high-mobility semiconductors could potentially solve these problems. Here we demonstrate fast, flexible digital circuits based on semiconducting carbon nanotube (CNT) networks and high-capacitance ion gel gate dielectrics, which were patterned by jet printing of liquid inks. Ion gel-gated CNT thin-film transistors (TFTs) with 50 microm channel lengths display ambipolar transport with electron and hole mobilities >20 cm(2)/V.s; these devices form the basis of printed inverters, NAND gates, and ring oscillators on both polyimide and SiO(2) substrates. Five-stage ring oscillators achieve frequencies >2 kHz at supply voltages of 2.5 V, corresponding to stage delay times of 50 micros. This performance represents a substantial improvement for printed circuitry fabricated from functional liquid inks.