Inverter Scheme Research Articles

New space vector pulse code modulation scheme for multilevel inverters with reduced zero sequence voltage and reduced switching losses

New space vector pulse code modulation scheme for multilevel inverters with reduced zero sequence voltage and reduced switching losses

Design and Implementation of Model Parameter Independent Robust Current Control Scheme of Three-Phase Inverter - A Neural Network-Based Classification Approach

Design and Implementation of Model Parameter Independent Robust Current Control Scheme of Three-Phase Inverter - A Neural Network-Based Classification Approach

IIR filter-based compensator with modified feedback repetitive control scheme of voltage source inverter for nonlinear load applications

IIR filter-based compensator with modified feedback repetitive control scheme of voltage source inverter for nonlinear load applications

Design of power efficient and reliable hybrid inverter approach based 11 T SRAM design using GNRFET technology

Designing a power efficient and high-speed static random-access memory (SRAM) cell with improved noise stability using traditional complementary metal oxide semiconductor (CMOS) devices is an arduous task. Owing to balanced electrical properties of graphene nanoribbon field-effect transistor (GNRFET), its capability to realize high performance SRAM cells need a keen exploration. This article proposes an 11-transistor GNRFET SRAM cell which deploys hybrid inverter scheme. The hybrid inverter scheme encompasses two distinct inverters, based on stacked transistors and Schmitt trigger (ST) techniques. The simulations conducted using 16 nm GNRFET model in HSPICE simulator show that proposed SRAM cell has write power, hold power, read power, write static noise margin, hold static noise margin, read static noise margin, write delay and read delay of 0.445 nW, 0.978 µW, 1.8 nW, 225 mV, 222.8 mV, 225.1 mV, 24 pS and 49.6 pS, respectively. The results obtained for proposed SRAM cell have been found to be encouraging in contrast to previously reported SRAM cells implemented using 16 nm GNRFET model. Besides this, the effect of variation in various parameters of GNRFET on performance of proposed SRAM cell has been investigated in this article. The outstanding performance results of SRAM makes its suitable for developing high performance memories devices for biomedical digital gadgets, internet of things (IoT), artificial intelligence (AI) and smart agricultural applications.

Zero-Sequence Voltage Error Elimination-Based Offline VSI Nonlinearity Identification for PMSM Drives

The offline inverter nonlinearity identification is a useful method to deal with the inverter nonlinearity effect in machine drive. However, the conventional methods can only be achieved at particular initial rotor position, which reduces the application universality. Meanwhile, it is revealed in this paper that the zero-sequence voltage error exists in the zero-axis voltage, which reduces the identification accuracy and has rarely been investigated. To solve the above problems, an offline inverter nonlinearity identification scheme applicable at arbitrary initial rotor positions is proposed, where the zero-sequence voltage error is fully considered. In this paper, the characteristics of zero-sequence voltage error at different rotor position cases is fully investigated by the theoretical analysis for the first time. The offline identification approach at different rotor position cases is then introduced, with the zero-sequence voltage error eliminated. Finally, the second order Newton interpolation polynomial (NIP) based fitting strategy is proposed to reduce the calculation complexity. The proposed method is validated on a 2.2kW permanent magnet synchronous motor (PMSM) platform.

Three-Phase Open-End Induction Motor Drive Interfaced to Higher Voltage DC Bus

In applications that require a three phase induction motor to be driven by an inverter from a DC bus input of much higher voltage than needed, the option is to use a step down DC-DC converter before the inverter or use high voltage rating switches in the inverter along with low modulation index. In either case, disadvantages include poor efficiency, high voltage rated switches, etc. In open end winding three phase induction motor drives, the three separated windings are driven by 3-phase inverters from both sides. The arrangement is equivalent to three 1-phase inverters driving each winding separately from the same DC bus in parallel. This paper proposes an inverter scheme for open end induction motor drives, using a 1-phase inverter for each winding supply, but all three inverters being connected in series by their DC bus to the higher applied DC voltage. Unlike existing techniques for interfacing an induction motor drive to a higher voltage DC bus, the proposed scheme requires lower voltage switches with lower voltage bus capacitors to drive the lower voltage motor from a higher voltage DC bus. The series connected DC bus capacitor voltages are shown to remain balanced during normal operation.

A Novel Control Scheme for Traction Inverters in Electric Vehicles With an Optimal Efficiency Across the Entire Speed Range

A Novel Control Scheme for Traction Inverters in Electric Vehicles With an Optimal Efficiency Across the Entire Speed Range

Disturbance Observer-Based Robust Current Control Scheme for Three-Phase Grid-Tied Inverters With LCL Filter Considering Unbalanced Grid Voltages

Disturbance Observer-Based Robust Current Control Scheme for Three-Phase Grid-Tied Inverters With LCL Filter Considering Unbalanced Grid Voltages

Frequency stabilization and synchronization between grid and AC microgrid

A 63-level inverter with fewer switches is proposed to reduce harmonics in the multi-microgrid scenario. Since the multi-microgrid is connected with varying loads, synchronizing the output of the multi-level inverter and controller is developed, which works by having a data testing phase. The weighted mean of vector optimization acquires the multi-microgrid data to feed the control variable to the controller. Multi-microgrid issues are managed by two degrees of freedom based on a fractional order proportional resonant controller. As a result, the proposed inverter scheme has yielded a very low THD when subjected to a renewable based DC supply. This improves the performance of the 63-level inverter by 20.1 % compared to the asymmetric 63-level inverter.

End-to-end memory-efficient reconstruction for cone beamCT.

Cone beam computed tomography (CBCT) plays an important role in many medical fields nowadays. Unfortunately, the potential of this imaging modality is hampered by lower image quality compared to the conventional CT, and producing accurate reconstructions remains challenging. A lot of recent research has been directed towards reconstruction methods relying on deep learning, which have shown great promise for various imaging modalities. However, practical application of deep learning to CBCT reconstruction is complicated by several issues, such as exceedingly high memory costs of deep learning methods when working with fully 3D data. Additionally, deep learning methods proposed in the literature are often trained and evaluated only on data from a specific region of interest, thus raising concerns about possible lack of generalization to other regions. In this work, we aim to address these limitations and propose LIRE: a learned invertible primal-dual iterative scheme for CBCTreconstruction. LIRE is a learned invertible primal-dual iterative scheme for CBCT reconstruction, wherein we employ a U-Net architecture in each primal block and a residual convolutional neural network (CNN) architecture in each dual block. Memory requirements of the network are substantially reduced while preserving its expressive power through a combination of invertible residual primal-dual blocks and patch-wise computations inside each of the blocks during both forward and backward pass. These techniques enable us to train on data with isotropic 2 mm voxel spacing, clinically-relevant projection count and detector panel resolution on current hardware with 24 GBvideo random access memory (VRAM). Two LIRE models for small and for large field-of-view (FoV)setting were trained and validated on a set of 260 + 22 thorax CT scans and tested using a set of 142 thorax CT scans plus an out-of-distribution dataset of 79 head and neck CT scans. For both settings, our method surpasses the classical methods and the deep learning baselines on both test sets. On the thorax CT set, our method achieves peak signal-to-noise ratio (PSNR) of 33.84 ± 2.28 for the small FoV setting and 35.14 ± 2.69 for the large FoV setting; U-Net baseline achieves PSNR of 33.08 ± 1.75 and 34.29 ± 2.71 respectively. On the head and neck CT set, our method achieves PSNR of 39.35 ± 1.75 for the small FoV setting and 41.21 ± 1.41 for the large FoV setting; U-Net baseline achieves PSNR of 33.08 ± 1.75 and 34.29 ± 2.71 respectively. Additionally, we demonstrate that LIRE can be finetuned to reconstruct high-resolution CBCT data with the same geometry but 1 mm voxel spacing and higher detector panel resolution, where it outperforms the U-Net baseline aswell. Learned invertible primal-dual schemes with additional memory optimizations can be trained to reconstruct CBCT volumes directly from the projection data with clinically-relevant geometry and resolution. Such methods can offer better reconstruction quality and generalization compared to classical deep learning baselines.

A Single-Phase Seven-Level Triple Boost Inverter for Grid-Connected Transformerless PV Applications

A new seven-level common ground (CG) switched capacitor (SC)-based grid tied transformerless inverter has been introduced in this paper, which has three times boosting capability of input voltage. Thus, this inverter is preferable for low voltage PV applications without any boost conversion stage. To step-up the input PV voltage and facilitate seven steps in output voltage, two SC cells are connected in parallel. A virtual dc link capacitor serves key role for negative half cycle on behalf of H-Bridge and helping in constructing topology with common ground. The common grounding configuration of this inverter helps in bypassing the stray capacitance, which eliminates the leakage current and consequently reduces EMI considerably. Hence, further no requirement of any electro-magnetic interference (EMI) filter for electro-magnetic compatibility (EMC). Additionally, this inverter handles reactive power during the grid's lagging/leading power factor (pf) condition. To regulate active and reactive grid power, a proportional resonant (PR) current controller is designed. The proposed modulation scheme helps in balancing capacitor's voltages at their base values with allowable ripple. A detailed comparison also has been presented with other contemporary seven level inverters. The inverter circuit details, control technique, PWM scheme, thermal modeling, and loss analysis with component design guidelines are described in detail. Experimental results are presented to validate the effectiveness and feasibility of this proposed inverter.

A maximum power point tracking of a photovoltaic system connected to a three-phase grid using a variable step size perturb and observe algorithm

Purpose. The production of electricity from solar energy is necessary because of the global consumption of this energy. This article’s study is based on increased energy extraction by improving maximum power point tracking (MPPT). From different MPPT techniques proposed, the perturb and observe (P&O) technique is developed because of its low implementation cost and ease of implementation. Methods. A modified variable step-size P&O MPPT algorithm is investigated which uses fuzzy logic to automatically adjust step-size to better track maximum power point, compared with the conventional fixed step-size method. The variable step P&O improves the speed and the tracking accuracy. This controller is implemented on a boost DC-DC power converter to track the maximum power point. The suggested controlled solar energy system includes a boost converter, a voltage-source inverter, and a grid filter. The control scheme of a three-phase current-controlled pulse-width modulation inverter in rotating synchronous coordinate d-q with the proposed MPPT algorithm and feed-forward compensation is studied. Results. The photovoltaic grid-connected system controller employs multi-loop control with the filter inductor current of the inverter in the inner loop to achieve a fast dynamic response and the outer loop to control bus voltage for MPPT, the modeling, and control of three phase grid connected to photovoltaic generator is implemented in the MATLAB/Simulink environment and validated by simulation results.

A Passivity-Based Weighted Proportional-Derivative Feedforward Scheme for Grid-Connected Inverters With Enhanced Harmonic Rejection Ability

A Passivity-Based Weighted Proportional-Derivative Feedforward Scheme for Grid-Connected Inverters With Enhanced Harmonic Rejection Ability

Design and validation of a multilevel voltage source inverter based on modular H-bridge cells

Generation, power conversion and subsequent integration of renewable energy generation systems, such as solar photovoltaic or wind, require an efficient power conversion system that can provide sufficient quality energy according to technical standards (e.g. IEEE 519–2022). In this context, this paper focuses on the analysis, design and experimental validation of a multilevel voltage source inverter (VSI) scheme based on H-bridge cells with a modular and scalable structure for its application in power electronic converter circuits. The designed and assembled experimental setup is a versatile platform for testing experimentally varied control strategies and power converter configurations, such as the number of levels (3, 5, 7 levels) and phases (single-phase or three-phase). Therefore, the hardware design process proposed for the H-bridge cell and the measurement and conditioning circuits for voltage and current signals necessary for implementing the control algorithms are explained in detail. Moreover, a quantitative analysis of the operation of the design was carried out from measurements made with the experimental platform to verify its correct operation. Among the analysed parameters, the generated harmonics level stands out, quantified by calculating the total harmonic distortion and the mean square error between the reference signals and the measured values.

Efficacious Zero Sequence Voltage Elimination in Space Vector Modulation by Sigma Delta Modulation

The growing popularity of electric motor driven systems emphasize the need for proper motor maintenance and necessitates zero sequence voltage (ZSV) elimination in electrical machines and drives. A spread spectrum modulation scheme for eliminating zero sequence voltage, utilizing space vector pulse density modulation (SVPDM) approach is proposed in this article. In the presented five-level inverter scheme, when vectors that do not contribute zero sequence voltage are considered, a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$30^{0}$</tex-math></inline-formula> tilted three-level space vector diagram with inner and outer layer is formed. Reference vector residing in outer layer is mapped to inner layer and is vector quantized in a space vector quantizer to generate inner layer switching vectors. Outer layer switching vectors are then realized by the process of reverse mapping. The article investigates two-level SVPDM scheme and ZSV eliminated two-level SVPDM scheme, to prove that effectiveness of ZSV elimination can be determined from the shape of demodulated waveform. Better the ZSV elimination, better will be the resemblance of demodulated waveform to sinusoidal signal. The scheme is experimentally validated with 2.2 kW five-level dual inverter fed induction motor drive and is compared with space vector pulse width modulation (SVPWM) scheme. Results of comparison confirms the effectiveness of proposed scheme.

Research on Open Circuit Fault Location and Fault Tolerant Control of Inverter Power Transistor

As the key equipment of power conversion, the stability of the inverter directly affects the working state of the equipment. Aiming at the open circuit fault of the power tube, this paper designs a fault diagnosis and fault tolerance scheme of a three-phase bridge inverter based on the current signal. Firstly, the amplitude and phase characteristics of the current vector are used to judge the fault and fault location of the power tube. Then the output fault characteristic signal is converted into a fault-tolerant control signal. The fault leg is switched into a fault-tolerant leg under fault-tolerant control of the inverter bridge. The simulation results show that the diagnosis method proposed in this paper can judge the health and fault status of the inverter with high accuracy and achieve fault tolerant control, improving the stability of the inverter.

Variable Augmented Network for Invertible Modality Synthesis and Fusion.

As an effective way to integrate the information contained in multiple medical images under different modalities, medical image synthesis and fusion have emerged in various clinical applications such as disease diagnosis and treatment planning. In this paper, an invertible and variable augmented network (iVAN) is proposed for medical image synthesis and fusion. In iVAN, the channel number of the network input and output is the same through variable augmentation technology, and data relevance is enhanced, which is conducive to the generation of characterization information. Meanwhile, the invertible network is used to achieve the bidirectional inference processes. Empowered by the invertible and variable augmentation schemes, iVAN not only be applied to the mappings of multi-input to one-output and multi-input to multi-output, but also to the case of one-input to multi-output. Experimental results demonstrated superior performance and potential task flexibility of the proposed method, compared with existing synthesis and fusion methods.

Design of an Optimal Adoptive Fault Ride through Scheme for Overcurrent Protection of Grid-Forming Inverter-Based Resources under Symmetrical Faults

As the integration of inverter-based resources (IBRs) is rapidly increasing in regard to the existing power system, switching from grid-following (GFL) to grid-forming (GFM) inverter control is the solution to maintain grid resilience. However, additional overcurrent protection, especially during fault transition, is required due to limited overcurrent capability and the high magnitude of spikes during fault recovery in IBRs, specifically in the GFM control mode. Furthermore, the power system stability should not be compromised by the employment of additional fault ride through (FRT) schemes. This article presents the design and implementation of an adoptive fault ride through (FRT) scheme for grid-forming inverters under symmetrical fault conditions. The proposed adoptive FRT scheme is comprised of two cascaded power electronic-based circuits, i.e., fault current ride through and a spikes reactor. This adoptive FRT scheme optimizes the fault variables during the fault time and suppresses the fault clearing spikes, without affecting system stability. A three-bus inverter-based grid-forming model is used in MATLAB/Simulink for the implementation of the proposed scheme. Further, a conventionally used FRT scheme, which includes fault current reactors, is simulated in the same test environment for justification of the proposed adoptive scheme. The adoptive FRT scheme is simulated for both time domain and frequency domain to analyze the response of harmonic distortion with the suppression of the fault current. Moreover, the proposed scheme is also simulated under the GFL mode of IBRs to justify the reliability of the scheme. The overall simulation results and performance evaluation indices authenticate the optimal, fault tolerant, harmonic, and spike-free behavior of the proposed scheme at both the AC and DC side of the grid-forming inverters.

A Novel Single Phase Three Level Triple Boost CG Switched-Capacitor Based Grid-Connected Transformerless PV Inverter

A new three-level inverter based on the switched capacitor (SC) with a common grounding (CG) configuration has been introduced in this article, which is capable of boosting the input voltage up to three times. Therefore, this inverter is configured without any boost dc/dc converter stage for low voltage PV application. To step up the input PV voltage and facilitate three level in output voltage, two SC cells are connected in parallel. This inverter's common grounding configuration helps in bypassing the stray capacitance, which eliminates the leakage current and consequently reduces electro-magnetic interference (EMI) considerably. Hence, for electro-magnetic compatibility (EMC), this inverter does not require any EMI filter. Additionally, this inverter handles reactive power during the grid's lagging/leading power factor (pf) condition. A proportional resonant (PR) current controller is designed to regulate active and reactive grid power. The proposed modulation strategy helps in balancing capacitor voltages at their base values with allowable ripple. The inverter circuit details, control technique, PWM scheme, thermal modeling, and loss analysis with component design guidelines are described in detail. Experimental results are presented to validate the effectiveness and feasibility of this proposed inverter.

A Blind Spot in the LVRT Current Requirements of Modern Grid Codes for Inverter-Based Resources

Modern grid codes (GCs) require that inverter-based resources (IBRs) inject both positive- and negative-sequence currents during asymmetrical low-voltage ride through (LVRT) conditions. This GC provision prioritizes the reactive currents and also demands maximizing the active positive-sequence current if the IBR has unused current generation capacity when the required reactive current is generated. A variety of inverter control schemes are available to generate positive- and negative-sequence active/reactive currents, and satisfying these GCs seems to be straightforward. However, this paper reveals that the reference current generation methods of existing inverter control schemes fail to fulfil some important requirements of recent GCs. For example, they do not fully utilize the inverter capacity to generate the maximum active and/or reactive current. It is shown that these so-far hidden GC violations can result in a large untapped generation capacity during asymmetrical faults. This paper also develops an algorithm that satisfies recent GCs by deriving the positive- and negative-sequence currents that maximize the IBR’s reactive and active currents while the reactive current is prioritized. The simulation of a grid with high IBR penetration verifies that this new algorithm can unlock the full potential of recent GCs by significantly increasing the power generated during LVRT.