Inverter Circuit Topology Research Articles

Design of single cycle current control method based on single-phase full bridge inverter circuit

To achieve accurate control of the large inductive load, a single-phase full bridge inverter circuit topology with a simple structure is proposed. The current control on inductive load is realized by using the single-cycle control method, and the size and direction of the current can be adjusted at any time. The loading part is equivalent to the coil and resistance, the control principle of the circuit is analyzed, and the calculation formula of the duty cycle is calculated. The simulation results show that the designed circuit structure can control the current with a large inductive load

The analysis of three level inverter circuit with regard to current harmonic distortion by using ANFIS

The inverters are frequently used in power electronics applications in the industrial area. Research on multi-level inverter circuit designs in power systems interfaces has intensified in recent years. The design type and quality of the inverter circuit topology is very important for the output voltage to be closer to the sinusoidal waveform. In addition, artificial intelligence techniques for the control algorithms of the power switches of the inverter circuit provide useful information in terms of monitoring the estimated the voltage conditions of the inverter output parameters. In this work, an Adaptive-Network Based Fuzzy Inference Systems (ANFIS) model is proposed to estimate the Total Harmonic Distortion (THD) value of the output current of a three-phase three-level inverter circuit. By changing the switching frequency in the control circuit of the inverter, a data set for the THD values of the inverter current is obtained by Fast Fourier Transform (FFT) analysis in MATLAB. This data set is used in a training and testing phase of ANFIS artificial intelligence algorithm, and the THD value of the current is estimated. At the end of the estimation, the mean absolute error (MAE) values for training and testing are obtained as 0.1894% and 0.4009%, respectively, thereby, an ANFIS estimation example for parametric data set analysis in a power electronics circuit run with Matlab-Simulink software, and a parametric simulation study is presented to the literature for power electronics circuit designers.

Impedance Reshaping and Stability Analysis of the Unbalanced Three-phase System Considering the Grid-tied Inverter based Imbalance Compensation

Grid-tied inverters have been adopted both as the interface of renewable energy resources and as a solution to address power quality issues. To compensate the imbalance distortion caused by asymmetric local load, DQ transformation based compensation method is introduced into the control scheme of the grid-tied inverter. Taking both the inverter control scheme and circuit topology into account, the space vector based impedance modelling and stability analysis approaches are proposed in this paper to analyse the dynamic of the asymmetric system with active imbalance compensation. The proposed impedance models indicate that the compensation control method can reshape the output impedance features, and affect the stability of the system. The stability analysis results are verified in this paper by experimental results.

Sensorless current prediction in single phase inverter circuits with machine learning algorithms

Inverter circuits are widely used in power electronics applications such as electric motor control, induction heating or different Alternating Current (AC) loads. The control signal applied to the switching elements can affect the quality of the sinusoidal signal that occurs at the output of the inverter circuit by the means of voltage and current values. The inverter circuit topologies are generally designed as closed loop. However, these cause complexity of the circuit topology, increase the production costs and give difficulties in designing the control signals. In the present work, simulations of a single-phase inverter circuit with the Sinusoidal Pulse Width Modulation (SPWM) control signal are performed. Thus, the effect of the SPWM signals on the output of the inverter has been observed by changing the Modulation rate (M), the carrier signal frequency (f_c) and the reference signal frequency (f_r). Through the data obtained, the output current of a phase inverter without a sensor is estimated by Machine Learning Algorithms (MLA) such as Multi-Layer Perceptron (MLP), Support Vector Machine (SVM) and K-Nearest Neighbors (KNN).

Extended hybrid cross-switched multilevel inverter circuit topology

PurposeMultilevel inverters (MLIs) have been studied widely over the past two decades because of their inherent advantages and interesting features. However, most of the newly introduced structures suffer from the increased standing voltage of the switches, which is defined as the maximum off-state voltage on the switches, losing modularity and increased number of direct current (DC) voltage sources. The purpose of this study is to propose a new hybrid MLI topology to alleviate the mentioned problems.Design/methodology/approachThe proposed approach in this study includes using the advantage of two different topologies and combine them in a way that the advantages of both of the topologies are achieved. Therefore, the approach is to design a hybrid topology from two existing topologies so that a new topology has resulted.FindingsThis paper proposes a new hybrid MLI with lower power electronic switches and lowers DC voltage sources in comparison with the classic structures. The proposed MLIs maintain a balance between the number of switches, the standing voltage on the switches and the number of DC sources. The topology description, modulation method and comparative study have been presented. Also, another more reduced structure is presented for higher power factor operation. The MATLAB simulation and experimental results of a nine-level inverter have been presented to verify its operation.Originality/valueThe hybrid topology has a new structure that has not been presented before. It is important to emphasize that the topology combination and achieving the hybrid topology is wisely accomplished to improve some features of the MLI.

Review of Multilevel Inverters and Their Control Techniques

Multi-level inverter is attaining higher AC power using a series of power semiconductor switches with numerous lower voltage DC sources to implement the power conversion by synthesizing a staircase voltage waveform. Sources like super capacitors, batteries, solar panels and other renewable energy voltage sources make up the multiple DC voltage sources. This work looks at the advantages and likely disadvantage of multi-level inverter, highlighting some of the shortfalls of existing inverter topologies while considering the effects of emerging Hybrid MLI Topologies. Hence this review paper proposes a distinctive seven level cascaded H-bridge multi-level inverter configuration in which the POD PWM technique is adopted. This design would potentially redress the problems inherent in other inverter circuit topologies reviewed.

Review of Multilevel Inverters and Their Control Techniques

Multi-level inverter is attaining higher AC power using a series of power semiconductor switches with numerous lower voltage DC sources to implement the power conversion by synthesizing a staircase voltage waveform. Sources like super capacitors, batteries, solar panels and other renewable energy voltage sources make up the multiple DC voltage sources. This work looks at the advantages and likely disadvantage of multi-level inverter, highlighting some of the shortfalls of existing inverter topologies while considering the effects of emerging Hybrid MLI Topologies. Hence this review paper proposes a distinctive seven level cascaded H-bridge multi-level inverter configuration in which the POD PWM technique is adopted. This design would potentially redress the problems inherent in other inverter circuit topologies reviewed.

Design and Implementation of 15-Level Multilevel Cascaded Type Inverter with Reduced Switching Count

In high and medium AC power applications, multilevel inverters (MLI) have significant importance in modern days. The architecture of multi-level cascaded type inverter is preferred because of reduced harmonic distortion, high quality AC output power, least switching loss and minimum switching stress. The existing method uses 8-number of switches to generate 11-level AC voltage. A new design of 15-level multilevel inverter with 6-switching devices is proposed in this paper and DC supply devices are similar to existing method, which outcomes in less switching loss, less complexity of circuit design and less cost. The DC supply for multilevel inverter is taken from solar panel with MPPT technique. The new 6-switch multilevel inverter circuit topology, switching pattern and gate pulse making is explained in this paper. The fast Fourier transform (FFT) analysis of the outputs of 11-level and 15-level of multilevel inverters are related. The new 6-switch 15 level cascaded type inverter circuit has been intended and modeled by using MATLAB software Simulink tool. The simulation outcomes are displayed with less total harmonic distortion and reduced switching loss has been achieved.

A Four-Level Open-End Winding Induction Motor Drive With a Nested Rectifier–Inverter Combination With Two DC Power Supplies

This paper proposes a new nested rectifier–inverter circuit topology for a four-level (4-L) open-end winding induction motor drive (OEWIMD). To realize the 4-L inversion, the nested rectifier–inverter topology operates with unequal dc-link voltages, which are in the ratio of 2:1. The proposed topology has the inherent ability of avoiding the overcharging of the lower dc-link voltage capacitor by its higher voltage counter-part unlike in the case of the power circuit configuration proposed in the earlier literature. This paper also proposes a new sample-averaged zero-sequence elimination pulsewidth modulation (PWM) scheme for the proposed circuit configuration to avoid the flow of zero-sequence current through the motor windings. It is shown that the proposed power circuit is also capable of displaying immunity to a particular type of fault, as it can produce the same output voltage despite the unbalancing of one of the dc-link capacitor voltages without changing the modulation strategy. The proposed 4-L OEWIMD along with the associated PWM schemes is simulated and is validated with experimental results.

A proposed single-stage single-phase full bridge boost inverter

ABSTRACTA proposed topology for a high-efficiency single-stage single-Phase boost inverter with a simple circuit configuration and a low component count is proposed in this paper. The proposed inverter produces instantaneous output voltages higher than the input dc voltage without an intermediate power conversion stage. A new control scheme is designed that enables the proposed inverter topology to produce a low distortion sinusoidal output waveforms and provide good load voltage regulation. The inverter circuit topology and modes of operations are fully described and simulated using Matlab/Simulink. The simulation results are presented illustrating the claimed boosting characteristics, sinusoidal output wave forms and good load regulation capability of the proposed inverter. The validity and effectiveness of the proposed inverter are verified experimentally by building a laboratory model using the digital signal processor (Model DS1104). The experimental results are presented confirming the claimed features of the inverter.

Fault Tolerant Three Level ANPC Inverter Circuit with Finite Set Model Predictive Control

An improved active neutral point clamped (ANPC) inverter circuit topology is proposed. Through the fault-tolerant leg, the fault-tolerant performance of the inverter circuit has been greatly improved. The fault-tolerant leg works as an actuating device which control the neutral point to remain stable, when there is no fault with the inverter. When some power tubes are broken the leg works as the redundant device to replace the power tubes. The finite set model predictive control method is used for this inverter circuit. This control method is quite suitable for the electronic circuit. This method is employed to lower THD and to advance its dynamic, so that the error tolerance and high power output of the aviation inverter are satisfied. The feasibility and effectiveness are proved by simulations.

Research on Grid Connected Inverter Based on Parallel Resonance

In order to solve the problem of large switching loss, large voltage peak and poor stability in DC-DC transform high frequency isolation inverter, a new inverter circuit topology, which is combined with parallel resonant and traditional DC-DC converter, is proposed. The inverter can realize the zero voltage opening of the high frequency power device, the soft turn off of the body diode and the rectifier diode, so as to eliminate the switch peak of the power device and reduce the loss of the inverter. The working process of the circuit and the soft switching principle of various switch devices are introduced in detail, and the resonant equivalent model of the circuit, the influence of the resonance parameters on the gain and the soft switch are established, and the design principle of the resonant parameters is given. In order to eliminate the low harmonics introduced by dead zone, dead time compensation is added to the control system to improve the quality of inverter current. Finally, an experimental prototype is built, and the correctness of the circuit topology and control strategy is verified by experiments.

유도 가열용에 사용되어지는 새로운 부분공진형 영전압 스위칭 PWM 고주파 인버터

This paper presents a newly proposed prototype of voltage-fed half-bridge partial resonant zero voltage switching PWM inverter operating at a constant frequency variable power regulation scheme, which is more suitable and acceptable for induction heated(IH) cooking appliances. This application-specific high frequency inverter circuit topology using a new generation specially-designed IGBTs can operate under a principle of a fixed frequency ZVS-PWM strategy. The operating principle of a new partial resonant inverter circuit is described on the basis of its computer-aided simulation analysis, its including steady-state operating characteristics.

Improved three‐phase, five‐level pulse‐width modulation switched voltage source inverter

This study presents an improved three-phase, five-level pulse-width modulation (PWM) switched voltage source inverter. The single-carrier, multilevel PWM scheme is employed to generate the gating signals for the power switches. Operational principles with switching functions are given. By controlling the amplitude modulation index, three- and five-level output phase voltage waveforms can be achieved. For modulation indices of 0.45, and 0.9, the proposed inverter topology was subjected to an R–L load and the respective number of output voltage level were synthesised. For a step change in the modulation index, the response of the proposed multilevel inverter circuit topology is demonstrated. Fast Fourier transform analyses of the output line voltage waveforms, at the indicated depth of modulation, were carried out and the corresponding total harmonic distortion values were obtained. Comparison of the proposed inverter configuration and the classical 3-ϕ topologies is given based on the power circuit component count. Moreover, analysis of the conduction power losses in the power semiconductor switches of the proposed inverter topology is given. To verify the performance of the proposed inverter architecture, simulations and experiments are carried out on a 3.46 kW rated prototype of the proposed inverter for an R–L load; and adequate results are presented.

A Study on Efficiency Improvement of High-frequency Current Output Inverter Based on Immittance Conversion Element

Wireless power transmission utilizing magnetic field resonance has been given increasing attention by power electronics engineers and industry. Actually, many technical papers that relate to the transmission coils of wireless power transmission based on magnetic field resonance have been published and verified the high-efficiency power transmission characteristics. However, the 10 MHz class high-frequency power converter suitable for high-power transmission systems has not been studied sufficiently, although small power rating converters, such as the class-E converter with a 74.9 W output power, have been proposed. Hence, the authors propose a new circuit topology for high-power high-frequency inverter systems suitable for high-power wireless power transmission. In this paper, the authors propose a novel high-frequency current output type inverter circuit topology utilizing an immittance conversion element and wireless transmission coils, which utilize an LC anti-resonant circuit suitable for the proposed current output type inverter. As a result of the prototype test, the proposed inverter provides a high conversion efficiency of more than 77.6 % at 11.33 MHz operation with a 123 W output power rating. Also, the proposed transmission coils suitable for current output type inverters provide a high transmission efficiency of more than 94.2 % at 11.33 MHz operation with 20 mm transmission gaps and a 46.1 W output power.

The Research of Two Staged Non-Isolated Photovoltaic Grid Connected Inverter Control Method

Grid-connected inverter topologies and control methods are analyzed and compared on the basis of two non-isolated PV grid-connected inverter circuit topology as 3kVA grid connected PV systems. In this paper, the current control method, the DC bus voltage outer grid current inner loop of the dual closed-loop PI control method. Sampled signal through the system circuit for processing, resulting in a SPWM drive signal to control the conduction of the power devices off the grid current control.

Medium Voltage Drive for Induction Motors Using Multilevel Octadecagonal Voltage Space Vectors

Multilevel inverters with hexagonal and dodecagonal voltage space vector structures have improved harmonic profile compared to two-level inverters. Further improvement in the quality of the waveform is possible using multilevel octadecagonal (18-sided polygon) voltage space vectors. This paper proposes an inverter circuit topology capable of generating multilevel octadecagonal voltage space vectors, by cascading two asymmetric three-level inverters. By the proper selection of dc-link voltages and the resultant switching states for the inverters, voltage space vectors, whose tips lie on three concentric octadecagons, are obtained. The advantages of octadecagonal voltage space vector-based pulsewidth modulation (PWM) techniques are the complete elimination of fifth, seventh, eleventh, and thirteenth harmonics in phase voltages and the extension of linear modulation range. In this paper, a simple PWM timing calculation method is also proposed. Experimental results have been presented in this paper to validate the proposed concept.

Multilevel dodecagonal space-vector generation for induction motor drives by cascading three-level and two-level inverters

This study proposes an inverter circuit topology capable of generating multilevel dodecagonal (12-sided polygon) voltage space vectors by the cascaded connection of two-level and three-level inverters. By the proper selection of DC-link voltages and resultant switching states for the inverters, voltage space vectors whose tips lie on three concentric dodecagons, are obtained. A rectifier circuit for the inverter is also proposed, which significantly improves the power factor. The topology offers advantages such as the complete elimination of the fifth and seventh harmonics in phase voltages and an extension of the linear modulation range. In this study, a simple method for the calculation of pulse width modulation timing was presented along with extensive simulation and experimental results in order to validate the proposed concept.

Modeling and control of a PEM fuel cell based hybrid multilevel inverter

Multilevel inverter is an effective and practical solution for increasing power demand and reducing harmonics of AC waveforms. It is mainly employed in the distributed energy sources area because several batteries, fuel cell and solar cell can be connected through multilevel inverter to feed a load. This paper investigates the potentials of a single-phase Hybrid Cascaded Multilevel Inverter (HCMLI) fed from Proton Exchange Membrane Fuel Cell (PEMFC). A mathematical model of the PEMFC supplying HCMLI has been developed. This paper also presents the effect of a novel hybrid modulation on the device switching losses and harmonics of HCMLI. The proposed hybrid modulation technique combines the fundamental frequency switching scheme and Variable Frequency Inverted Sine Pulse Width Modulation (VFISPWM) technique. A comparison between the hybrid modulation strategy and the conventional Phase Disposition (PD) PWM method is also presented in terms of THD and switching losses. A suitable PID controller has been designed to control the output voltage of fuel cell based HCMLI, so that it can provide constant AC voltage with minimum THD up to the rated conditions. The inverter circuit topology and its control scheme are described in detail and their performance is verified based on simulation and experimental results.

Uniform Overlapped Multi-Carrier PWM for a Six-Level Diode Clamped Inverter

Multi-level voltage source inverters offer several advantages such as; derivation of a refined output voltage with reduced total harmonic distortion (THD), reduction of voltage ratings of the power semiconductor switching devices and also the reduced electro-magnetic-interference problems etc. In this paper, new carrier-overlapped phase-disposition or sub-harmonic sinusoidal pulse width modulation (CO-PD-SPWM) and also the carrier- overlapped phase-disposition space vector modulation (CO-PD- SVPWM) schemes for a six-level diode-clamped inverter topology are proposed. The principle of the proposed PWM schemes is similar to the conventional PD-PWM with a little deviation from it in the sense that the triangular carriers are all overlapped. The overlapping of the triangular carriers on one hand results in an increased number of switchings, on the other hand this facilitates an improved spectral performance of the output voltage. It is demonstrated through simulation studies that the six-level diode-clamped inverter with the use of CO-PD-SPWM and CO-PD-SVPWM proposed in this paper is capable of generating multiple levels in its output voltage. The advantages of the proposed PWM schemes can be derived to benefit, especially at lower modulation indices of the inverter and hence this aspect of the proposed PWM schemes can be well exploited in high power applications requiring low speeds of operation of the drive. Keywords—Diode clamped inverter, Pulse width modulation, Six level inverter, carrier based PWM. drawbacks, they have their own merits as compared to the others. These circuits are slowly being accepted by the industry in the recent times and are the focus of many researchers now. Several multilevel PWM switching schemes have been proposed in the past and an extensive survey of PWM schemes has also been reported in the literature (7). Improved spectral performance and enhanced DC-bus utilization is also achieved by altogether modifying the sinusoidal modulating signal by either adding appropriate third harmonic component or giving suitable offset voltages (7)-(9). Triangular multi- carriers are uniformly distributed with their phases adjusted to suit the application is reported in the past (10)-(13). Multilevel PWM with modified triangular carriers are also reported in the literature for a multi-level inverter (14)-(15). In this paper, uniform, zero phase shifted, overlapped multi- carrier PWM switching schemes are proposed using the conventional SPWM and also the SVPWM for a six-level diode-clamped inverter circuit topology. It is eloquently demonstrated through simulation studies that the spectral performance of the output voltage using the overlapped carrier PWM proposed in this paper is improved as compared to the use of the conventional PD-PWM especially in the lower modulation range. The main drawback with the use of the proposed PWM is the increased total number of switchings; resulting in an increased switching power loss. However, the improved spectrum of the output voltage with the proposed PWM scheme could offset the increased switching power loss.