Interstage Matching Circuits Research Articles

High-gain high-power-density stacked GaN HEMTs operating at 140V with reconfigurable inter-stage matching circuit

High-gain high-power-density stacked GaN HEMTs operating at 140V with reconfigurable inter-stage matching circuit

A Wideband High-Efficiency GaN MMIC Power Amplifier for Sub-6-GHz Applications.

The monolithic microwave integrated circuit (MMIC) power amplifiers serve an essential and critical role in RF transmit/receive (T/R) modules of phased array radar systems, mobile communication systems and satellite systems. Over recent years, there has been an increasing requirement to develop wideband high-efficiency MMIC high power amplifiers (HPAs) to accommodate wideband operation and reduce power consumption. This paper presents a wideband high efficiency MMIC HPA for Sub-6-GHz applications using a 0.25-μm gate-length D-mode GaN/SiC high electron mobility transistor (HEMT) process. The amplifier consists of two stages with two HEMT cells for the driver stage and eight HEMT cells for the power stage. To obtain a flat gain while maintaining the wideband characteristic, a gain equalization technique is employed in the inter-stage matching circuit. Meanwhile, a low-loss output matching network is utilized to ensure high efficiency. The fabricated HPA occupies a compact chip area of 14.35 mm2 including testing pads. Over the frequency range of 2–6 GHz, measured results of this HPA show a saturated continuous wave (CW) output power of 44.4–45.2 dBm, a power added efficiency (PAE) of 35.8–51.3%, a small signal gain of 24–25.5 dB, and maximum input and output return losses of 14.5 and 10 dB, respectively.

상호 결합된 차동인덕터를 이용한 GaAs HBT 공정 기반의 1.9 GHz~2.6 GHz 광대역 선형 전력증폭기 설계

This study presents a wideband two-stage linear power amplifier, operating from 1.9 to 2.6 GHz, using a mutually coupled differential inductor based on GaAs hetero-junction bipolar transistor (HBT). A part of the two-section inter-stage matching circuit comprises a mutually coupled differential inductor, which widens the operating band of the matching circuit and reduces the circuit size. In addition, it is optimized to linearly operate in the wide frequency band using a wideband balun at the input and output stages. The fabricated linear power amplifier exhibits a maximum output power of 22.0 dBm~24.0 dBm and efficiency of 33.0 %~39.0 % in the 1.9 GHz~2.6 GHz frequency band. An IMD3 of −30.0 dBc at two-tone signal, with high efficiency of more than 33.0 % was achieved at the linear output power of 22 dBm.

A Ka-Band Switchable LNA With 2.4-dB NF Employing a Varactor-Based Tunable Network

This letter presents a multiband switchable low-noise amplifier (LNA) in the 0.1- μm GaAs pHEMT process. Employing a new varactor-based tunable network as the interstage matching circuit, the operation bands can be tuned consecutively and cover the 5G millimeter-wave frequency bands N257/N260. The proposed tunable structure functions well without sacrificing noise performance or increasing dc consumption and chip area. In the entire operation band from 26.5 to 41 GHz, the LNA achieves a small-signal gain of over 24 dB and a noise figure (NF) of less than 2.9 dB. The measured result shows a small-signal gain of 25.1 dB/27.7 dB and an NF of 2.4 dB/2.8 dB at 28 GHz/39 GHz. The measured input 1-dB compression point (IP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub> ) is -18.3 dBm/-17 dBm at 28 GHz/39 GHz. The measured input-referred intercept point (IIP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> ) is -8.8 dBm/-8.5 dBm at 28 GHz/39 GHz. The LNA has a chip size of 1.6 mm ×1 mm, and the total power consumption is 74 mW. To the best of our knowledge, the proposed LNA is the state-of-the-art Ka-band switchable LNA and has similar performance compared with single-band LNAs using the same technology.

A K-Band High Interference-Rejection GaAs Low-Noise Amplifier Using Multizero Control Method for Satellite Communication

This letter presents a 17.5–22.5-GHz low-noise amplifier (LNA) with the high out-of-band rejection in the range of 27.5–32.5 GHz and 4–10 GHz by using 90-nm GaAs p-HEMT technology. The multizero control method is proposed to produce multiple zeros for generating the high out-of-band rejection and expanding the rejection bandwidth. The multizero control is realized by bypass capacitor notch filters at the drain of transistors and shunt capacitor notch filters at the interstage matching circuits. By using this approach, the high rejection can be achieved at unwanted frequencies without additional devices. Also, the multizero control is mainly implemented in the transistor’s bypass branch, which can achieve the low noise figure (NF) well within the whole operating band. The cost and integration of the front end can also be improved. The measured maximum gain is 23.9 dB at 19 GHz, and the 3-dB bandwidth is 17.5–22.5 GHz. The good interference rejection of the proposed LNA is from 57 to 73 dB and 61 to 72 dB in the range of 4–10 GHz and 27.5–32.5 GHz, respectively. The measured NF is 1.1–1.3 dB. The LNA area is 2 mm $\times1.3$ mm including pads.

High Efficiency and Small Group Delay Variations 0.18-$\mu$ m CMOS UWB Power Amplifier

A new staggered tuning technique, by optimizing the inter-stage matching circuit, is proposed to realize a power amplifier (PA) with small group delay (GD) variations and excellent gain flatness across the full bandwidth of ultra-wideband (UWB) system. The proposed PA consists of two stages where the first stage is constructed by a current-reuse with shunt RC feedback topology to realize gain flatness and low power consumption. The design is implemented in 0.18 ${\mu }\text{m}$ commentary metal-oxide semiconductor (CMOS) technology, fabricated, and tested. The proposed PA has a measured power gain ( ${|{\mathrm{ S}}_{21}|}$ ) of 11.5 ± 0.7 dB, maximum power-added efficiency (PAE) of 26% and an output 1-dB compression point of 9 dBm, respectively, and this is the maximum PAE among CMOS PAs that cover the full bandwidth of UWB system. Besides, the PA has a small GD variations of ± 68 ps which is the lowest till date.

A 120 W Class-E Power Module with an Adaptive Power Combiner for a 6.78 MHz Wireless Power Transfer System

In this article, a highly efficient power module is presented with two class-E power amplifiers and an adaptive power combiner for transmitting output powers &gt;100 W at 6.78 MHz in a wireless power transfer system. The losses caused by the combiners and interstage matching circuits or mismatching between the amplifier, and the combiners can significantly reduce the overall efficiency of the power module. To achieve an efficient combination of the output amplifier signals, the adaptive power combiner is proposed based on the consideration of the optimum load impedance characteristics of the power amplifiers. The input impedance of the combiner is designed using series capacitors and resistors between the two input ports of the combiner and the two output signals of the class-E amplifiers at the optimum load condition. The output performances of the proposed module can decrease based on the component mismatch between the two power amplifiers. The proposed power module was implemented on an FR4 PCB, with a 15 mm metal heat sink, and demonstrated an output power of 123.3 W, a power-added efficiency of 85.7%, and a power gain of 25.6 dB at 6.78 MHz. The second harmonic suppression of the module was 37 dBc.

High Performance Millimeter-Wave Image Reject Low-Noise Amplifier Using Inter-stage Tunable Resonators

A Q-band pHEMT image-rejection low-noise amplifier (IR-LNA) is presented using inter-stage tunable resonators. The inter-stage L-C resonators can maximize an image rejection by functioning as inter-stage matching circuits at an operating frequency () and short circuits at an image frequency (). In addition, it also brings more wideband image rejection than conventional notch filters. Moreover, tunable varactors in L-C resonators not only compensate for the mismatch of an image frequency induced by the process variation or model error but can also change the image frequency according to a required RF frequency. The implemented pHEMT IR-LNA shows 54.3 dB maximum image rejection ratio (IRR). By changing the varactor bias, the image frequency shifts from 27 GHz to 37 GHz with over 40 dB IRR, a 19.1 dB to 17.6 dB peak gain, and 3.2 dB to 4.3 dB noise figure. To the best of the authors' knowledge, it shows the highest IRR and of the reported millimeter/quasi-millimeter wave IR-LNAs.

An L-band high-efficiency and low-distortion power amplifier using HPF/LPF combined interstage matching circuit

An L-band high-efficiency and low-distortion power amplifier using a high-pass filter/low-pass filter (HPF/LPF) combined interstage matching circuit is presented in this paper. An HPF/LPF combined interstage matching circuit can realize both the optimum load impedance of the driver-stage FET and the optimum source impedance of the final-stage FET to achieve high efficiency with a specified distortion. The circuit has been utilized in a three-stage high-power-amplifier module, the size of which is 0.08 cm/sup 3/ (7 mm/spl times/7 mm/spl times/1.7 mm). The amplifier achieves a power-added efficiency of 43.9% and an output power (P/sub out/) of 27.1 dBm with an adjacent channel leakage power of -38 dBc at 1.95 GHz for wide-band code-division multiple-access cellular phones.