Intermediate DC Bus Research Articles

Second harmonic reduction strategy for two‐stage inverter energy storage system with dual active bridge converter based on virtual LC series resonant circuit

SummaryThe second harmonic current (SHC) caused by the instantaneous power of downstream inverter will seriously deteriorate the performance of two‐stage inverter and shorten the life of energy storage device, which narrows the application prospect of two‐stage inverter energy storage system (TSIESS). To reduce the SHC in TSIESS, this paper proposes a strategy of virtual LC series resonant circuit with notch filter (NF‐VLCSRC). This strategy utilizes the virtual impedance technology to achieve the function of a LC series resonant circuit (LCSRC) paralleled to the intermediate DC bus capacitor of the TSIESS, so the output impedance of the DAB converter can become larger than the impedance of the DC bus capacitor at twice fundamental frequency and thus the SHC in the front‐end DAB converter can be reduced effectively without power loss problem caused by the internal resistance of the actual LCSRC. Then, in order to facilitate the implementation and avoid interference of parameter mismatches on system performance, the NF is adopted to realize the VLCSRC strategy based on the frequency characteristics of the introduced virtual impedance. Theory analysis and experimental results are presented to illustrate the effectiveness of the proposed control techniques.

Induction motor control via the rotor of a doubly fed induction generator

AbstractA novel configuration is studied where a doubly fed induction generator provides power to a squirrel‐cage induction motor, and the speed of the motor is controlled through the rotor‐side converter of the generator. Such topology could have applications in hybrid‐electric propulsion and would require fewer and smaller power electronic converters than a system with an intermediate DC bus. An integrated motor/generator set model is developed to reflect the tightly connected dynamics of the combined electric machine. To simplify the derivations, a representation in complex variables is used. However, the control algorithm is based on proven field‐oriented control principles for induction motors. Feedforward and feedback control algorithms of the induction motor integrated with the doubly fed induction generator are proposed, together with two methods to limit the rotor currents of the generator. Experimental data show excellent tracking performance of speed references, demonstrating the validity of the control methods proposed. Concepts are also presented for the management of a small energy storage component.

Overview of Voltage Regulator Modules in 48 V Bus-Based Data Center Power Systems

The intermediate dc bus voltage in modern data center backend power supply is evolving from conventional 12 V to 48 V. It still requires the voltage regulator modules (VRM) to feed the terminal loads such as memory and computing units operating with very high current (> 100 A/module) and very low logic voltage (0.8 V-1.8 V). This makes it challenging to optimize the design of load-side VRMs with quadrupled input voltage. This paper comprehensively reviews the state-of-the-art 48 V VRMs and categorizes them according to passive component utilization. The first category is inductive solution which is further divided into coupled-inductor-based converters and transformer-based converters. The second category named capacitive solution is further divided into resonant switched-capacitor-based converters (Resonant SCC) and hybrid switched-capacitor-based converters (Hybrid SCC). Typical topologies are discussed, analyzed and summarized to perform a comprehensive performance comparison, such that the characteristics of different VRMs can be manifested. Some design considerations are also given to facilitate the design of the practical prototypes. Moreover, opportunities and challenges in the future data center power system are presented to provide technical insights.

Modeling a Switching-Regulated Capacitively Coupled Power Supply for Medium-Voltage AC

The use of capacitive coupling has the potential of reducing the size and cost in the implementation of auxiliary power supplies. This is particularly advantageous in applications with medium-voltage AC feeders, where this arrangement can avert the use of a high-voltage transformer. The current standard for voltage control in this type of power supply is shunt regulation. This scheme maintains a low DC bus voltage, which increases the current demand through the input capacitors and hence decreases the power factor. Switching regulation allows operation at a relatively high intermediate DC bus voltage which can improve the power factor, in addition to providing galvanic isolation and achieving higher efficiencies. However, this type of regulation has not been thoroughly explored in the literature of capacitively coupled power supplies. This paper presents a novel mathematical model to describe high-frequency switching DC-to-DC regulation in a power supply capacitively coupled to a medium-voltage input. The model is used in a case study for the design of a 50 W / 12 V (DC) supply fed from a 1 kV (rms) / 50 Hz AC input. The results of the design validate the model and demonstrate the advantages of the novel concept.

Topology and Control of Four-Quadrant Dual-DC-Port Dual-Buck Inverters For Semi-Two-Stage DC–AC Power Conversion

A method to derive topologies of four-quadrant dual-dc-port dual-buck inverter (DDP-DBI) is proposed in this article. A new family of DDP-DBIs is obtained by replacing one of the switching legs in a four-quadrant dual-buck half-bridge switching cell with a dual-input buck type switching leg. With the proposed DDP-DBIs, both the low voltage dc source and the high voltage intermediate dc-bus can be used as the inputs of the inverter. Therefore, in comparison with the conventional two-stage dc-ac power system, a semi-two-stage dc-ac power conversion system with reduced power losses and enhanced conversion efficiency is achieved. A unipolar sinusoidal pulse width-modulation strategy is presented for the DDP-DBI. In each line cycle, all the power devices and filter inductors only operate within half line cycle, and only one active switch is operated at high frequency. Moreover, no freewheeling current flows through the body diodes of the active switches. As a result, the conversion efficiency of the overall dc-ac power conversion system is improved. Operation principles, characteristics, modulation and control strategies of one of the proposed DDP-DBI are analyzed in detail. Effectiveness and feasibility of the proposed DDP-DBI are verified with experimental results.

Second Harmonic Current Reduction for Flying Capacitor Clamped Boost Three-Level Converter in Photovoltaic Grid-Connected Inverter

In a two-stage single-phase photovoltaic (PV) grid-connected inverter, the second harmonic current (SHC) in the PV panel will affect the maximum power point tracking operation and degrade the energy harvesting efficiency. In order to solve this problem, a flying capacitor clamped (FCC) boost three-level (TL) converter is adopted in this article, and the flying capacitor is employed to compensate the SHC for removing a large electrolytic capacitor. The propagation mechanism of the SHC is analyzed from the perspective of impedance, and a virtual impedance in parallel with the intermediate dc bus is introduced, achieving a perfect SHC compensation performance. The implementation of the virtual parallel impedance is illustrated, and the key parameters design of the FCC boost TL converter is given. A 3-kW two-stage single-phase PV grid-connected inverter is fabricated and tested, and the experimental results verify the validity of the theoretical analysis and the proposed control scheme.

Simplified Hybrid AC–DC Microgrid With a Novel Interlinking Converter

Hybrid ac–dc microgrids (HMG) have become more popular recently because of their superior features in comparison with pure ac and dc microgrids (MGs). HMGs have fewer power converters and are more flexible than pure ac and dc MGs, but the number of converters in HMG is still significant, especially when the dc part of HMG has several voltage levels. A new simplified and more flexible architecture for HMGs that features a new multiport interlinking converter (IC) is proposed in this article. Using the proposed IC, the number of power electronic converters in an HMG with several dc bus voltages can be reduced without increasing the number of active switches in the IC or the complexity of its control system. In this article, the new simplified HMG architecture is presented, and the operation of the proposed IC as a single unit and as a part of a simplified HMG are explained, along with its features. Experimental results obtained from a scaled-down prototype are also presented to confirm the feasibility of the multiport interlinking converter. Simulation results that show the effect of load variations in the intermediate bus architecture dc bus on the operation of the HMG are also presented as well.

Robust Feedback Linearization Control for DAB Converter feeding a CPL

Cascaded converters are used to satisfy the different voltage levels that loads need. Instability problems in cascaded systems may occur due to the interaction of Point-of-Load (POL) converters. POL converters exhibit the important characteristic of almost-perfect regulation at the output terminals independent of the input perturbations. However, such characteristic reflects at the input terminal as a constant power load (CPL). CPL exhibits incremental negative resistance behavior causing undesired oscillations and a high risk of instability in interconnected converters. In this paper, the cascaded converter system consists of a Dual Active Bridge (DAB) DC-DC converter that maintains a regulated DC voltage on the intermediate bus and a POL DC-DC Buck converter that acts as a CPL. Aiming to ensure system stability and effectively mitigate oscillations effects in a cascaded system, this paper proposes a Robust Feedback Linearization Control to regulate the intermediate DC bus voltage. Simulation tests are performed by using a MATLAB/Simulink simulator to show the robustness and effectiveness of the proposed controller. The simulation results show that the proposed control approach ensures robust control performance and stability with a minor performance degradation compared to a Robust Control approach, Feedback Linearization Control approach, and Classical Control approach.

Peak Current Control-Based Power Ripple Decoupling of AC–DC Multichannel LED Driver

AC–DC light-emitting diode (LED) drivers suffer from short lifetime because of the low-lifetime electrolytic capacitors used for dc bus decoupling. In this paper, a primary-side peak current control method applied for driving a two-stage multichannel LED driver is proposed. The LED driver consists of an ac–dc boost power factor correction stage and an isolated dc–dc nonresonant stage. A long-lifetime and small film capacitor is used for implementing the intermediate dc bus. The proposed method, which controls the peak value of the primary-side current of the transformers, is applied to the dc–dc stage to ensure constant dc current output of LEDs in spite of the widely varying dc bus voltage due to low bus capacitance. The proposed method compensates the effect of the large dc bus voltage ripple by varying the switching frequency of the primary-side switches. Detailed design procedure, theoretical analysis, and experimental results of the LED driver operating at 180 W with the proposed method are provided. The LED driver with the proposed control method is proved to have high overall efficiency.

A PWM ZVS High-Frequency-Link Three-Phase Inverter With T-Type NPC Unfolder

In this article, a pulsewidth modulated single-stage high frequency link three-phase dc–ac converter is proposed for grid integration of solar and fuel cell-based energy sources. On the dc side, the converter has three half-bridge legs which are zero-voltage switched over the entire line cycle without using any additional snubber circuit. On the ac side, two diode bridge rectifiers and one neutral point clamped (NPC) T-type three-level inverter are employed. The active switches in NPC inverter are switched either at line frequency or twice of it, incurring negligible switching loss. Modulation ensures soft commutation in the diode bridges. The intermediate three-level dc bus is pulsating and does not require any dc-filter capacitor and thus reduces overall filtering requirements. The high frequency galvanic isolation provides high power density, low-cost converter solution. The converter operation is analyzed in detail and verified on a 2-kW hardware prototype.

A Novel Dual-DC-Port Dynamic Voltage Restorer With Reduced-Rating Integrated DC–DC Converter for Wide-Range Voltage Sag Compensation

A novel dual-dc-port dynamic voltage restorer (DDP-DVR) is proposed. One low-voltage dc port is directly connected to the energy storage, while the other high-voltage dc port is connected to the intermediate dc bus. An integrated dc-dc converter is interfaced with these two dc ports which is aimed at providing a high-dc-link voltage and maintaining the voltage injection capability even if the energy-storage voltage is lower than the peak value of the injected ac-line voltage. Compared with the traditional DVR that uses the dc-dc converter for all voltage sag compensation, the proposed DDP-DVR can compensate shallow voltage sags without using the dc-dc converter, and for deep voltage sags, only partial active power needs to be processed by the dc-dc converter. Therefore, the power rating of the dc-dc converter can be reduced significantly. Meanwhile, much lower power losses can be achieved by the proposed DDP-DVR due to reduced power conversion stages. The operation principles, modulation strategies, and characteristics of the proposed DDP-DVR are analyzed in detail and verified with experimental results.

A novel seamless control algorithm for a single-stage photovoltaic interface employing DC bus signaling

DC bus signaling (DBS) is frequently employed for coordinating the operation of Distributed Energy Resources (DERs) in DC micro and nanogrids, in a decentralized way. The V vs. I curve of Renewable Energy Sources (RESs), such as solar photovoltaic (PV), usually includes a droop, a Maximum Power Point Tracking (MPPT) and a current limiting segment/mode. However, the reference current for the interface (I) cannot be determined solely based on the DC bus voltage (V). Variations of the solar irradiance change the DC bus voltage values on the V vs. I curve where transitions from one mode to another occur. This is an issue for single-stage power interfaces that, without the intermediate DC bus of two-stage interfaces, cannot employ conventional search-type MPPT algorithms. This paper presents a novel control scheme in which a non-search-type MPPT algorithm that does not rely on measurements of the solar irradiance is employed. It allows a smooth transition for the reference current of the interface as the mode of operation, on the V vs. I curve, changes due to variations in the solar irradiance and DC bus voltage. The performance of the proposed scheme is demonstrated experimentally for a stand-alone DC nanogrid based on DBS for the PV source operating by itself and along with an energy storage unit. Load and solar irradiance variations are considered in the experiments.

Differential Flatness Controller for BLIL PFC Boost Rectifier

Electric Vehicle uses AC/DC boost converters for charging high energy battery pack from the input AC supply. They incorporate a PFC controller to improve the input side power factor and also regulate the output voltage with reduced ripple. PFC converter is followed by DC /DC converter which provide high-frequency isolation from the battery bank. This paper presents a technique based on differential flatness principle to improve the power factor of the converter based on the input power. In this case, input power is taken as the reference instead of intermediate dc bus voltage, unlike the conventional ACM (ACM) control. This flatness approach improves the dynamic behavior of the converter with good load adaptive regulation. The converter is initially analyzed with ACM controller and compared with the flatness theory based controller. The front-end converter topology considered in this work is BLIL AC/DC converter and for the second stage, an isolated resonant DC/DC converter is preferred as it is best suited for charging applications. The results reveal that the differential flatness controller improves the dynamic response of the converter under varying load conditions and soft switching is achieved in the second stage converter which results in improving the overall converter efficiency.

Matrix Converter Based Open-End Winding Drives With Common-Mode Elimination: Topologies, Analysis, and Comparison

Matrix converter based open-end winding drives modulated with rotating vectors eliminate the high-frequency common-mode output voltage that could otherwise cause motor failure. Unlike back-to-back converters, no intermediate dc bus capacitor is required—better power density and reliability may, therefore, be achievable. A high voltage transfer ratio and input power factor control capability put these open-end winding drives at a significant advantage over conventional matrix converters. At least three realizations of the matrix converter based open-end drive are possible. This paper compares these three realizations to identify the best topology and presents experimental results validating its capabilities. Filter optimization, loss-optimal vector sequences, and other practical considerations are also discussed. Finally, a comparison with the state-of-the-art back-to-back converters is provided to investigate if the potential improvements are in fact attainable.

A Compact Electrolytic-Free Two-Stage Universal Input Offline LED Driver With Volume-Optimized SSC Energy Buffer

This paper presents a single-phase, two-stage electrolytic-free offline LED driver that utilizes a hybrid film-ceramic stacked switched capacitor (SSC) energy buffer in place of limited-life electrolytic capacitors for twice-line-frequency energy buffering. The proposed LED driver comprises a front-end power factor correction (PFC) stage, followed by an isolated dc–dc conversion stage, with an SSC energy buffer connected across the intermediate dc bus. For the design of SSC energy buffer, an improved capacitance ratio optimization methodology is presented that incorporates the energy densities of commercially available capacitors and minimizes the passive volume of the buffer. Compared to a single capacitor, the optimized SSC energy buffer, comprising three switches, reduces the passive volume of the energy buffer by greater than 40%. A simple and robust control scheme is also proposed to interface the SSC energy buffer with the PFC converter. A prototype 300-W LED driver based on the proposed architecture, designed for universal input voltage range (90–305 Vrms) and 12-V output voltage is built and tested. The SSC energy buffer achieves a peak efficiency of 98.5% and maintains an efficiency of above 96% across a wide output power range, thus minimally impacting the overall system efficiency. Finally, the impact of the intermediate dc-bus voltage ripple on overall LED driver efficiency is investigated. It is found that there is negligible change in the efficiency when the intermediate dc-bus voltage ripple ratio is varied between 3% and 7.5%.

An Isolated Quasi-Resonant Multiphase Single-Stage Topology for 48-V VRM Applications

In order to increase the efficiency of modern microprocessors power supplies used in data centers, the 48-V dc distribution bus is gaining growing attention. For such applications, voltage regulation modules (VRMs) are currently obtained using two-stage conversion systems with an intermediate 12-V dc bus. This paper presents an innovative single-stage approach for the 48-V VRM based on a quasi-resonant constant on-time (COT) operation. The proposed topology inherently integrates the multiphase approach, providing fast phase shedding and flat high-efficiency curves even at light load conditions. This is a unique advantage, usually not available in the two-stage approach, that is very important in server architectures, where high efficiency is required even at light load conditions. The paper analyses the circuit topology, and proposes a control architecture for fast transient response, including the current sharing capabilities, and a solution for implementing the integrated magnetics. The digital controller has been implemented in 0.16- $\mu$ m lithography together with a digital pulse-width-modulation with a 195 ps resolution, and a 40 MS/s, 7-bit ADC. Experimental results show an efficiency of 93.1% for a 250 A, 1.8 V VRM, and of 93.2% for a 102 A, 1.2-V double data rate (DDR) power supply.

Electrolytic Capacitorless Current-Fed Single-Phase Pulsating DC Link Inverter

This paper proposes a current-fed single-phase inverter without constant intermediate DC link. It eliminates electrolytic capacitor from the DC-link and introduces an intermediate pulsating DC bus. The proposed topology is modular with three full-bridges making it scalable for high-power applications. New pulsating-DC-modulation for back-end pulsating DC-link inverter and secondary modulation (SM) for front-end DC-to-pulsating DC converter is proposed. Soft-switching and device voltage clamping of both primary side and secondary side devices of front-end current-fed full-bridge converter is realized. A rotating partial hybrid pulsewidth modulation has been introduced. One leg of inverter is commutated at a low switching frequency, while the other leg is operated at a high switching frequency for partial period of a line frequency cycle. Thus, switching losses of the back-end inverter are considerably reduced. Rotating mechanism is used to equalize the switching losses of four switches of the inverter. This paper presents detailed operation and analysis of the topology with a proposed modulation scheme. Simulation and experimental results validate the effectiveness and accuracy of the proposed modulation scheme as well as soft-switching and performance of the converter.

Active Input Current Shaper Without an Electrolytic Capacitor for Retrofit Lamps Applications

The evolution of solid-state lighting technology has transformed traditional solutions in lighting. High-brightness light-emitting diodes (HB-LEDs) have become very attractive light sources due to their excellent characteristics, namely high efficiency, a long lifetime, and low maintenance. It is evident that HB-LED drivers must be durable and efficient in order to enjoy these advantages. Moreover, to replace incandescent bulbs, the ac-to-dc HB-LED driver must be simple and have low size and comply with international regulations (i.e., injecting low-frequency harmonics into the mains supply). With the last modifications regarding low-power lighting equipment (i.e., <; 25 W), the authors have traditionally focused their efforts on increasing efficiency by sacrificing sinusoidal input current, yet all their solutions obviate the suppression of the traditional electrolytic capacitor of ac-to-dc converters, highlighting that this is the price to pay for a simple and low-size solution. This paper, however, puts forward the design of a simple and low-size ac-to-dc HB-LED driver for retrofit lamps without an electrolytic capacitor in order to extend its lifetime. The solution proposed here derives from a well-known technique used in the past, the active input current shaper (AICS), but without an electrolytic capacitor in this case. If the electrolytic capacitor of an AICS is removed, then low-frequency ripple arises at its intermediate dc bus, adding some distortion in the line input current over the proper natural one of an AICS. However, this addition is slight in comparison to the proper natural distortion of AICSs. Moreover, the low-frequency ripple at the intermediate bus is not transferred to the output with the help of the rapid output dynamic response of the AICS, which prevents flicker. This paper presents a theoretical analysis that guarantees a compromise between compliance with international regulations and the use of capacitor technologies other than the electrolytic design. Finally, a 24-W experimental prototype has been built and tested to validate the theoretical results presented in this paper.

A Modified Reference of an Intermediate Bus Capacitor Voltage-Based Second-Harmonic Current Reduction Method for a Standalone Photovoltaic Power System

A typical configuration of a standalone photovoltaic power system consists of PV arrays, storage units, a front-end dc–dc converter, a bidirectional dc–dc converter, and a dc–ac inverter. This paper addresses the second-harmonic current (SHC) issue in the front-end dc–dc converter and the bidirectional dc–dc converter when they regulate the intermediate dc bus voltage for the downstream single-phase inverter. The propagations of SHC under different operation modes of the power system are studied, based on which, a method that could make the intermediate bus capacitor fully provide the SHC induced by the dc–ac inverter is proposed. In the proposed method, a modified reference of the intermediate bus capacitor voltage is obtained by adding the desired second-harmonic voltage fluctuation to the original dc voltage reference. By the means of letting the control loop of the dc–dc converter track the modified reference of the intermediate bus voltage, the SHC in the dc–dc converter is well suppressed. The proposed method is easy to be applied in each operation mode of the power system, and it is proved to have the advantage of suppressing the SHC effectively without sacrificing the dynamic performance of the dc–dc converters. The SHC suppressing mechanism of the proposed method is analyzed from the viewpoint of output impedance and a proportional-integral-resonant controller is employed to further enhance the SHC suppressing ability. Finally, a 6-kW photovoltaic power system is built in the laboratory, and the experimental results verify the effectiveness of the proposed method.

A novel combined MPPT-pitch angle control for wide range variable speed wind turbine based on neural network

The objective of this paper is to develop a novel combined MPPT-pitch angle robust control system of a variable-speed wind turbine. The direct driven wind turbine using the permanent magnet synchronous generator (PMSG) is connected to the grid by means of fully controlled frequency converters, which consist of a pulse width-modulation PWM rectifier connected to an inverter via an intermediate DC bus. In order to maximize the exploited wind power and benefit from a wide range of the wind speed, a novel combined maximum power point tracking (MPPT)-Pitch angle control is developed using only one low cost circuit based on Neural Network (ANN), which allows the PMSG to operate at an optimal speed to extract maximum power when this last is lower than nominal power, and limit the extra power. To achieve feeding the grid with high-power and good quality of electrical energy, the inverter is controlled by (PWM) in a way to deliver only the active power into the grid, and thus to obtain a unit power factor. DC-link voltage is also controlled by the inverter. The dynamic and steady-state performances of the wind energy conversion system (WECS) are carried by using Matlab Simulink.