It is known that vacuum work function (WF) of metal is composed of bulk and surface terms [1]. The former is characterized by bulk properties of many-body effect and kinetic energy of electrons. The latter is by potential drop through the surface dipole induced by wave function tailing of electron from metal to vacuum through the potential barrier from Fermi-level to vacuum level. This fact implicates that the surface term of WF is sensitive to a counterpart of interface. Namely, the surface term at semiconductor or insulator interface should be different from that at vacuum surface, though vacuum WF is commonly used to discuss band alignment at metal/semiconductor (M/S) or metal/insulator/semiconductor interfaces. On the other hand, Metal induced gap states (MIGS) is the intrinsic Fermi level pinning (FLP) mechanism at M/S interface, and it is also described as a dipole induced by wave function tail into the band gap of semiconductor [2]. We note that the MIGS and surface term of WF at M/S interface are described by common physics by considering that both of hole and electron tailing from metal as shown in Fig. 1. In other words, MIGS seems just corresponded to surface term at M/S interface. Schottky barrier height (SBH) for conduction band of semiconductor at M/S interface is commonly described as shown in Eq. (1). However, considered with above discussion, the FLP caused by MIGS should rather be described as a modulation of WF. Therefore, if the FLP in Eq. (1) is caused by MIGS, the Eq. (1) should be rewritten with a definition of interface WF as shown in Eq. (2), and then from Eqs. (1) and (2), the interface WF can be written as shown in Eq. (3). This indicates that the S parameter of MIGS is a weight average parameter. Next, we would like to discuss how to suppress the WF modulation and MIGS. We think there are two approaches. The one is passive approach from semiconductor side. As shown in Fig. 1, the modulation of wave function tailing is enhanced by narrowing the gap of semiconductor, which is consistent with general trend discussed in MIGS model [2]. Therefore, for example, effective gap widening by inserting ultra-thin dielectrics between metal and semiconductor is effective. The other is active approach from metal side. Since surface term is only modulated in WF, WF modulation should be suppressed by reducing a weight of surface term in WF. Considering the result of first principle calculation that the surface term is drastically decreased by reducing free electron density n in metal [1], we noticed low n metal seems effective. It is also consistent with Heine’s original idea [3]. Here, we emphasize that MIGS can be controlled from both semiconductor and metal sides independently, and that it is different from common other FLP models based on interface gap states only in semiconductor side. We think that metal/germanium (Ge) interface is well understandable based on this view, which means that MIGS is a dominant origin of strong FLP at metal/Ge interface in Eq.(1) [4]. It is well known that the passive approach is effective to increase S parameter [5]. Recently we also demonstrated deviation from the strong FLP trend and S parameter increasing at low n metal/Ge interface by the active approach [6,7]. In that work, interface structure dependence on SBH was also observed at low n metal/Ge interface [6,7]. It might be due to an appearance of surface structure dependence on WF and various local dipoles by suppression of strong WF modulation to align Fermi-level with FLP energy level characterized by bulk Ge. We discussed M/S interface WF in terms of the wave function tailing from metal. We proposed that interface WF is different from vacuum WF in principle and MIGS is corresponded to surface term of interface WF. Furthermore, the strong FLP at metal/Ge interface is reasonably understandable based on the view. Acknowledgement This work was supported by JST CREST Grant Number JPMJCR14F2, Japan, and partly by JSPS KAKENHI Grant Number JP17K06374. Reference [1] N. D. Lang, and W. Kohn, Phys. Rev. B 3, 1215 (1971). [2] W. Mönch, Appl. Surf. Sci. 92, 367 (1996). [3] V. Heine, Phys. Rev. 138, A1689 (1965). [4] T. Nishimura, et al., Appl. Phys. Lett. 91, 123123 (2007). [5] e.g. T. Nishimura, et al., Appl. Phys. Express 1, 051406 (2008). [6] T. Nishimura, et al., Appl. Phys. Express 9, 081201 (2016). [7] T. Nishimura, et al., Ext. Abs. IEEE Semiconductor Interface Specialist Conference 2016. Figure 1