Integrated Circuit Technology Research Articles

Noise coupling reduction using temperature enhanced device for future integrated circuit integration applications

<p>Information technology-to-internet of things may have succeeded because of fast silicon chip capability expansion. Moore's law, which reduces device size, boosted integrated circuit (IC) performance. Delay rises with highdensity connection parasitic capacitance. Interconnect delays have surpassed transistor delays and slowed progress. An alternative is required now to reduce connection latency. The third dimension is used in popular 3D IC technology IC technology requires through silicon via (TSV) for signal integrity and heat mitigation. Noise coupling hinders electrical communication between signal-carrying TSVs (aggressive TSVs) and ground TSVs (victim TSVs), a 3D IC bottleneck. TSVs must be dielectrically insulated from Si substrates to avoid electrical signal interference. Additionally, first-order modelling will confirm the suggestions. This article proposes using the nanosheet field effect transistor (NSFET) to overcome 3D IC noise coupling and complementary metal oxide semiconductor (CMOS) technology nodes. After discussing the electronic industry and sub nm, several basic metrics and criteria for developing electronic components are presented. The first technique uses Perylene-N's exceptional noise-cancelling characteristics. Second technique uses electrical TSV (ETSV), thermal TSV (TTSV), and heat source models to measure noise coupling on numerous ICs. The third proposes many noise-reducing materials. The suggested structures outperform traditional approaches.</p>

Lester Eastman and the Monolithic Microwave Integrated Circuit Technology [Speaker’s Corner

Lester Eastman and the Monolithic Microwave Integrated Circuit Technology [Speaker’s Corner

Cleaning mechanisms during post chemical mechanical polishing (CMP) using particle removal of surfactants via a citric acid-based solution

With the development of circuit integration technology, the requirements for defects in copper interconnects have become more stringent. The residual SiO2 particles on the copper surface can seriously affect circuit performance and require more efficient and thorough removal. This article investigates the effects of a novel cleaning solution composed of citric acid (CA), alkyl polysaccharide glycosides (APG1214), and dodecylbenzene sulfonic acid (LABSA), aimed at improving the removal efficiency of SiO2 and maintaining the integrity of copper surface. The optimal concentrations of APG1214 and LABSA were determined through contact angle and surface tension analysis. It was found that when APG1214 (2000 ppm) and LABSA (1000 ppm) were combined in a 3:2 vol ratio in CA solution (0.6 wt%), the highest particle removal efficiency (99.5 %) could be achieved while minimizing surface roughness. The results of scanning electron microscopy (SEM) and atomic force microscopy (AFM) confirmed these findings. Combining quantum chemical calculations, new insights into the mechanism of action of different components in clean solutions have been proposed: 1. Similar to CA, LABSA and APG1214 demonstrate a strong affinity for copper, synergistically facilitating the cleavage of Cu-Si bonds. 2. Alternating adsorption of LABSA and APG1214 on free silica particles prevents their re-adsorption onto copper surfaces. 3. Furthermore, their orderly adsorption on copper mitigates the corrosive chelation effect of CA, providing a protective mechanism. These findings are pivotal for the development of advanced, multifunctional cleaning solutions.

Online nonparametric process monitoring for IoT systems using edge computing

Facilitated by modern sensing and integrated circuit technology, Internet of Things (IoT) systems now have the ability to intelligently and automatically collect data, perform computational tasks on an edge, and efficiently make decisions locally or remotely. However, existing multivariate statistical process control methods commonly assume that sensors directly transmit the raw measurements to the central server, and thus the edge computing capability of IoT systems is not effectively harnessed. To fill this literature gap, we propose a monitoring scheme tailored for IoT systems by leveraging their edge computational power. In particular, inspired by the inherent hierarchical structure of the IoT system, we construct the monitoring statistics hierarchically. At each edge device, we first construct a nonparametric stream-level statistic for each data stream and aggregate them to derive the device-level statistics. To eliminate the inconsistency in device-level statistics across different edge devices, the device-level statistics are transformed into time-related statistics, which are then sent to the central server. At the central server, a system-level monitoring statistic is constructed, and the most informative edge devices that should transmit statistics are intelligently determined. Theoretical analyses are carried out to justify the effectiveness of the data transmission strategy. Both simulations and a case study, which is based on an IoT system we built, are conducted to evaluate the performance and validate the superiority of the proposed monitoring scheme.

Wide Voltage Swing Potentiostat with Dynamic Analog Ground to Expand Electrochemical Potential Windows in Integrated Microsystems.

Electrochemical measurements are vital to a wide range of applications such as air quality monitoring, biological testing, food industry, and more. Integrated circuits have been used to implement miniaturized and low-power electrochemical potentiostats that are suitable for wearable devices. However, employing modern integrated circuit technologies with low supply voltage precludes the utilization of electrochemical reactions that require a higher potential window. In this paper, we present a novel circuit architecture that utilizes dynamic voltage at the working electrode of an electrochemical cell to effectively enhance the supported voltage range compared to traditional designs, increasing the cell voltage range by 46% and 88% for positive and negative cell voltages, respectively. In return, this facilitates a wider range of bias voltages in an electrochemical cell, and, therefore, opens integrated microsystems to a broader class of electrochemical reactions. The circuit was implemented in 180 nm technology and consumes 2.047 mW of power. It supports a bias potential range of 1.1 V to -2.12 V and cell potential range of 2.41 V to -3.11 V that is nearly double the range in conventional designs.

Integrated GaN Prism Array Self‐Powered Photodetector on Si for Ultraviolet Imaging and Communication

AbstractTo realize the advantageous combination of microelectronic integrated circuit technology and photonic technology, the development of high‐speed, low‐power, and chip‐integrated photodetection devices is extremely critical. Here, a large‐scale on‐chip integration photodetector array on a Si wafer consisting of 21×21 GaN p‐n homojunction pixels is prepared. The GaN homojunction subunit has significant photovoltaic performance at a bias voltage of 0 V, including high responsivity of 229.5 mA W−1, outstanding specific detectivity of 2.46×1013 Jones (360 nm, 45.7 µW cm−2), and fast response speed of 240/290 µs. Especially, external quantum efficiency can reach 94% in the faint UV illumination at 0 V bias. The excellent photoresponse is confirmed by finite element analysis, which is resulted from an oversized built‐in potential at the p‐n homojunction interface. For exploring potential practical applicability of the device, the full range of active pixels is statistically analyzed. It is confirmed that the small relative deviation of the GaN array is extremely favorable for obtaining high‐resolution imaging capability. Moreover, the prepared device can be used as an optical data receiver for UV optical communication. With compatibility and integrability to Si‐based optoelectronics platforms, the devices are appealing for sensing, imaging and communications.

NV color center fluorescence signal measurement based on FPGA architecture

Nitrogen-vacancy (NV) quantum defects in diamond are sensitive detectors of magnetic fields. Then, the existing sensing technologies based on diamond NV centers rely on bulky and expensive instruments, which must be replaced by a more compact design. Here we combine NV quantum sensing technology with integrated circuit technology to create a compact and easy-to-operate platform. Using the existing integrated circuit technology, we integrate the lock-in amplifier, microwave generator and TTL modulator together. with this platform, we can obtain a magnetic sensitivity of 5.72μT/Hz 1/2.

Exploring the significance and applications of Field Programmable Gate Arrays in modern integrated circuits

In recent years, the rapid advancement of electronic technology and large-scale integrated circuit technology has led to increased integration of integrated circuits and expanding system scales on integrated motherboards. This evolution presents new challenges and demands in system design. Field Programmable Gate Arrays (FPGAs), a vital VLSI technology, have found extensive applications in communication, image processing, computers, and other domains, becoming a pivotal component of contemporary electronic systems. This paper aims to enhance the understanding of FPGAs by first delving into their theoretical foundations, followed by an overview of their general structural elements and a historical perspective on FPGA development. Additionally, this analyse and summarize relevant literature in the third section, focusing on the three primary application areas of FPGAs, elucidating their research processes and findings. Finally, the fourth section offers insights into the future directions of FPGA development, grounded in the current context. By acquainting readers with FPGAs essential attributes and its multifaceted applications, this paper underscores the pivotal role of FPGAs in the landscape of modern integrated circuits.

Carbon nanotube integrated circuit technology: purification, assembly and integration

Abstract As the manufacturing process of silicon-based integrated circuits (ICs) approaches its physical limit, the quantum effect of silicon-based field-effect transistors (FETs) has become increasingly evident. And the burgeoning carbon-based semiconductor technology has become one of the most disruptive technologies in the post-Moore era. As one-dimensional nanomaterials, carbon nanotubes (CNTs) are far superior to silicon at the same technology nodes of FETs because of their excellent electrical transport and scaling properties, rendering them the most competitive material in the next-generation ICs technology. However, certain challenges impede the industrialization of CNTs, particularly in terms of material preparation, which significantly hinders the development of CNT-based ICs. Focusing on CNT-based ICs technology, this review summarizes its main technical status, development trends, existing challenges, and future development directions.

Microscopy of terahertz spoof surface plasmons propagating on planar metamaterial waveguides

Surface plasmon polaritons (SPPs) are electromagnetic waves that have attracted significant interest owing to their subwavelength confinement and the strong field enhancement that they provide. Yet in the terahertz (THz) frequency region of the spectrum, which is well below the plasma frequency of metals, these surface waves are characterized by extremely weak confinement that has severely limited their exploitation for information processing and sensing. One means to circumvent this limitation is through subwavelength structuring of a metallic surface, which can thereby be engineered to support the propagation of spoof surface plasmon polaritons (SSPPs) that closely mimic the properties of SPPs. In this work, we report the design and experimental characterization of an ultra-thin metamaterial planar waveguide that supports SSPPs at THz frequencies. Finite-element method simulations are shown to predict the excitation of SSPPs on the surface of our devices under free-space illumination at 3.45 THz. We investigate these structures experimentally using THz scattering-type scanning near-field microscopy (THz-s-SNOM) to map directly the out-of-plane electric field associated with the propagation of SSPPs on the surface of the waveguides. Our work paves the way for the future development of plasmonic integrated circuit technologies and components operating in the THz frequency band.

Performance Evaluation of the uMI Panorama PET/CT System in Accordance with the National Electrical Manufacturers Association NU 2-2018 Standard.

The uMI Panorama is a novel PET/CT system using silicon photomultiplier and application-specific integrated circuit technologies and providing exceptional spatial and time-of-flight (TOF) resolutions. The objective of this study was to assess the physical performance of the uMI Panorama in accordance with the National Electrical Manufacturers Association (NEMA) NU 2-2018 standard. Methods: Spatial resolution, sensitivity, count rate performance, accuracy, image quality, and TOF resolution were evaluated in accordance with the guidelines outlined in the NEMA NU 2-2018 standard. Energy resolution was determined using the same dataset acquired for the count rate performance evaluation. Images from a Hoffman brain phantom, a mini-Derenzo phantom, and 3 patient studies were evaluated to demonstrate system performance. Results: The transaxial spatial resolution at full width at half maximum was measured as 2.88 mm with a 1-cm offset from the center axial field of view. The sensitivity at the center axial field of view was 20.1 kcps/MBq. At an activity concentration of 73.0 kBq/mL, the peak noise-equivalent count rate (NECR) reached 576 kcps with a scatter fraction of approximately 33.2%. For activity concentrations at or below the peak NECR, the maximum relative count rate error among all slices remained consistently below 3%. When assessed using the NEMA image quality phantom, overall image contrast recovery ranged from 63.2% to 88.4%, whereas background variability ranged from 4.2% to 1.1%. TOF resolution was 189 ps at 5.3 kBq/mL and was consistently lower than 200 ps for activity concentrations at or below the peak NECR. The patient studies demonstrated that scans at 2 min/bed produced images characterized by low noise and high contrast. Clear delineation of nuclei, spinal cords, and other substructures of the brain was observed in the brain PET images. Conclusion: uMI Panorama, the world's first commercial PET system with sub-200-ps TOF resolution, demonstrated fine spatial and fast TOF resolutions, robust count rate performance, and high quantification accuracy across a wide range of activity levels. This advanced technology offers enhanced diagnostic capability for detecting small and low-contrast lesions while showing promising potential under high-count-rate imaging scenarios.

Quantum Computing and Machine Learning on an Integrated Photonics Platform

Integrated photonic chips leverage the recent developments in integrated circuit technology, along with the control and manipulation of light signals, to realize the integration of multiple optical components onto a single chip. By exploiting the power of light, integrated photonic chips offer numerous advantages over traditional optical and electronic systems, including miniaturization, high-speed data processing and improved energy efficiency. In this review, we survey the current status of quantum computation, optical neural networks and the realization of some algorithms on integrated optical chips.

Analyzing correlation with BER: Constellation diagrams across various modulation modes and FDM/OFDM

Over the last two decades, owing to rapid advancements in digital signal processing and integrated circuit technology, Frequency Division Multiplexing (FDM) and Orthogonal Frequency Division Multiplexing (OFDM) have emerged as pivotal technologies for wireless multimedia communication. Research reveals that coupling OFDM with diverse modulation modes aids in mitigating the Bit Error Rate (BER) during transmission. Nonetheless, a comprehensive elucidation remains absent regarding the interplay between constellation diagrams and BER, as well as the correlation between FDM and BER. Thus, the primary focus of this research is to dissect the correlation between BER and constellation diagrams for distinct modulation methodologies, while also scrutinizing the impact of FDM on BER. The research methodology adopted herein entails two main steps: First, gathering papers pertinent to constellation diagrams, BER, FDM, and OFDM technology. Second, leveraging survey and literature analysis methodologies for thorough examination. The findings highlight that diverse constellation diagram designs yield disparate BER outcomes post demodulation. Foremost among the influential factors on FDM and OFDM technology BER are distinct Inter-Carrier Interference (ICI) patterns and the quantity of subcarriers stemming from signal wave side lobes. To address the BER challenge, a prospective avenue involves refining the selection of constellation diagram styles for demodulation, leveraging an understanding of constellation diagram traits. Furthermore, future research endeavors should delve deeply into co-channel interference and adjacent channel interference to contribute effectively towards BER reduction and augmenting channel reliability.

A 5G beam-steering microstrip array antenna using both-sided microwave integrated circuit technology

In this paper a beam steering 2×2 microstrip array antenna is proposed and simulated for the 5G sub-6 GHz frequency band. The array antenna is designed at the resonant frequency of 3.5 GHz. The antenna has four patches excited by two microstrip lines. Microstrip lines on top of teflon substrate of 0.8 mm height and slot line in the ground plane makes a hybrid junction. The design uses both sided microwave integrated circuit (MIC) to feed signal to the patch elements. This designed array antenna has the beam steering capability of maximum -17º to +17º while keeping the side lobe gain below 10 dB. The simulation results show that the array antenna is designed through good input impedance matching. The antenna has a return loss of -43 dB at center frequency 3.5 GHz. The results also show that the array antenna has a high gain of 12.57 dBi and directivity of 25.11 dB. The maximum gain of this antenna is 24.1 dB at -17º and +17º. The proposed work is simulated on keysight technologies advanced designed system (ADS).

Principal Analysis and Application of Laser Technology in Integrated Circuits

Since the constant development of science and technology and the popularization of electronic devices, integrated circuits are also developing in the direction of large scale and high precision. This requires the processing of integrated circuits to be constantly refined. This also prompted the laser technology has become an important processing technology in the manufacturing process of large-scale integrated circuits. Laser processing technology is a non-contact processing, its beam diameter is small, high-energy density, high productivity, stable and reliable processing quality. This paper for the laser welding, laser direct writing, laser detection and laser cleaning overview of the four-laser technology in the application of large-scale integrated circuits. And the working principle, type and process characteristics of these laser technologies are discussed. The development of laser technology has also limited the production of large-scale integrated circuits in some aspects. With the semiconductor laser, excimer laser process continues to mature, laser technology in integrated circuits will continue to expand the scope of application and break through the obstacles.

Curved GaAs cantilever waveguides for the vertical coupling to photonic integrated circuits.

We report the nanofabrication and characterization of optical spot-size converter couplers based on curved GaAs cantilever waveguides. Using the stress mismatch between the GaAs substrate and deposited Cr-Ni-Au strips, single-mode waveguides can be bent out-of-plane in a controllable manner. A stable and vertical orientation of the out-coupler is achieved by locking the spot-size converter at a fixed 90 ∘ angle via short-range forces. The optical transmission is characterized as a function of temperature and polarization, resulting in a broad-band chip-to-fiber coupling extending over 150 nm wavelength bandwidth at cryogenic temperatures, with the lower bound for the coupling efficiency into the TE mode being 16±2% in the interval 900-1050 nm. The methods reported here are fully compatible with quantum photonic integrated circuit technology with quantum dot emitters, and open opportunities to design novel photonic devices with enhanced functionality.

Development Status, Comparison and Inspiration of Integrated Circuit Virtual Simulation Teaching at Home and Abroad

Abstract The cultivation of higher vocational integrated circuit technology professionals requires a complete practical training teaching system and practical training conditions, especially integrated circuit layout design, production process, packaging and testing and other process personnel training needs to be completed in a real work scenario, the virtual simulation training is just for the integrated circuit professional education and teaching to provide support. This paper takes CNKI, SCI and EI databases as the research data source. It uses word frequency analysis and co-word analysis in statistical analysis to quantitatively analyze the development status of virtual simulation teaching of integrated circuits at home and abroad. And combined with the clustering analysis algorithm to explore the integration results of the keywords of integrated circuit virtual simulation teaching at home and overseas, and give the path to improve the high-quality development of integrated circuit virtual simulation teaching. It has been found that the domestic research related to IC virtual simulation teaching has improved by 80 times during 2000–2022, but the foreign research is 1.642 times higher than the domestic one. In addition, domestic and foreign countries are mainly focused on virtual simulation and innovative practice, respectively, and their word frequencies have reached 465 and 596 times respectively. Higher vocational colleges and universities need to optimize the teaching mode of industry-teaching integration, use virtual simulation technology to help students understand the knowledge related to integrated circuits, and provide technical support for improving the quality of talent training.

Current-mode PID controllers employing commercially available active components

This work describes two current-mode (CM) PID controllers using only two commercially active components, namely, current feedback operational amplifier (CFOA), and four passive components, i.e. two capacitors and two resistors. They have appropriate output and input impedance values, allowing them to be utilized in cascade connections without requiring a buffer circuit. Since all capacitors are grounded, it is suitable for integrated circuit (IC) technology. Moreover, the controllers can be easily modified to operate in voltage-mode (VM), transimpedance-mode (TIM), and transadmittance-mode (TAM) PID controllers. Using 0.18 µm CMOS parameters and the PSPICE program, the proposed circuits are simulated to verify the theoretical behavior. To demonstrate the viability of the circuits, experimental tests using commercially available AD844 integrated circuits are performed. The suggested PID circuits are alsoexperimental tested in a closed-loop system as an example.

Characteristic analysis and simulation of a Cu-graphene hybrid nanointerconnect under different Drude models

It is well known that the ultra thin barrier layer around the Cu nanointerconnect has a great impact on its performance. Currently, graphene is the thinnest two-dimensional material. Cu-graphene hybrid nanointerconnects can significantly advance the potential of integrated cirCuit technology. In this article, we put a monolayer graphene on the top, left and right sides of a Cu nanointerconnect. graraphene adopts three Drude models, namely, the Drude model obtained by simplified Kubo formula, the Drude-Lorentz model, and the Drude model derived from Boltzmann equation. We use cst to simulate the voltage-current variation and propagation delay characteristics of a Cu-graphene hybrid nanointerconnect are observed under three Drude models and compared with a Cu nanointerconnect. Finally, the Drude model of graphene which is derived from the Boltzmann transport equation can minimize the voltage of the Cu nanointerconnect and reduce the propagation delay of the two ports of the Cu nanointerconnect.

Coupling effect between electromigration and joule heating on the failure of ball grid array in 3D integrated circuit technology

Ball Grid Array (BGA) packaging method has been widely used in microelectronic devices, and electromigration (EM) in BGA is a crucial reliability issue, determining the performance of the products. Herein, we report a new failure mode induced by a coupling effect of EM and Joule heating in BGA structure. The test sample consists of a roll of 500 μm-BGA solder joints with upper and lower Cu under-bump-metallization (UBM) of different thicknesses, 16 μm, and 68 μm, respectively. Open failures of the thinner cathodic Cu UBM at the contacting area with solder joint were observed under four different EM conditions (130 °C-3000 A/cm2, 160 °C-2300 A/cm2, 160 °C-3000 A/cm2, and 160 °C-4600 A/cm2). Infrared (IR) results reveal the temperature at the thinner Cu UBM is higher than that in the solder joint as well as at the thicker Cu UBM. Simulation results elucidate the current density at the contacting area is about 22 times higher than the average density in the solder joint, so the effect of current crowding can be very serious in the failure site. Furthermore, severe current crowding and Joule heating promote the nucleation rate of voids at the joint location, which can further increase the current density and temperature, leading to a positive feedback effect until an open failure occurs in the circuitry. Our analysis enables the discussion of a coupling failure mode of EM and Joule heating in BGA, and provides a valuable guide of device design against EM failure in consumer electronic products.