Input-output Terminals Research Articles

Behavioral Modeling Paradigm for DC Nanogrid Based Distributed Energy Systems

The remarkable progress of power electronic converters (PEC) technology has led to their increased penetration in distributed energy systems (DES). Particularly, the direct current (dc) nanogrid-based DES embody a variety of sources and loads, connected through a central dc bus. Therefore, PECs are required to be employed as an interface. It would facilitate incorporation of the renewable energy sources and battery storage system into dc nanogrids. However, it is more challenging as the integration of multiple modules may cause instabilities in the overall system dynamics. Future dc nanogrids are envisioned to deploy ready-to-use commercial PEC, for which designers have no insight into their dynamic behavior. Furthermore, the high variability of the operating conditions constitute a new paradigm in dc nanogrids. It exacerbates the dynamic analysis using traditional techniques. Therefore, the current work proposes behavioral modeling to perform system level analysis of a dc nanogrid-based DES. It relies only on the data acquired via measurements performed at the input–output terminals only. To verify the accuracy of the model, large signal disturbances are applied. The matching of results for the switch model and its behavioral model verifies the effectiveness of the proposed model.

Multifunctional Bandpass Filters With Reconfigurable and Switchable Band Control

A new series of multifunctional reconfigurable bandpass filters (BPFs) and their analytical synthesis design are presented in this paper. They feature frequency-adaptive characteristics in both their passbands and notched bands, as well as switchable-notched-band capability. Their basic filter architecture is discussed and modeled in a progressive manner. The initial circuit consists of a second-order Chebyshev-type filter to which two stubs are added to increase filtering selectivity through transmission-zero (TZ) creation. Subsequently, to produce an embedded notched band, stubs acting as band-stop structures are also inserted at the input–output terminals. The multifunctional properties of this filter scheme are analyzed attending to the resonance frequencies of the introduced stubs. When these resonance frequencies are tuned while keeping a constant spacing between them, a center-frequency reconfiguration with constant bandwidth is achieved; when the resonance frequency of the notched band is shifted to the TZ positions, the notched band is switched-off. The described filter synthesis methodology is based on the constant and frequency-mapping technique, where the dual-mapping functions are controlled to obtain reconfigurable/switchable properties from a low-pass prototype. For experimental-validation purposes, two reconfigurable lumped-element filter prototypes using the proposed synthesis technique are designed, manufactured, and tested. One exhibits a simple reconfigurable passband, whereas the other one adds a controllable/switchable embedded notched band that results in a quasi-elliptic-type dual-passband response. When compared to some related prior-art designs, these filters have the advantages of explicit design process, quantified analysis, and multifunctional responses.

A nonlinear macromodel for current-feedback operational amplifiers

This paper proposes a macromodel to emulate the nonlinear behavior of current-feedback operational amplifiers (CFOAs) at low-frequency. The main difference between this macromodel and those reported previously in the literature is that herein, real physical active device performance parameters along with parasitic elements associated to the input–output terminals of the amplifier are considered. To validate the deduced behavioral model, a saturated nonlinear function series (SNFS) based on CFOAs is built and numerical simulations are generated. In this point, the modeling problem is cast in terms of an augmented set of equations but that, unlike a piece-wise linear (PWL) approach, the dynamic behavior of each CFOA is considered. Afterwards, the SNFS is experimentally tested by using commercially available active devices, confirming good agreement among theoretical simulations and experimental tests at two operating frequencies and showing a better accuracy compared with a PWL approach and a linear model for CFOAs. Because the derived nonlinear macromodel for CFOAs is used for generating the behavioral model of the SNFS, one concludes that the latter is also both accurate and efficient with respect to traditional techniques, such as PWL approaches.

Pathological Equivalents of Fully-Differential Active Devices for Symbolic Nodal Analysis

The use of pathological elements (i.e., nullators, norators, and the voltage mirror-current mirror pair) as universal active elements opens up the possibility to model the behavior of active devices with either differential features or input-output multiples, in order to be used in analysis tasks of linear(ized) analog circuits. This brief tries on the modeling this class of active devices, which is carried out by considering the impedance characteristics along with the behavior equation of each active device, the kind of signal to be processed and by applying the pathological element properties. In order to obtain a more realistic model, not only parasitic elements associated to the input-output terminals of each active device are considered, but the tracking errors of voltage and current differential followers modeled with grounded pathological elements and admittances are also included. Due to that the gain and tracking errors are finites and of limited bandwidth, a two-pole model is used for each of them in order to include their contributions on the symbolic expressions computed. Because the behavior of fully-differential amplifiers is modeled with grounded pathological elements, a standard nodal analysis can be performed. This imply that not only the size of the admittance matrix is smaller than those generated by applying modified nodal analysis (MNA) method, for instance, but also the number of nonzero elements and the generation of cancellation-terms are both reduced. As a result, the computational complexity during the solution of the system of equations is reduced when recursive determinant-expansion techniques are applied. Examples are described and compared with the MNA method, in order to show the usefulness of the proposed models to compute fully-symbolic small-signal characteristics of analog circuits containing fully-differential active devices and/or with input-output multiples.

Technology Trend of AMLCDs for Mobile Application

Novel devices to serve the needs of ubiquitous network require powerful input-output terminals with exceptional characteristics. In response to these requirements, we have developed high performance TFTs and System LCD using CG Silicon® technology. In addition, we have demonstrated advanced system integration technology for mobile application such as sensors, the fusion of audio with visual and fine picture quality with good image control. And we have been developing Flexible Displays, and a new Reflective LCD technology for achieving super low power consumption.

22.1: Invited Paper: CG Silicon® Technology and System Integration for Mobile Applications

The keywords for the ubiquitous network and high-information-content era are “information” and “audio-visual”. Novel devices to serve the needs of ubiquitous network require powerful input-output terminals with exceptional characteristics. In response to these requirements, we have developed high performance TFTs and “System LCD” using CG Silicon® technology. In addition, we have demonstrated advanced system integration technology for mobile application such as sensors, the fusion of “audio” with “visual” and fine picture quality with good image control. For future, ubiquitous information tools, we are developing super-advanced poly-Si TFT devices capable of frequencies of over 1GHz on glass substrate.

A three-stage one-sided rearrangeable polygonal switching network

This paper proposes a three-stage rearrangeable polygonal switching network (PSN) for interconnecting one-sided input-output terminals. In comparing our PSN with a three-stage one-sided Clos switching network of the same size and with the same number of switches, we prove that rearrangeability of a PSN is better than that of a Clos switching network. Also, the switching efficiency of the PSN is explored.

An algorithm for determining the most reliable path of a network

This paper present an algorithm for determining the most reliable path between two specified vertices of a communication network, taking into account both the reliabilities of nodes and links. The proposed algorithm is based on the basic idea of node removal technique, which is generally used for finding Boolean transmission functions between input-output terminals in the analysis of bilateral switching networks. The proposed algorithm can be applied to oriented or non-oriented, symmetric or non-symmetric networks and is capable of handling networks with hundreds of nodes and links. The proposed algorithm is a good time saver and efficient for large networks, as compared to other existing methods.

An algorithm for determining the best path in a computer communication network

This paper presents an algorithm for determining the best path between two specified vertices of a computer communication network, taking into account the reliabilities and delay at nodes and of links. The network is modelled by a linear graph. The basic idea of node removal technique, which is generally used for finding Boolean-transmission functions between input-output terminals in the analysis of switching network, is extended to develop the proposed algorithm. The proposed algorithm can be applied to oriented or non-oriented, symmetric or non-symmetric networks and is capable of handling networks with hundreds of nodes and links. The proposed algorithm is a good time-saver and is efficient especially for large networks. The algorithm is explained with the help of a numerical example, which considers the well-known ARPA network.

Wire Laying Methods as an Alternative to Multilayer PCB's

The rapid growth of integrated circuit technology, culminating in VLSI circuits, is responsible for the proliferation of new, surface mountable device packages with large numbers of input-output terminals. Conventional printed circuit or multilayer techniques have been driven to the technological edge in the effort to interconnect these new types of packages. Because the etched conductors can be replaced with fine, insulated wires, automated high density discrete wiring techniques can provide easier high density interconnections and with shorter turn-around times. Among the dozen or so presently available discrete wiring techniques, the fastest growing is Multiwire®. Multiwire is a computer based design and manufacturing system, where special machines are precisely laying down polyimide insulated wires over adhesive coated substrates having etched power and ground planes. The finished boards exhibit microstrip characteristics, providing impedance control for high speed applications. The manufacturing process and Multiwire board performance capabilities are described in this paper.

Optimal Allocation of Non-identical Components in a Special 2-Port Network

A 2-port network is designed with non-i.i.d components. The network has either a) non-i.i.d series stages, each with parallel components or b) non-i.i.d parallel strings, each with series components (dual network). Components have 2 modes of failures: open and short. The network success requirement is that its input-output terminals be neither short or open. The optimal design which has the minimum unreliability is obtained by a computer algorithm.

Optimum Allocation of Components in a Special 2-Port Network

A 2-port network is designed with i.i.d. components and has a) i.i.d. series stages, each with parallel components or b) i.i.d parallel strings, each with series components (dual network); components can fail in either an open or short mode. The network-success requirement is that its input-output terminals be neither open nor short. A computer algorithm is given which determines a) the number of required components from the available number of components, b) the optimum number of stages or parallel strings, and c) the optimum number of components per stage or string, to maximize system reliability. The case of an unlimited number of components is considered in connection with the design of the network to meet a prescribed level of reliability.

Fault Isolation in Conventional Linear Systems: A Progress Report

A computer program is described which implements a previously suggested procedure for isolating faults in conventional linear systems. The technique is based on the analysis of network function responses at critically chosen test frequencies applied to the normal input-output terminals of the circuit under test. The feasibility of the diagnosis technique is discussed in terms of the experience with the computer program and some empirical studies which have been conducted. Example circuits are included which have been processed by the computer program. Problem areas related to both the basic theory of the technique and the computational limitations of implementation are defined. Solutions are proposed for some of these problems; others are merely defined for study by the circuit theorists.