Initial Wafer Research Articles

Study on the Deposition Characteristics of Molybdenum Thin Films Deposited by the Thermal Atomic Layer Deposition Method Using MoO2Cl2 as a Precursor

In this study, we conducted research on manufacturing molybdenum (Mo) thin films by a thermal atomic layer deposition method using solid MoO2Cl2 as a precursor. Mo thin films are widely used as gate electrodes and electrodes in metal-oxide semiconductor field-effect transistors. Tungsten (W) has primarily been used as a conventional gate electrode, but it suffers from reduced resistivity due to the residual fluorine component generated from the deposition process. Thus, herein, we developed a Mo thin film with low resistivity that can substitute W. The MoO2Cl2 precursor used to deposit the Mo thin film exists in a solid state. For solid precursors, the vapor pressure does not remain constant compared to that of liquid precursors, thereby making it difficult to set process conditions. Furthermore, the use of solid precursors at temperatures 600 °C and above has many limitations. Herein, H2 was used as the reactive gas for the deposition of Mo thin films, and the deposition temperature was increased to 650 °C, which was the maximum processing temperature of the aluminum nitride heater. Additionally, deposition rate, resistivity change, and surface morphology characteristics were compared. While resistivity decreased to 12.9 μΩ∙cm with the increase of deposition temperature from 600 °C to 650 °C, surface roughness (Rq) was increased to 0.560 nm with step coverage of 97%. X-ray diffraction analysis confirmed the crystallization change in the Mo thin film with increasing process temperature, and a certain thickness of the seed layer was required for nucleation on the initial wafer of the Mo thin film. Thus, the molybdenum nitride thin film was deposited after the 4 nm deposition of Mo thin film. This study confirmed that crystallinity of Mo thin films must be increased to reduce their resistivity and that a seed layer for initial nucleation is required.

Tuning electrical properties in Ga2O3 polymorphs induced with ion beams

Ion beam fabrication of metastable polymorphs of Ga2O3, assisted by the controllable accumulation of the disorder in the lattice, is an interesting alternative to conventional deposition techniques. However, the adjustability of the electrical properties in such films is unexplored. In this work, we investigated two strategies for tuning the electron concentration in the ion beam created metastable κ-polymorph: adding silicon donors by ion implantation and adding hydrogen via plasma treatments. Importantly, all heat treatments were limited to ≤600 °C, set by the thermal stability of the ion beam fabricated polymorph. Under these conditions, silicon doping did not change the high resistive state caused by the iron acceptors in the initial wafer and residual defects accumulated upon the implants. Conversely, treating samples in a hydrogen plasma converted the ion beam fabricated κ-polymorph to n-type, with a net donor density in the low 1012 cm−3 range and dominating deep traps near 0.6 eV below the conduction band. The mechanism explaining this n-type conductivity change may be due to hydrogen forming shallow donor complexes with gallium vacancies and/or possibly passivating a fraction of the iron acceptors responsible for the high resistivity in the initial wafers.

Improvement of the signal to noise ratio for fluorescent imaging in microfluidic chips

Microfluidics systems can be fabricated in various ways using original silicon glass systems, with easy Si processing and surface modifications for subsequent applications such as cell seeding and their study. Fluorescent imaging of cells became a standard technique for the investigation of cell behavior. Unfortunately, high sensitivity fluorescent imaging, e.g., using total internal reflection fluorescence (TIRF) microscopy, is problematic in these microfluidic systems because the uneven surfaces of the silicon channels’ bottoms affect light penetration through the optical filters. In this work, we study the nature of the phenomenon, finding that the problem can be rectified by using a silicon-on-insulator (SOI) substrate, defining the channel depth by the thickness of the top Si layer, and halting the etching at the buried SiO2 layer. Then the fluorescent background signal drops by = 5 times, corresponding to the limit of detection drop from = 0.05 mM to = 50 nM of fluorescein. We demonstrate the importance of a flat surface using TIRF-based single-molecule detection, improving the signal to a noise ratio more than 18 times compared to a conventional Si wafer. Overall, using very high-quality SOI substrates pays off, as it improves the fluorescence image quality due to the increase in signal-to-noise ratio. Concerning the cost of microfluidic device fabrication—design, mask fabrication, wafer processing, and device testing—the initial SOI wafer cost is marginal, and using it improves the system performance.

Photovoltaic Response of Silicon Wafers Treated in the K2WO4-Na2WO4-WO3 Melt

Texturing silicon wafers is one way to increase the performance of solar cells. This work is the first to report on the surface modification of Si wafers by processing in polytungstate melts. Scanning electron microscopy (SEM), atomic force microscopy (AFM), X-ray diffraction analysis (XRD), the Brunauer–Emmett–Teller (BET) method, and photoelectrochemical measurements were used to elucidate the effect of texturing conditions in the Na2WO4—K2WO4 (1:1) melt containing 35 or 50 mol% WO3 at 973 K in air. As a result of cathodic treatment in the melt containing 50 mol% WO3 at the potential of –0.92 V (vs Pt) for 15 s, upright pyramids were formed on the Si surface. In addition, inverted pyramids appeared at the OTB/Si contact points. The photocurrent density of these samples was several times higher than that for the initial Si wafer or the Si wafer etched in 5 M NaOH solution at 353 K for 20 min. Mechanisms for the formation of upright and inverted pyramids were proposed. Unusual eight-faceted pyramids were formed on the Si surface during cathodic treatment in the melt containing 35 mol% WO3 at –1.19 V for 15 s, but the photocurrent density of such samples was low.

Increased Hydrophilicity of Silicon Surface through Plasma Treatment with Hydrogen Peroxide Gas

Increased Hydrophilicity of Silicon Surface through Plasma Treatment with Hydrogen Peroxide GasSpiegelman, D. Alvarez, C. Ramos (RASIRC), K. Andachi, G. Tsuchibuchi, and K. Suzuki (Taiyo Nippon Sanso Corporation)Wafer bonding is a critical step in the development of advanced semiconductor and MEMS devices.1 Wafer bonding enables the bonding of dissimilar materials as well as the union of separate manufacturing pathways where the pathway steps are dissimilar and frequently incompatible to a single wafer process. Oxide wafer bonding is a common bonding method that requires the wafer surface to have a uniformly flat surface with sufficiently dense hydroxyl (-OH) groups. The hydroxyl groups provide a pathway for chemical covalent bonding between two wafer surfaces (EG Si-O-Si). Ultimately, the wafer bonding strength is a function of the density of the hydroxyl groups populated on the wafer surface before bonding.Several challenges are associated with functionalizing wafer surfaces. Wet Thermal oxidation is a common method for incorporating surface hydroxyl groups on silicon, however this process typically takes place at very high temperatures (>600C °) where surface hydroxyl groups may reversibly desorb, thus limiting surface functionalization. Surface oxidation by Oxygen plasma is another common method for the creation of hydrophilic surfaces,2 however, this property may be attributed to bridging oxides on the surface, where hydroxyl groups may not be present. In the latter case, residual charge or surface radical species may lead to the observed improvement in wafer bonding properties. Plasma oxidation allows for lower temperature activation.2 Oxygen or clean dry air are frequently used in the plasma process with argon.Our investigation involves the use of hydrogen peroxide gas. In recent years this material has become available in the gas phase where:Gas-phase H2O2/H2O mixture is delivered from an ampoule-based formulation. (RASIRC® BRUTE® Peroxide)High concentration H2O2/H2O is vaporized by in situ concentration methods and use of a membrane vaporizer as a gas generator. (RASIRC Peroxidizer®)Early studies by Kummel3 demonstrated that Hydrogen peroxide gas provides a denser hydroxyl surface on SiGe and Ge vs water. Here, all thermal methods were utilized at reduced temperatures.Before our current work, the creation and use of gas-phase hydrogen peroxide plasma has not been addressed. The objective of this work is to demonstrate the generation of hydrogen peroxide plasma and compare its surface functionalization characteristics to those of water and oxygen plasma methods.A constant gas stream of H2O2/H2O mixture in a carrier gas was introduced to a remote plasma source (MKS). (Figure 1). The use of an argon carrier gas led to stable ignition of the plasma mixture. The subsequent addition of oxygen gas gives rise to plasma instability.In the comparative study, the H2O2 gas stream was mixed with water vapor, molecular oxygen, and argon in different ratios, subjected to a remoted plasma. Functionalization was then carried out on a Si-H terminated surface (HF last silicon wafer surface). Thermal effects without plasma were also compared. Surface hydrophilicity (relative Hydroxyl density) was determined by contact angle measurements with the use of a goniometer.The initial wafer surface after HF clean had a water contact angle of 84.9 °. The smallest wetting angle was found for H2O2/H2O/Ar plasma at 4 °. Water alone led to a wetting angle that was 62.5% larger than the hydrogen peroxide mixture. The angle increased with increasing oxygen concentration in the H2O2 gas stream. The wetting angle with dry oxygen at 200C ° was 27.3°. Thermal only H2O2 gas at 150C° was 47.3 ° and further reduced to 11.4 ° when the temperature was increased to 300C °. (Figure 2). These results along with mechanism and ramifications for wafer bonding will be discussed.

A systematic study of silicon nanowires array fabricated through metal-assisted chemical etching

Aligned and uniform silicon nanowires (SiNWs) arrays were fabricated with good controllability and reproducibility by metal-assisted chemical etching in aqueous AgNO3/HF etching solutions in atmosphere. The SiNWs formed on silicon were characterized by scanning electron microscopy (SEM), energy-dispersive X-ray (EDX), high-resolution transmission electron microscopy (HRTEM) and selected-area electron diffraction (SAED). The results show that the as-prepared SiNWs are perfectly single crystals and the axial orientation of the Si nanowires is identified to be parallel to the [111] direction, which is identical to the initial silicon wafer. In addition, a series of experiments were conducted to study the effects of etching conditions such as solution concentration, etching time, and etching temperature on SiNWs. And the optimal solution concentrations for SiNWs have been identified. The formation mechanism of silicon nanowires and silver dendrites were also discussed.

Automated Detection and Classification of Defective and Abnormal Dies in Wafer Images

This article presents an automated vision-based algorithm for the die-scale inspection of wafer images captured using scanning acoustic tomography (SAT). This algorithm can find defective and abnormal die-scale patterns, and produce a wafer map to visualize the distribution of defects and anomalies on the wafer. The main procedures include standard template extraction, die detection through template matching, pattern candidate prediction through clustering, and pattern classification through deep learning. To conduct the template matching, we first introduce a two-step method to obtain a standard template from the original SAT image. Subsequently, a majority of the die patterns are detected through template matching. Thereafter, the columns and rows arranged from the detected dies are predicted using a clustering method; thus, an initial wafer map is produced. This map is composed of detected die patterns and predicted pattern candidates. In the final phase of the proposed algorithm, we implement a deep learning-based model to determine defective and abnormal patterns in the wafer map. The experimental results verified the effectiveness and efficiency of our proposed algorithm. In conclusion, the proposed method performs well in identifying defective and abnormal die patterns, and produces a wafer map that presents important information for solving wafer fabrication issues.

Design and application of gas cluster accelerator for surface smoothing and nanostructures formation

A custom-built gas cluster ion source with energy up to 50 keV is constructed, and Ar, CO<sub>2</sub>, N<sub>2</sub>, and O<sub>2</sub> are used as the working gases. The clusters are formed by a metal supersonic conical nozzle with critical diameter in a range of 65–135 μm and a cone angle of 14°. The nozzle is powered in the pulsed mode, which improves the pumping conditions, and also makes it possible to increase the gas pressure in the stagnation zone to 15 atm and thereby obtain larger clusters. Based on the principle of ultrasonic expansion, gas cluster ions with an average size of 3000 atoms are obtained. The cluster beam current of 50 μA is obtained. The Ar cluster beam, which is less reactive, is used for treating surface, namely, surface smoothing and formation of self-assembled nanostructures. The Ar cluster bombardment perpendicular to the surface of the substrate is used to demonstrate the smoothing of the surface of Si wafers, Ti coating, and Au film. For the initial Si wafer, its root-mean-square (RMS) roughness of 1.92 nm decreases down to 0.5 nm after cluster beam treatment. The cleaning effect of the cluster beam is also observed very well. The one-dimensional (1D) isotropic power spectral density of the Si surface topography before and after smoothing are also discussed. The off-normal irradiation Ar cluster beam is also used to form self-assembled surface nanoripple arrays on the surface of flat ZnO single crystal substrates. The ripple formation is observed when the incident angle of the cluster beam is in a range of 30°–60°. The process of nanoripple fabrication is significantly governed by the cluster beam incident angle, energy and dose. The nano-ripples formed on the flat substrates remain eolian sand ripples and their formation starts at the incident angle of 30°. The most developed nanoripples are observed at the incident angle within a range of 45°–60°. The surface morphology and characteristic distribution of the nano-structures on the flat ZnO substrate are also analyzed by the two-dimensional (2D) power spectral density function. Next, Ar cluster beam is used for irradiating the ZnO nanorod arrays grown on the Si substrate. Due to various angles between the nanorod’s axis and the substrate normal, the conditions of the ripple formation on the nanorod facets are also realized. The dependence of wavelength on the accelerating voltage of the cluster ions and the dose are studied. Similar dependence of wavelength on accelerating voltage and dose are found for nanorods. Comparing with the flat ZnO surface, nanoripples on the ZnO nanorod faces at high irradiation doses demonstrate an ordering effect, and morphology of the ripples resembles that of more parallel steps rather than eolian ripples.

A Wafer Map Yield Prediction Based on Machine Learning for Productivity Enhancement

Manufacturing productivity in the semiconductor industry is a key factor in determining the competitiveness of manufacturers. In order to enhance productivity, evaluating the productivity of wafer maps prior to production and optimizing the productivity of wafer maps is one of the most effective solutions. The productivity of a wafer map is evaluated in advance by considering various factors affecting wafer productivity such as: gross dies, shot counts, lithography throughputs, mask field occupancy (MFO), prices, etc. Manufacturing process information is not determined at the initial wafer map design stage. Predicting the yield of new wafer maps before fabrication is a difficult challenge due to lack of process information. However, a yield prediction model is required to precisely evaluate the productivity of new wafer maps, because the yield is directly related to the productivity and the design of wafer map affects the yield. In this paper, we propose a novel yield prediction model based on deep learning algorithms. Our approach exploits spatial relationships among positions of dies on a wafer and die-level yield variations collected from a wafer test without process parameters. By modeling these spatial features, the accuracy of yield prediction significantly increased. Furthermore, experimental results showed that the proposed yield model and approach helps to design wafer maps with up to 8.59% higher productivity.

Modeling physical vapor deposition of energetic materials

Morphology and microstructure of organic explosive films formed using physical vapor deposition (PVD) processes strongly depends on local surface temperature during deposition. Currently, there is no accurate means of quantifying the local surface temperature during PVD processes in the deposition chambers. This work focuses on using a multiphysics computational fluid dynamics tool, STARCCM+, to simulate pentaerythritol tetranitrate (PETN) deposition. The PETN vapor and solid phase were simulated using the volume of fluid method and its deposition in the vacuum chamber on spinning silicon wafers was modeled. The model also included the spinning copper cooling block where the wafers are placed along with the chiller operating with forced convection refrigerant. Implicit time-dependent simulations in two- and three-dimensional were performed to derive insights in the governing physics for PETN thin film formation. PETN is deposited at the rate of 14 nm/s at 142.9 °C on a wafer with an initial temperature of 22 °C. The deposition of PETN on the wafers was calculated at an assumed heat transfer coefficient (HTC) of 400 W/m2 K. This HTC proved to be the most sensitive parameter in determining the local surface temperature during deposition. Previous experimental work found noticeable microstructural changes with 0.5 mm fused silica wafers in place of silicon during the PETN deposition. This work showed that fused silica slows initial wafer cool down and results in ∼10 °C difference for the surface temperature at 500 μm PETN film thickness. It was also found that the deposition surface temperature is insensitive to the cooling power of the copper block due to the copper block's very large heat capacity and thermal conductivity relative to the heat input from the PVD process. Future work should incorporate the addition of local stress during PETN deposition. Based on simulation results, it is also recommended to investigate the impact of wafer surface energy on the PETN microstructure and morphology formation.

Влияние режимов электрохимического травления на морфологию, структурные и оптические свойства пористого арсенида галлия

AbstractThe properties of porous GaAs samples produced by the electrochemical etching of single-crystal n -GaAs(100) wafers are studied by X-ray diffraction analysis, electron microscopy, and infrared and ultraviolet spectroscopy. It is possible to show that, by choosing the composition of the electrolyte and the conditions of etching, samples can be produced not only with different degrees of porosity and pore sizes (nanopores/micropores), but with another type of sample surface as well. The etching of n -GaAs(100) wafers under the conditions chosen in the study does not change the orientation of the porous layer with respect to the orientation of the single-crystal GaAs(100) substrate. At the same time, etching induces a decrease in the half-width of the diffraction peak compared to that for the initial wafer, a splitting of the phonon mode in the infrared spectra and a partial shift of the components in accordance with the parameters of anodic etching, and a change in the optical properties in the ultraviolet region.

Influence of the doping type and level on the morphology of porous Si formed by galvanic etching

The formation of porous silicon (por-Si) layers by the galvanic etching of single-crystal Si samples (doped with boron or phosphorus) in an HF/C2H5OH/H2O2 solution is investigated. The por-Si layers are analyzed by the capillary condensation of nitrogen and scanning electron microscopy (SEM). The dependences of the morphological characteristics of por-Si (pore diameter, specific surface area, pore volume, and thickness of the pore walls), which determine the por-Si combustion kinetics, on the dopant type and initial wafer resistivity are established.

Fabrication of nanocomposites based on silicon nanowires and study of their optical properties

AbstractThis article presents the results on a fabrication of silicon nanowires by a two‐step metal‐assisted chemical etching. Morphological and optical properties of the obtained silicon nanostructures depending on the type and resistivity of the initial silicon wafer have been studied. In addition, we have used the silicon nanowires as templates for zinc oxide and silver deposition. The resulting nanocomposites have been shown to demonstrate intensive photoluminescence and activity in the surface enhanced Raman scattering respectively. (© 2016 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Wet Processing for Post-epi & Pre-furnace Cleans in Silicon Carbide Power MOSFET Fabrication

Silicon carbide (SiC) power devices provide improved switching efficiency and are well-suited for high temperature, and medium to high voltage applications. As such, they are expected to spur growth for applications >1000V over the next decade as they enable significant reduction in emissions [1]. The chemically inert nature of SiC presents unique opportunities and challenges with regard to cleaning and surface preparation for fabrication of power metal-oxide-semiconductor field-effect transistors (MOSFETs). SiC processing often leverages learning from ultra-large-scale integration (ULSI) Si, but exposing where that experience can be directly transferred or must be modified is part of the charter for the SiC fabrication community. Here we present results for cleans post-epi test, also known as initial wafer clean (IWC), and prefurnace clean based on concentrated chemistries developed for Si, and discuss cost tradeoffs as the technology ramps from pilot to volume production. Although the diffusion of metals in single-crystal SiC is much slower than that found in silicon (Si) for similar temperatures, SiC thermal processing generally occurs at much higher temperatures and therefore metal contamination must be minimized to maintain process control and reliability. Iron, nickel, and other metallics are understood to degrade intrinsic lifetime of gate oxides, so are monitored for SiC processing at levels comparable to appropriate Si technology nodes. W-anode TXRF is an effective diagnostic tool used in controlling these contaminants, so is employed by measuring Si and SiC monitor wafers run alongside device lots at appropriate process steps. TXRF was performed at EAG in a Technos TREX model instrument. Additionally, 1200V SiC MOSFETs are fabricated on epitaxially grown N- layers and typically characterized with mercury (Hg) probe capacitance-voltage (MCV), leaving trace levels of Hg on the SiC wafer surface. In addition to the typical metal concerns, Hg must be removed before wafers proceed into the fabrication process flow. For this study, 100mm SiC wafers were Hg probed in a Semilab MCV-530 tester, utilizing a multi-measurement pattern of 44 points. Trace levels of Hg were analyzed with mapping-mode Mo-anode TXRF before and after a variety of cleans to provide a basis for comparison. Concentrated ULSI Si cleans (SC1, SPM, DHF, etc) with appropriate station segregation were shown to be an effective surface preparation approach for both the prefurnace clean and IWC evaluations. Iron mapped with W-anode TXRF is often measured below 1e10 atoms/cm2, representing control of Fe at or below levels identified by ITRS for Si nodes ~180nm [2], quite acceptable for the relatively thick gate oxides (~50nm SiO2) and critical feature sizes required in power semiconductor fabrication. For the IWC study, mapped Hg levels measured with Mo-anode TXRF on SiC were shown to be reduced from a typical average value of 2.5e14 atoms/cm2, and typical maximum value of 2.4e15 atoms/cm2 immediately after post-epi test, to levels below the 300-second detection limit of 7e10 atoms/cm2. In the extended paper we will discuss prefurnace cleans in the context of control charting for pilot volume manufacturing, and compare a variety of cleans at IWC; including dilute mixtures, to evaluate improvements in cost effectiveness through reduction of chemical consumption and environmental impact. Research was sponsored by the NY Power Electronics Manufacturing Consortium. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of NY Power Electronics Manufacturing Consortium or the state of New York. [1] E. Vivrey, “Wide Band Gap Power Electronics: A Path Toward CO2 Emission Decrease”, Semicon West TechXPOT, July 10th, 2014. [2] International Technology Roadmap for Semiconductors, 2000 Update, Front End Process, http://www.itrs.net

Investigations of nanodimensional Al2O3 films deposited by ion-plasma sputtering onto porous silicon

The purpose of this study is the deposition of nanodimensional Al2O3 films on the surface of nanoporous silicon and also fundamental investigations of the structural, optical, and morphological properties of these materials. Analyzing the results obtained here, it is possible to state that ultrathin nanostructured Al2O3 films can be obtained in the form of threads oriented in one direction and located at a distance of 300–500 nm from each other using ion-plasma sputtering on a layer of porous silicon. Such a mechanism of aluminum-oxide growth is conditioned by the crystallographic orientation of the initial single-crystalline silicon wafer used to fabricate the porous layer. The results of optical spectroscopy show that the Al2O3/por-Si/Si(111) heterophase structure perfectly transmits electromagnetic radiation in the range of 190–900 nm. The maximum in the dispersion of the refractive index obtained for the Al2O3 film grown on por-Si coincides with the optical-absorption edge for aluminum oxide and is located in the region of ~5.60 eV. This fact is confirmed by the results of calculations of the optical-absorption spectrum of the Al2O3/por-Si/Si(lll) heterophase structure. The Al2O3 films formed on the heterophase-structure surface in the form of nanodimensional structured threads can serve as channels of optical conduction and can be rather efficiently introduced into conventional technologies, which are of great importance in microelectronics and optoelectronics.

Effect of wettability on the agglomeration of silicon nanowire arrays fabricated by metal-assisted chemical etching.

The effect of wettability on the undesirable bundling of silicon nanowire (SiNW) arrays fabricated by metal-assisted chemical etching (MACE) method is investigated. This paper reports a simple and low-cost approach to achieve dense SiNW arrays with excellent lateral separation. A hydrophilic pretreatment on the initial wafer substrate prior to the etching procedure, followed by a hydrophobic post-treatment of the fabricated SiNWs, allows the fabrication of large and dense arrays of SiNWs with no agglomeration. These results are discussed within the framework of the detailed balance of forces acting on the nanowires.

Comparative study of NSB and UTB SOI MOSFETs characteristics by extraction of series resistance

The electrical characteristics of two kinds of n-type SOI-MOSFETs are analyzed and compared in order to build a consistent model. The first kind is an Ultra-Thin Body (UTB) device for which the channel thickness is equal to the initial SOI wafer thickness value (here 46nm). The second kind is what we refer to Nano-Scale Body (NSB) device for which the initial SOI channel is thinned down to 1.6nm using a recessed-gate process. The drain current values were found surprisingly different by three orders of magnitude. Such a huge contrast was not found coherent with the literature, reporting the decrease of the electron mobility with the channel thickness. We interpret our result by the probable influence of an extreme drain-to-source series resistance rather than by vanishing carrier mobility. The interpretation is sustained experimentally by the Rm–L and C–V methods. By integrating a gate-voltage dependence to the series resistance, the linear and saturation regions of the output characteristics of the NSB can be analytically derived from the UTB ones. This simple modeling approach may be useful to interpret anomalous electrical behavior of other nano-devices in which series resistance is of a great concern.

Influence of substrate microstructure on longitudinal correlation length of porous system of anodic alumina: Small-angle scattering study

Three series of anodic alumina membranes have been studied using the small-angle diffraction of neutrons and synchrotron radiation. The samples are obtained by the oxidation of aluminum wafers by sulfuric and oxalic acids at various anodization voltages and differences in the distance between the pores. Using experiments on small-angle diffraction, a linear dependence between the average grain size of an initial aluminum wafer and the average rectilinearity of pores of the synthesized membranes is established. We suggest that the observed correlation is caused by the influence of the crystallographic orientation of grains of an initial aluminum wafer on the growth of a porous oxide film.

The use of the grey-Taguchi method for the optimization of a silicon nanowires array synthesized using electroless Ag-assisted etching

A simple and convenient method for the production of silicon nanowires (SiNWs) that are single crystalline, well aligned and which have large area is direct synthesis onto p-type (100) silicon (Si) wafers, using electroless Ag-assisted etching, in which Ag is both the oxidant and the catalyst. This study proposes a method for the optimization of the etching process parameters for SiNW arrays with multiple performance characteristics, using grey-Taguchi anal- ysis. The effect of the etching process parameters (etching time, solution (AgNO3/HF) temperature, silver nitrate (AgNO3) concentration and hydrogen fluoride (HF) concentration) on the length, diameter, structure, and morphology of the SiNW arrays were studied. In the confirmation runs, grey relational analysis shows that the length of the SiNW arrays is increased from 15.80 to 23.07 lm, and the diameter is decreased from 76.77 to 66.65 nm. Further, the linear relationship for the SiNW arrays can be adjusted by increasing the etching time (from 15 to 45 min) and the solution temperature (from 25 to 75 � C). The axial orientation of the SiNWs is determined to be along the (001) direction, which is the same as that of the initial Si wafer. The large area SiNW arrays have potential applications in interconnect, bio-technology and opto- electronic devices.

The effect of differently sized Ag catalysts on the fabrication of a silicon nanowire array using Ag-assisted electroless etching

A simple and low cost method to generate single-crystalline, well-aligned silicon nanowires (SiNWs) of large area, using Ag-assisted electroless etching, is presented and the effect of differently sized Ag catalysts on the fabrication of SiNWs arrays is investigated. The experimental results show that the size of the Ag catalysts can be controlled by adjusting the pre-deposition time in the AgNO3/HF solution. The optimum pre-deposition time for the fabrication of a SiNWs array is 3 min (about 162.04 ± 38.53 nm Ag catalyst size). Ag catalysts with smaller sizes were formed in a shorter pre-deposition time (0.5 min), which induced the formation of silicon holes. In contrast, a large amount of Ag dendrites were formed on the silicon substrate, after a longer pre-deposition time (4 min). The existence of these Ag dendrites is disadvantageous to the fabrication of SiNWs. Therefore, a proper pre-deposition time for the Ag catalyst is beneficial to the formation of SiNWs.SiNWs were synthesized in the H2O2/HF solution system for different periods of time, using Ag-assisted electroless etching (pre-deposition of the Ag catalyst for 3 min). The length of the SiNWs increases linearly with immersion time. From TEM, SAED and HRTEM analysis, the axial orientation of the SiNWs is identified to be along the [001] direction, which is the same as that of the initial Si wafer. The use of HF may induce Si–Hx bonds onto the SiNW array surface. Overall, the Ag-assisted electroless etching technique has advantages, such as low temperature, operation without the need for high energy and the lack of a need for catalysts or dopants.