Inductively Coupled Plasma Etching Process Research Articles

(Invited) In-Situ MOCVD Etching of GaN Using XeF2 for Selective-Area-Epitaxial-Regrowth of p-Type GaN for High Voltage PN Diodes

PN diodes with multi-kilovolt breakdown voltages have been demonstrated to great than 6 kV in GaN, validating the device potential predicted by the intrinsic material properties of III-nitride semiconductors. However, power control circuits also require switching transistors such as junction field effect transistors (JFETs) and practical diodes such as merged PIN Schottky (MPS) diodes. Such devices usually employ selective areas of p-type semiconductor surrounded by n-type material and require the formation of PN junctions with low reverse leakage current. Selective-area p-type doping in Si and SiC based power devices is typically achieved using implantation and thermal annealing to form the p-type areas. Ion implantation of Mg in GaN has demonstrated p-type conductivity, but this process requires specialized equipment for the high-pressure and high-temperature activation of Mg dopants. We have investigated selective-area-regrowth (SArG) to epitaxially grow p-type GaN as an alternative to dopant implantation. Successful PN diode formation by SArG requires a process to remove residual crystalline damage resulting from the ex-situ inductively coupled plasma (ICP) etch typically used to form the p-well, as well as a method to remove the elevated level of Si found at the regrowth interface of a surface that had been exposed to air. For the case of SArG of p-GaN on air-exposed, blanket ICP etched n-type GaN, we present the novel use of a fluorine-based precursor (XeF2) for in-situ etching of GaN in the MOCVD chamber. Unlike chlorine (TBCl and CCl4) and bromine (CBr4) -based precursors we have studied; we obtained a smooth surface following in-situ fluorine etching of air-exposed GaN. Schottky barrier diodes (SBDs) formed by shadow mask evaporation on in-situ fluorine etched n-GaN that had been previously ICP etched showed reverse leakage currents to -40 V that are equal to those of SBDs formed on as-grown n-GaN layers. The in-situ fluorine/ICP etched Schottky diodes had reverse leakage currents more than 3 orders of magnitude lower than those formed on n-GaN layers that had only experienced ICP etching. This suggests that the in-situ fluorine etch was effective at removing the residual damage from the ICP etch process. Furthermore, we discuss the use of in-situ fluorine etching to reduce the concentration of Si at the regrowth interface required to form PN junctions with low reverse leakage current. This work was supported in part by the Advanced Research Projects Agency – Energy (ARPA-E), U.S. Department of Energy under the PNDIODES program directed by Dr. Isik Kizilyalli, and in part by the US Department of Energy (DOE) Vehicle Technologies Office (VTO) under the Electric Drive Train Consortium. Sandia National Laboratories is a multimission laboratory managed and operated by National Technology and Engineering Solutions of Sandia, LLC., a wholly owned subsidiary of Honeywell International, Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA-0003525. The views expressed in the presentation do not necessarily represent the views of the U.S. Department of Energy or the United States Government.

High-Efficiency and Reliable Value Geometric Standard: Integrated Periodic Structure Reference Materials.

Integrated periodic structure reference materials are crucial for calibration in optical instruments and micro-computed tomography (micro-CT), yet they face limitations concerning a restricted measurement range, a single pattern type, and a single calibration parameter. In this study, we address these challenges by developing integrated periodic structure reference materials with an expanded measurement range, diverse pattern types, and multiple calibration parameters through a combination of photolithography and inductively coupled plasma (ICP) etching process. These reference materials facilitate high-efficiency and multi-value calibration, finding applications in the calibration of optical instruments and micro-CT systems. The simulations were conducted using MATLAB (R2022b) to examine the structure-morphology changes during the single-step ICP etching process. The variation rules governing line widths, periods, etching depths, and side wall verticality in integrated periodic structure reference materials were thoroughly evaluated. Linewidths were accurately extracted utilizing an advanced image processing algorithm, while average period values were determined through the precise Fast Fourier Transform method. The experimental results demonstrate that the relative errors of line widths do not exceed 17.5%, and the relative errors of periods do not exceed 1.5%. Furthermore, precise control of the etching depth was achieved, ranging from 30 to 60 μm for grids with line widths 2-20 μm. The side wall verticality exhibited remarkable consistency with an angle of 90° ± 0.8°, and its relative error was found to be less than 0.9%.

Synchrotron X-Ray Topography Characterization of Power Electronic GaN Materials

Synchrotron X-ray topography techniques are used to characterize the microstructures in gallium nitride materials being developed for selective area doping for power electronic applications. Bulk substrates grown by different methods, epitaxial layers that are subject to ion implantation, annealing, etching and regrowth are characterized by X-ray topography in grazing incidence geometry and X-ray rocking curve topography. Strain and tilt maps of ion implanted epitaxial layers and etched and regrown wafers are generated. From the X-ray topographs, it is concluded that ammonothermal grown substrates show the highest quality among other types and most suitable for high-end electronic applications. It is also revealed that epitaxial growth, ion implantation and the annealing process do not change the dislocation distribution, but ion implantation introduces damage, strain and lattice bending effect, which are removed after annealing. Inductively coupled plasma (ICP) etching gives rise to strain variations in the wafer, while using tertiary butyl chloride (TBCl) to etch the wafer does not affect the strain distribution and can remove some damage from a preceding ICP etching process.

Performance-enhanced NiO/β-Ga2O3 heterojunction diodes fabricated on an etched β-Ga2O3 surface

In this study, performance-enhanced NiO/β-Ga2O3 heterojunction diodes (HJDs) were realized on an etched β-Ga2O3 surface through applying a surface preparation process involving a BCl3/Cl2-based inductively coupled plasma (ICP) etch followed by a hot tetramethylammonium hydroxide (TMAH) treatment. Atomic force microscopy scan and X-ray photoelectron spectroscopy analysis revealed that the ICP etch process created a rough β-Ga2O3 surface with high density small peaks associated with Boron-related etch by-product, which resulted in a dramatic decrease of the HJDs’ breakdown voltage from 1.43 kV to 0.92 kV in average. On the other hand, the TMAH treatment effectively removed the etch-induced damages and contaminations from the β-Ga2O3 surface, therefore obviating its surface instability issue. Consequently, on the processed β-Ga2O3 surface high-quality NiO/β-Ga2O3 heterojunctions with a fully recovered breakdown voltage and an improved turn-on property were successfully formed.

Strain mapping of GaN substrates and epitaxial layers used for power electronic devices by synchrotron X-ray rocking curve topography

Strain and tilt maps of gallium nitride (GaN) materials including substrates, ion-implanted and annealed epilayers, and etched and regrown epilayers by different etching methods have been generated from synchrotron X-ray rocking curve topography. The strain map of the ammonothermal grown GaN substrate shows uniform low strain values, while that of the patterned hydride vapor phase epitaxy (HVPE) grown substrate shows high strain centers as well as uniformly distributed low strain between them. Strain variations within the as-implanted wafers and the annealed wafers are similar, while the tilt levels are significantly decreased for the annealed wafers. The inductively coupled plasma (ICP) etched and then regrown sample gives rise to the significant variations in strain values within the imaged region, while using tertiary butyl chloride (TBCl) to etch the sample does not affect the strain distribution compared to the continuously grown sample without etching and can remove some damage from a preceding ICP etching process.

Selective and Anisotropic Dry Etching of Ge over Si

Inductively coupled plasma (ICP) etching of Ge with high selectivity over Si and anisotropic etched profiles using CF4, HBr, SF6, and Cl2 reactive gases has been studied. Because pressure and biased power should be the most important parameters to drive selectivity and etch profile, they were varied from 4 to 50 mTorr and from 0 to 50 W, respectively, so as to investigate their influence on process. Total gas flow (100 sccm) and source power (350 W) were initially held constant. Selectivity greater than 100:1 of Ge over Si was achieved using 100 % Cl2 etch gas at 50 mTorr and zero bias power but the profile of the etched features was isotropic. With the addition of N2 to the feed gas (Cl2) the profile became more anisotropic. A three steps ICP etch process was developed with a final Ge/Si etch selectivity of 5:1 and anisotropic profiles.

Fabrication and characterisation of nanostructure step height sample

Step height calibration sample is a high-precision height (depth) standard transfer material for correcting the Z-axis characteristic parameter values of surface structure measuring instruments such as AFM, SEM and white light interferometer. It has the characteristics of accurate value transfer and small size structure. According to the traceability value of VLSI step height standard, step structure calibration samples with nominal height of 8 nm, 18 nm and 44 nm were fabricated by inductively coupled plasma (ICP) etching and lithography, and the height and surface roughness of the step structures are evaluated by AFM. The experimental results show that the standard deviation of the step height calculated by the algorithm is 0.820 nm, 0.770 nm, 1.786 nm, respectively. The upper surface roughness of the step structure was the surface roughness of the SiO2 film. The roughness of the bottom surface was related to the surface quality of SiO2 film, ICP etching process parameters.

Fabrication and characterisation of nanostructure step height sample

Step height calibration sample is a high-precision height (depth) standard transfer material for correcting the Z-axis characteristic parameter values of surface structure measuring instruments such as AFM, SEM and white light interferometer. It has the characteristics of accurate value transfer and small size structure. According to the traceability value of VLSI step height standard, step structure calibration samples with nominal height of 8 nm, 18 nm and 44 nm were fabricated by inductively coupled plasma (ICP) etching and lithography, and the height and surface roughness of the step structures are evaluated by AFM. The experimental results show that the standard deviation of the step height calculated by the algorithm is 0.820 nm, 0.770 nm, 1.786 nm, respectively. The upper surface roughness of the step structure was the surface roughness of the SiO2 film. The roughness of the bottom surface was related to the surface quality of SiO2 film, ICP etching process parameters.

Investigation of Grinding and Lapping Surface Damage Evolution of Fused Silica by Inductively Coupled Plasma Etching

Surface damage has great influence on optical properties, especially the laser-induced damage threshold of optics, and it has become a difficult and basic issue to find suitable methods to efficiently remove the surface damage for improving the surface quality. In this paper, the characteristic evolution of brittle scratch and ground/lapped surface damage during inductively coupled plasma etching (ICPE) process are experimentally investigated on fused silica. Results of damage removal tests show ICPE can efficiently remove brittle scratch and eliminate the lateral and medial cracks. The PV (peak to valley) and RMS (root mean square) values of surface roughness increase with the exposure of lateral and medial cracks, and then gradually decreases with further etching. Finally, the ground and lapped fused silica surfaces with a size of 300 × 300 × 20 mm3 are efficiently processed by ICPE. The power spectral density analysis further demonstrates that the damage can be efficiently removed by ICPE. This study reveals the damage evolution during ICPE process and also provides technical guidance for optimizing the efficient damage removal process to rapidly improve surface quality, precision and fabrication efficiency of fused silica optics.

Study of wet and dry etching processes for antimonide-based photonic ICs

We report on the dry etch process parameters and the associated etch rates for target and mask materials, as well as surface roughness in an inductively coupled plasma (ICP) for the (AlGaIn)(AsSb)-compounds. The essential chemistry is based on Cl2 with the addition of N2 for sidewall passivation. The optimized ICP etch process is capable of producing high aspect ratio structures with smooth sidewalls. In situ reflectance monitoring with a 670-nm-wavelength laser was used to enable stop-etching at a material interface with high accuracy. Given the additional need for highly selective wet chemical etchants in the fabrication of GaSb based electronic and optoelectronic devices, an extensive investigation was also performed to examine numerous etch solutions. These etchants were listed with etch rates, selectivities, and surface roughness in order to validate their suitability for intended applications. Despite the frequent use of GaSb or InAsSb materials for etch stop layers against each other, devices where their unique type-II broken bandgap alignment is undesired require new selective wet etchants between GaSb and AlGaAsSb with good selectivity. All of the wet chemical and dry etching processes described here were optimized using an n-type GaSb substrate.

Circular Double‐Patterning Lithography Using a Block Copolymer Template and Atomic Layer Deposition

AbstractA novel and feasible methodology is developed to fabricate well‐ordered, freestanding 1D n‐ZnO/p‐Si nanotube (NT) and nanorod (NR) arrays via double‐patterning technology with block copolymer (BCP) self‐assembly, atomic layer deposition (ALD), and inductively coupled plasma (ICP) dry etching. To obtain the well‐ordered NT pattern, a self‐assembled, Si‐containing poly(styrene‐block‐4‐(tert‐butyldimethylsilyl)oxystyrene) BCP on an SU‐8/p‐Si wafer is employed as a template. After n‐ZnO deposition on the self‐assembled BCP template by ALD, an ICP etching process is performed to produce well‐defined, independent n‐ZnO/p‐Si NT arrays. The insights into the nanoarrays presented here are directly applicable to the fabrication of n‐ZnO/p‐Si NT/NR patterns and Si NT/NR patterns by precisely controlling the ALD cycles and ICP etching time. The electrical properties of a single n‐ZnO/p‐Si NT are measured by conductive atomic force microscopy, and the results show the typical rectifying behavior of a nanodiode with superior electrical properties. This simple and useful approach provides a very convenient route for fabricating high‐density nanodiode patterns. Additionally, the possibility of various applications is confirmed by simple analyses, including examinations of contact angle and reflectance. Furthermore, the wettability and antireflection properties can be controlled by changing the nanoarray morphology.

Light Extraction Enhancement of GaN-Based Light-Emitting Diodes With Textured Sidewalls and ICP-Transferred Nanohemispherical Backside Reflector

Textured-sidewall GaN-based light-emitting diodes (LEDs) with convex and 45° patterns and an inductively coupled plasma (ICP)-transferred nanohemispherical backside reflector, formed using an ICP etching process, are fabricated and studied. For devices with textured sidewalls, the scattering probability of photons at the GaN/air interface is increased and the light extraction efficiency is enhanced since photons are allowed to find escape cones in the horizontal direction. With the ICP-transferred nanohemispherical backside reflector, reflected photons can be easily scattered and redirected in arbitrary directions for light extraction and thus have more opportunities to escape the devices. The LED with 45° sidewalls and a backside reflector exhibited the significant improvements of 55.8%, 49.3%, 47.2%, and 55.4% in light output power, luminous flux, external quantum efficiency, and wall-plug efficiency, respectively, compared to those of a conventional LED without these specific designs (Device A). In addition, the higher intensities in a light emission mapping image and improved far-field patterns are obtained for the studied device. The enhanced optical performance is mainly attributed to the increased light extraction in all directions due to a significant reduction in the total internal reflection by the textured sidewalls and a backside reflector. Therefore, textured-sidewall structures and an ICP-transferred nanohemispherical backside reflector are promising for high-power GaN-based LED applications.

Iron Oxide Plasmonic Nanostructures for Energy Harvesting

Recently Iron oxide (Fe2O3) nano structure has drawn renewed interest in electrocatalysis process for carbon-carbon (C-C) bond breaking in ethanol. We design and fabricate Fe2O3 plasmonic nanostructures for C-C bond-breaking processes in high density fuels. After patterning Fe2O3 film, we use inductively coupled plasma (ICP) etching equipped with an Argon (Ar) plasma to create the film with nanometer scale dimensions. We used both photoresist mask and hard mask like silicon dioxide film for selecting etching. Fe2O3 film etching process is optimized by using different parameters like ICP power, base electrode power, pressure, temperature, and Ar gas flow etc. We used elliposmetric method as well as UV/Vis reflectance spectroscopy to determine the resonance wavelength of the plasmonic nanostructures suitable for electrocatalysis experiment. Iron oxide (Fe2O3) has recently received much attention among the various semiconductor photo-electrode materials due to its favorable optical band gap (~2.2 eV), excellent chemical stability in high pH media, natural abundance, and low cost [1,2]. However, Fe2O3 exhibits a relatively poor absorptivity of photons near its band-edge due to an indirect band gap, poor electronic conductivity (PEC), and picosecond recombination of excited states, thus leading to a photo-generated hole diffusion length of ~2-4 nm [3]. These non-ideal optoelectronic properties hinder the transport of photo-generated carries and increase the recombination rate, which results in a lowering of the PEC efficiency compared to theoretically predicted values. Controlling the nanostructure of Fe2O3 may provide an effective technology for overcoming the aforementioned problems of Fe2O3 due to the geometry and mechanism-dependent semiconductor structure [4]. The shape of the Fe2O3structures with cone, cylinder, sphere, etc. features alters the electric field dependent absorption and transport processes. We use electron beam evaporation system to deposit thin Fe2o3 film (100-500 nm) on silicon substrate with thin layer of gold (Au) film. We then use an inductively coupled plasma (ICP) etching process to define Fe2O3 nano-structured pillars with various diameters (50nm -5 µm) and heights. We use either e-beam lithography or optical lithography process to define the plasmonic nanostructures. ICP etching process with Ar plasma is used with varying power, pressure and substrate temperature etc. to optimize the Fe2O3 etching process. Scanning electron (SEM) and atomic force (AFM) microscopy tools are used to determine the surface morphology of the nanostructures, whereas ellipsometer and UV-Vis spectrometer elucidate the optical properties. Galvanometeric current-voltage measurement is performed to determine the optimum nano plasmonic structure for carbon-carbon (C-C) bond breaking process in high energy density chemicals. In figure 1, we have shown the etch rate of Fe2O3 film with different substrate temperatures and Ar pressure in the reaction chamber. We find that in order to achieve a smooth surface and reasonable etch rate, the substrate temperature should be between 15-18 ᵒC and the ICP power between 800-1000 W. Detailed deposition, annealing, etching and characterization results of Fe2O3 nano plasmonic structures will be presented in a full paper.

Chlorine-based inductively coupled plasma etching of GaAs wafer using tripodal paraffinic triptycene as an etching resist mask

We report the etching properties of tripodal paraffinic triptycene (TripC12) used as a thermal nanoimprint lithography (TNIL) resist mask in Cl2 plasma etching. Using thermally nanoimprinted TripC12 films, we achieved microfabrication of a GaAs substrate by Cl2-based inductively coupled plasma (ICP) etching. Attenuated total reflection Fourier transform infrared (ATR-FTIR) spectroscopy confirmed that the chemical structure of TripC12 remains intact after the ICP etching process using Cl2. We believe that TNIL using TripC12 films is useful for fabricating optical/electrical devices and micro-electro-mechanical systems (MEMSs).

Inductively coupled plasma etching of GaAs in Cl2/Ar, Cl2/Ar/O2 chemistries with photoresist mask

In this paper, we proposed our recent works on inductively coupled plasma (ICP) etching of GaAs in Cl2/Ar and Cl2/Ar/O2 chemistry for pattern structure transferring and analyzed their etching mechanism. It is proposed that the etching rate reduction due to introduction of extra Cl2 and additional O2 in the plasma chemistry is resulted from their influences on all ICP etching process aspects. Moreover, with results presented here, it shows that by introducing O2 into plasma chemistry, the etched GaAs surface roughness will be optimized and the etching ratio of photoresist to GaAs will be tuned.

Optimized ICP etching process for fabrication of oblique GaN sidewall and its application in LED

Inductively coupled plasma (ICP) etching of GaN is systemically investigated by changing ICP power/RF bias power, operating pressure, and Cl2/BCl3 gas mixing ratio. The hexagonal etch pits related to screw dislocation existing along GaN epitaxial layer were observed on the etched GaN surface after ICP etching. The intensity of band-edge emission is significantly reduced from the etched n-GaN surface, which reveals that plasma-induced damage are generated after ICP etching. The oblique sidewall is transferred into GaN using a combination of Cl2/BCl3 plasma chemistry and hard mask SiO2. By adjusting ICP etching process parameters, oblique sidewalls with various oblique angles can be formed, allowing for conformal metal lines coverage across the mesa structures, which can play an important role in the interconnection of multiple microchips for light emitting diodes (LEDs) fabrication.

Influence of etching process parameters on the antireflection property of Si SWSs by thermally dewetted Ag and Ag/SiO2 nanopatterns

AbstractThe etching parameter dependent antireflection characteristics of disordered Si subwavelength structures (SWSs) by inductively coupled plasma (ICP) etching in a mixture gas of SiCl4/Ar using thermally dewetted Ag and Ag/SiO2 nanopatterns are investigated. The average size and period of Si SWSs are closely correlated with thermal dewetting conditions. For desirable Ag nanoparticle patterns, the profile of Si SWSs is optimized by changing the ICP etching process parameters to obtain the lowest reflectance spectrum. The most tapered SWS with the highest height leads to a relatively low reflectance. The Ag nanopatterns result in more tapered and rough surface SWSs compared to the Ag/SiO2 nanopatterns, indicating a slightly reduced reflectance. The Si SWS etched using Ag nanopatterns by SiCl4/Ar of 5 sccm/10 sccm at 50 W RF power, 200 W ICP power, and 10 mTorr process pressure exhibits a very low total reflectance of <∼2.4% in the wavelength range of 400–1000 nm, maintaining a specular reflectance of <16% at 350–1100 nm up to the incident angle of θi = 50°.

InGaN–GaN Light Emitting Diode Performance Improved by Roughening Indium Tin Oxide Window Layer via Natural Lithography

A simple natural lithography process was employed to roughen the indium tin oxide (ITO) window layer to improve the performance of an InGaN-GaN light emitting diode (LED). In this process, a photoresist layer was used as a mask for inductively coupled plasma (ICP) dry etching. The photoresist was distorted during the ICP etching process. As the etching time increased, the distorted shapes of the photoresist were transferred to the ITO surface. The roughness of the ITO surface can be easily controlled by the thickness of the photoresist mask. Moreover, the performance of LEDs increased with the thickness of the photoresist mask.

Micromachining Processing of 3D Micro Tensile Specimens Based on Inductively Coupled Plasma Etching

Based on the mechanism of inductively coupled plasma (ICP) etching,the micromachining processing of 3D micro tensile beams is researched in the light of the structure characteristics of the thermal silicon dioxide micro-tensile beams and with the purpose of solving the main problems in the processing. The influences of ICP etching process parameters on etching quality,including micro loading effect and aspect ratio effect in existence,are presented. The micromachining processing of the beams is introduced in detail. The pivotal procedure is double-masks-twice-ICP etching to form stair-opening structures and to obtain the free-standing thermal silicon dioxide beams on the surface of silicon. Using the high selectivity of single crystal silicon in ICP etching,the processing method is applicable in the fabrication of micro tensile beams with various films.

Fabrication of two-dimensional photonic crystal patterns on GaN-based light-emitting diodes using thermally curable monomer-based nanoimprint lithography

The fabrication process of photonic crystals in a p-GaN layer was established to improve the light extraction efficiency of light-emitting diodes (LEDs) by using nanoimprint lithography and inductively coupled plasma (ICP) etching process. Due to low etch selectivity of imprinted pattern, Cr mask patterns were lifted-off from the p-GaN surface and ICP etch process was followed using SiCl4-based plasma. As a result, two-dimensional pillar array patterns were uniformly fabricated on the p-GaN layer and the photoluminescence intensity of the photonic crystal patterned LED was increased by 2.6 fold compared to that of the same LED sample without photonic crystal patterns.