Inductive Coupling Technology Research Articles

A 96-MB 3D-Stacked SRAM Using Inductive Coupling With 0.4-V Transmitter, Termination Scheme and 12:1 SerDes in 40-nm CMOS

A 28.8-GB/s 96-MB 3D-stacked SRAM is presented. A total of eight SRAM dies, designed in a 40-nm CMOS process, are vertically stacked and connected using an inductive coupling wireless link with a low-voltage NMOS push-pull transmitter that reduces the power of the link by 35% with a 0.4-V power supply. The SRAM utilizes an inverted bit insertion scheme that compensates for the degradation of the first transmitted bit, a coil termination scheme that aims to eliminate the ringing of 3D inductive coupling bus, and a 12:1 SerDes that minimizes power consumption and area overhead in inductive coupling channels. Low-power, large-capacity, 3-cycle latency 3D-stacked SRAM for a DNN accelerator is achieved with the combination of these techniques to serve as a replacement of 3D-stacked DRAM. The performance of the proposed 3D-SRAM is compared with HBM DRAM and achieves more than 50% lower energy consumption. The scaling scenario of the SRAM module is discussed in light of the scaling of the inductive coupling technology and logic process.

QUEST: Multi-Purpose Log-Quantized DNN Inference Engine Stacked on 96-MB 3-D SRAM Using Inductive Coupling Technology in 40-nm CMOS

QUEST is a programmable multiple instruction, multiple data (MIMD) parallel accelerator for general-purpose state-of-the-art deep neural networks (DNNs). It features die-to-die stacking with three-cycle latency, 28.8 GB/s, 96 MB, and eight SRAMs using an inductive coupling technology called the ThruChip interface (TCI). By stacking the SRAMs instead of DRAMs, lower memory access latency and simpler hardware are expected. This facilitates in balancing the memory capacity, latency, and bandwidth, all of which are in demand by cutting-edge DNNs at a high level. QUEST also introduces log-quantized programmable bit-precision processing for achieving faster (larger) DNN computation (size) in a 3-D module. It can sustain higher recognition accuracy at a lower bitwidth region compared to linear quantization. The prototype QUEST chip is integrated in the 40-nm CMOS technology, and it achieves 7.49 tera operations per second (TOPS) peak performance in binary precision, and 1.96 TOPS in 4-bit precision at 300-MHz clock.

Systematic analysis and experiment of inductive coupling and induced voltage for inductively coupled wireless implantable neurostimulator application

The main strategy for wireless power transfer to implantable devices is to use inductive coupling technology. The induced voltage of implanted devices highly depends on factors such as mutual inductance between the external transmitter coil and the receiver coil, quality factor of the receiver circuit and operation frequency. In this paper, the mutual inductance under a variety of geometries of external coil and under the condition of different vertical distances, lateral displacements and angular misalignments between two coils were theoretically calculated and simulated. To ascertain the condition of maximum power transmission for certain coils’ position requirements, an LC tank (2.7 mm × 2 mm) consisting of a microfabricated gold inductor coil and a small surface mounted capacitor was designed and fabricated as the telemetric part of a neurostimulator. The induced voltage of the LC tank was measured in both air and artificial tissue media under different sizes of power coil and operation frequencies. As a result, the optimum size of a transmitter coil is selected to be of 4 mm inner radius with six turns of coil, while the whole coupling system operates at 94 MHz resonant frequency within 5–11 mm vertical distance, 0–4 mm lateral and 0°–50° angular misalignment between two coils. With the change of the above coils’ positions, the measured induced voltage drops within 30%, satisfying the surgical requirement for neurostimulator implantation.