Increase In Density Of Surface States Research Articles

High-output ∼3 μ m MIR pulsed laser enabled by surface state regulation in PtTe2 optical switch

Mid-infrared (MIR) pulsed lasers operating in the ∼3 μm region play a crucial role in various applications, including molecular spectroscopy, ultrafast molecular imaging, and laser-assisted surgery. Despite recent advancements in MIR gain platforms, a notable technological challenge remains in the absence of an effective optical Q-switch. Here, a remarkable optical Q-switch in the 3 μm region based on a Dirac semimetal PtTe2 saturable absorber is realized. By modulating the surface state of PtTe2, the pulsed laser exhibited an increase in average power, escalating from 521 to 588 mW, accompanied by a significant decrease in pulse width from 368 to 187 ns. Nondegenerate pump–probe measurements showed that the recombination rate of the photocarrier in thinner PtTe2 nanoplates was effectively accelerated, primarily attributed to the substantial increase in surface state density, leading to better saturable absorption performance. As the thickness of the PtTe2 nanoplates decreases, the nonsaturable loss decreases from 12% to 3%, while the modulation depth increases from 6% to 12%. The enhanced ultrafast nonlinear absorption enables flexible modulation of saturation absorption parameters, which endows high-performance MIR pulsed laser generation.

Direct charge carrier injection into Ga2O3 thin films using an In2O3 cathode buffer layer: their optical, electrical and surface state properties

Conductive Ga2O3 thin films with an In2O3 buffer layer have been prepared on c-plane sapphire substrates using a laser molecular beam epitaxy technique. The effects of the In2O3 buffer layer on the structure and optical, electrical and surface state properties of the Ga2O3 films have been studied. The change in conductivity of the thin films is attributed to different thicknesses of the In2O3 buffer layer, which determine the concentration of charge carriers injected into the upper Ga2O3 layer from the interface of the bilayer thin films. In addition, the increase in flat band voltage shift and capacitance values as the In2O3 buffer layer thickens are attributed to the increase in surface state density, which also contributes to the rapid shrinkage of the optical band gap of the Ga2O3. With transparency to visible light, high n-type conduction and the ability to tune the optical band gap and surface state density, we propose that Ga2O3/In2O3 bilayer thin film is an ideal n-type semiconductor for fabrication of transparent power devices, solar cell electrodes and gas sensors.

Photoelectric study of the Ni- and Ni-TeO2-electrodeposited n-type CdTe interfaces

The barrier heights of the electrodeposited n-type CdTe thin-film metal semiconductor (MS) and metal-thin insulating layer-semiconductor (MIS) devices have been measured by internal photoemission. The data for both MS and MIS devices can be fit with the square root of the photocurrent per absorbed photon dependence consistent with the Fowler theory. The barrier height of Ni-CdTe is 0.75 eV at room temperature, and its temperature dependence is about the same as that of the CdTe band gap. This suggests that the barrier height is pinned with respect to the CdTe valence band edge. Oxidation in air at 300 °C for an hour produces a layer of about 25 Å or TeO2 on the CdTe surface. Thicker oxide can be grown for longer oxidation time. Negative oxide charges are found in some devices. At room temperature, the barrier height of Ni-TeO2-CdTe is 0.92 eV. As temperature is decreased, the barrier height increases and its rate of change with temperature is less than that of the CdTe band gap. Samples stored in room atmosphere show aging effects, one of which is the increase in surface-state density. The dips in the curve of the spectral dependence of the relative photon-induced current are caused by electrons which drift to the metal after being photoexcited from occupied surface states below the Fermi level. These dips correspond to peaks in the energy distribution of the surface state density. At zero bias and 170 °K, four peaks at 1.02, 1.06, 1.18, and 1.26 eV are observed for the MIS devices. For the MS devices zero biased at room temperature, four peaks at 0.85, 0.94, 1.02, and 1.05 eV are observed. The magnitudes of the dips at 0.85, 0.94, 1.18, and 1.26 eV vary with bulk-defect density and these levels shift towards higher energy as temperature is decreased. On the other hand, the levels at 1.02 and 1.05 eV for the MS devices and 1.02 and 1.06 eV for the MIS devices are independent of temperature and bulk defect density.

Surface damage caused by electron-beam metallization of high open-circuit voltage solar cells

Metallization of high open-circuit voltage metal-insulator n-type-p-type(MINP)solar cells using an electron-beam deposition apparatus has been observed to cause degradation of device performance. Investigations using metal-insulator-semiconductor (MIS) diodes as test devices showed that the damage is consistent with a massive increase in surface-state density, and may be due to both radiation and the impact of charged particles. The damage can be eliminated by resistive evaporation of 100 nm of metal prior to use of the electron beam. It is likely that use of an electron beam to deposit grid lines and antireflection coatings on any high open-circuit voltage solar cell will lead to irreversible degradation in performance.

Radiation Effects Introduced by X-Ray Lithography in MOS Devices

The effects of low energy ionizing irradiation on MOS structures, with doses typical of those encountered in x-ray lithography, were studied in capacitors and transistors. The capacitor studies indicated the irradiations induced a slow trapping instability and an increase in surface state density. This surface state density increase was partially annealed at 450C in N2 after 1/2 hour. Transistor threshold shifts were largely annealed away under these conditions. However, a shift of 250 mV was observed in 1000 Å oxides which was not annealed away. In the 250 Å case, 50 mV remained after anneal. Even in the thinnest oxides studied (250 Å oxides) increases in subthreshold swing as large as 35% were encountered. This degradation was only partially annealed away under the conditions listed above. No channel length dependence to the effect was uncovered (down to 1 μm channel length).

Retention and endurance characteristics of HCl-annealed and unannealed MNOS capacitors

MNOS capacitors (metal-nitrite-oxide-semiconductor) have been used to study the effects of memory oxide growth and post-oxidation annealing conditions on retention and endurance of MNOS devices. Results of this study indicate that write/erase cycling causes a decrease in memory window size after 10 5 cycles, a shift of the memory window center toward more positive values of threshold voltage, and an increase in surface state density for cycling above 10 6 cycles. The retention data presented indicates that the memory window decay rate for ±25 V writing pulses is only a function of the initial window size. The collapse of the memory window to zero volts is predicted to occur after 10 16 sec for native oxide devices and after 10 18 sec for thermal oxide devices. HCl annealing of the memory oxide does not have a significant effect on either endurance or retention.