Increase In Output Conductance Research Articles

Self-Heating Effects In Polysilicon Source Gated Transistors.

Source-gated transistors (SGTs) are thin-film devices which rely on a potential barrier at the source to achieve high gain, tolerance to fabrication variability, and low series voltage drop, relevant to a multitude of energy-efficient, large-area, cost effective applications. The current through the reverse-biased source barrier has a potentially high positive temperature coefficient, which may lead to undesirable thermal runaway effects and even device failure through self-heating. Using numerical simulations we show that, even in highly thermally-confined scenarios and at high current levels, self-heating is insufficient to compromise device integrity. Performance is minimally affected through a modest increase in output conductance, which may limit the maximum attainable gain. Measurements on polysilicon devices confirm the simulated results, with even smaller penalties in performance, largely due to improved heat dissipation through metal contacts. We conclude that SGTs can be reliably used for high gain, power efficient analog and digital circuits without significant performance impact due to self-heating. This further demonstrates the robustness of SGTs.

Numerical analysis of surface-state effects on kink phenomena of GaAs MESFETs

Effects of surface states on the (or an abnormal increase in output conductance with the drain voltage) in GaAs MESFETs are studied by two-dimensional (2-D) simulations. It is shown that the kink could arise due to a space-charge effect originated from impact ionization of holes and the following hole trapping by the surface states. The onset voltage for current rise depends on the nature of surface states, which strongly affects the potential profiles. Transient or dynamic simulation indicates that the trap-related kink phenomenon should be a rather slow process. Substrate-related kink dynamics are also analyzed.

Degradation of InGaAs/InP double heterojunction bipolar transistors under electron irradiation

The dc characteristics of InGaAs/InP double heterojunction bipolar transistors (DHBTs) are studied under high-energy (/spl sim/1 MeV) electron irradiation up to a fluence of 14.8/spl times/10/sup 15/ electrons/cm/sup 2/. The devices show an increase in common-emitter current gain (h/sub fe/) at low levels of dose (<10/sup 15/ electrons/cm/sup 2/) and a gradual decrease in h/sub fe/ and an increase in output conductance for higher doses. The decrease in h/sub fe/ is as much as /spl sim/80% at low base currents (/spl sim/10 /spl mu/A) after a cumulative dose of 14.8/spl times/10/sup 15/ electrons/cm/sup 2/. The observed degradation effects in collector current-voltage (I-V) characteristics are studied quantitatively using a simple SPICE-like device model. The overall decrease in h/sub fe/ is attributed to increased recombination in the emitter-base junction region caused by radiation-induced defects. The defects introduced in the collector-base junction region are believed to be responsible for the observed increase in the output conductance.

Degradation of InGaAs/InP single heterojunction bipolar transistors under high energy electron irradiation

Abstract The d.c. characteristics of InGaAs/InP single heterojunction bipolar transistors (SHBTs) were studied for the first time under high energy (∼1 MeV) electron radiation of cumulative dose up to 5.4×1015 electrons/cm2. No degradation was observed for electron doses below 1015/cm2. For electron doses greater than 1015/cm2 the following degradation effects were observed: (1) decrease in collector current; (2) decrease in current gain up to 50%; (3) an increase in collector saturation voltage by 0.2–0.8 V depending on base current; and (4) increase in output conductance. The degradation of collector current and current gain are thought to be due to increased recombination caused by radiation-induced defects in the base–emitter junction. The increase in collector saturation voltage is attributed to an increase in emitter contact resistance after irradiation. The increase in the avalanche multiplication in the reverse biased base–collector junction caused by radiation induced defects is believed to be responsible for increased output conductance after irradiation.

Two-dimensional analysis of substrate-related kink phenomena in GaAs MESFET's

Two-dimensional simulations of GaAs MESFET's are made in which impact ionization of carriers and impurity compensation by deep levels in semi-insulating substrates are considered. It is shown that in cases with high acceptor densities in the semi-insulating substrates, a steep increase in output conductance with the drain voltage ("kink") arises because holes that are generated by impact ionization flow into the substrates and are captured by the deep levels to modulate the space-charge distributions. In cases with low acceptor densities in the substrates, a sudden increase in drain currents due to conductivity modulation in the substrates is observed. It is concluded that carrier trapping and current transport in the semi-insulating substrate should be taken into account when considering kink effects and/or breakdown phenomena in GaAs MESFET's.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Short-channel effects in sub-100 nm GaAs MESFETs

GaAs MESFETs with gate lengths ranging from 260 nm down to 30 nm have been fabricated using high resolution electron-beam lithography. The DC characteristics including transconductance, output conductance, threshold voltage, and subthreshold current of these devices have been measured. Short-channel effects manifested as a negative shift in threshold voltage and an increase in output conductance have been observed as the gate length decreased. These effects become pronounced as the device aspect ratio (gatelength/channel thickness) falls below 5. Subthreshold current increased with a decrease in gate length and is actually an exponential function of the gate bias for gate dimensions below 100 nm. Also, subthreshold current is an increasingly more sensitive function of the drain-to-source voltage as the gate-length is reduced. The observed effects are attributed to the space charge limited electron injection into the GaAs buffer layer under the channel.