In-line Characterization Techniques Research Articles

Multi-Wavelength Raman Characterization of Epitaxial Silicon Wafers for In-Line Process Characterization and Monitoring Applications

Epitaxial Si wafers are widely used for high performance advanced memory devices and CMOS image sensor (CIS) device manufacturing. Surface morphology observation and resistivity measurements are frequently done as quick in-line quality monitoring of epitaxial Si layers. High resolution X-ray diffraction (HRXRD) and etch pit characterizations are done for randomly selected wafers. However, these conventional characterization techniques are not sensitive enough to detect small quality variations in epitaxial Si wafers. For Si wafers with multiple epitaxial layers and different dopant concentrations, the conventional characterization techniques are even less useful. Introduction of new epitaxial characterization techniques is strongly desired for effective in-line process monitoring. A non-contact, in-line characterization technique, with virtual depth profiling capability, would be beneficial for proper characterization of Si wafers with multiple epitaxial layers. In this study, we have characterized 200 mm and 300 mm Si wafers with triple epitaxial layers using multiwavelength, high resolution Raman spectroscopy. Ninety three (93)-point wafer mapping measurements were performed on all wafers, Statistics of Raman signal intensity, shift and full-width-at-half-maximum (FWHM) values, under different excitation wavelengths, were extracted and compared with two types of reference Si wafers (prime Si wafers and reclaimed Si wafers). Significant variations in Raman signal intensity, shift and FWHM were measured between reference wafers and epitaxial wafers, indicating potential Si lattice stress and crystallinity. Excitation wavelength dependence of Raman signal intensity, shift and FWHM also indicated variations in Si lattice stress and crystallinity of epitaxial layers in the depth direction. Non-contact multiwavelength Raman measurements are very sensitive to the quality of epitaxial Si layers and are effective as a complimentary in-line process characterization and monitoring technique. Figure 1

Photoluminescence Characterization of Interface Quality of Bonded Silicon Wafers

Wafer-to-wafer bonding is implemented in fabrication of backside illuminated (BSI) complimentary metal-oxide-semiconductor image sensor (CIS) devices in volume manufacturing. A wafer with illuminated imager and a wafer with readout and image processing electronics are fabricated separately and assembled using wafer-to-wafer bonding. Since the illuminated imager and a wafer with readout and image processing electronics are facing each other at the bonded interface, the quality of wafer-to-wafer bonding interface can affect the performance of finished devices. Room temperature photoluminescence (RTPL) technique was studied as a non-contact, in-line characterization technique for assessing bonding interface quality. Ordinary and bonded, 200 mm Si wafers, with different surface finishing conditions, were characterized by RTPL under two different excitation wavelengths (650 nm and 827 nm) to investigate the effects of surface finishing conditions. Significant variations in RTPL spectra and intensity, suggesting potential electrical property variations, were observed from bonded wafers. RTPL characterization results on ordinary and bonded wafers are introduced as a potential technique for in-line bonding interface quality monitoring.

Photovoltaic Material Characterization With Steady State and Transient Photoluminescence

In this study, we develop an approach to characterize the surface and bulk properties for thin films of photovoltaic materials by combining two experimental photoluminescence (PL) techniques with one multiphysics simulation. This contactless, in-line characterization technique allows reliable extraction of key lifetime parameters. In this study, we first discuss the strengths and weaknesses of both steady-state and transient PL techniques (specifically, steady-state PL excitation spectroscopy and time-resolved PL) and show that combining them with numerical simulation can be used to extract surface and bulk lifetimes self consistently. The method is applied to InP thin films grown with a novel vapor-liquid-solid method. The InP thin film tested is found to have a bulk Shockley-Read-Hall (SRH) lifetime of 12 ns and a front surface recombination velocity of 5×10 4 cm/s.

Raman Characterization of Poly-Si Channel Materials for 3D Flash Memory Device Applications

Three dimensional (3D) vertical NAND (V-NAND) flash technology has been actively investigated. [1] 3D NAND architectures offer one of the best combinations of device performance, memory density, power consumption and manufacturing cost. All major memory device manufacturers are actively pursuing development of commercially viable devices. Development of bit cost scalable (BiCS) NAND technology is very important from both technology and commercialization points of view.Device scaling was achieved by vertical staking of thin film transistors (TFTs) in contrast to the conventional planar device scaling techniques relying on advances in lithography. Poly-Si is used as channel materials in 3D V-NAND flash memory devices. Control of both poly-Si grain size and grain size distribution is very important for tight control of device yield and performance variations.For poly-Si channel fabrication, amorphous Si (a-Si) film is deposited in the channel region and then converted to poly-Si by thermal annealing. To achieve desired properties of the poly-Si channel, grain size, resistivity, mobility and interface quality must be carefully monitored and controlled. One of the basic parameters of the poly-Si channel is grain size. Smaller grains lower in channel carrier mobility while larger grains increase device performance variations. The grain size and its distribution have to be optimized for the best device performance. Development of proper in-line characterization techniques for poly-Si grain size, after thermal annealing, is strongly desired.In this paper, Raman spectroscopy was used for characterizing poly-Si after thermal annealing of chemical vapor deposited (CVD) thin a-Si films on SiO2/Si wafers. The a-Si films on SiO2/Si wafers were annealed in a single wafer rapid thermal furnace (SRTF-300 system [4, 5]) in the temperature range of 600 ~ 1050oC under various ambient gases.Systematic change of Raman spectra, indicating crystallization of a-Si films and grain growth of poly-Si with annealing temperature increase was measured (Fig. 1.) using an MRS-300 system. [6] As deposited a-Si/SiO2/Si showed one sharp peak from the Si wafer at ~ 520.3cm-1 and one broad peak centered at ~ 480cm-1 corresponding to a-Si. After thermal annealing, the a-Si peak decreased in intensity and transformed into new peaks at ~ 495 and ~ 515 cm-1, corresponding to poly-Si. The poly-Si peaks increased and sharpened as the annealing temperature increased. The change of Raman spectra indicates the degree of polycrystallization and grain growth under different annealing conditions. Figures 2 and 3 showed the Raman spectra from the annealed samples and their deconvolution results. Detailed Raman characterization, as a function of annealing temperature and type of ambient gas, will be reported at the conference.

Process Optimization and Integration of HFO2 and HF-Silicates

ABSTRACTWe have established in-line characterization techniques for analyzing the bulk and interface-charge properties of dielectric films, for process optimization. Surface charge analysis (SCA) is used to determine the densities of interface states, fixed charge, and near-interface traps in ultra-thin dielectrics, and is useful for tracking the influence of post-deposition processing on interface-charge properties. Spectroscopic ellipsometry (SE) is used to obtain the absorption spectra in the conduction band-tail region. The intensity of an extra absorption peak inside the bandgap of HfO2 is clearly correlated with leakage current density and near-interface trap density. Based on the observed process dependencies, defects within the HfO2 films are likely to be oxygen vacancies. The relative scalability of HfO2 and Hf-silicate films of various compositions is examined using a figure of merit based on the direct-tunneling leakage current model. Pure HfO2 is expected to be more scalable than Hf-silicates. However, it is typically accompanied by an interfacial layer which significantly increases the equivalent oxide thickness (EOT). A 20% Hf silicate with relative permittivity of 11 or higher can be more scalable than HfO2 with an interfacial layer. Alternatively, an ultra-thin interfacial Si3N4 diffusion barrier can be used with HfO2, to allow for more aggressive EOT scaling. The dependencies of interface-charge properties and surface roughness on the nitride barrier formation process are presented.