Outdiffusion Of Impurities Research Articles

Chemical Mechanical Polishing of MgO Substrate and Its Effect on Fabrication of Atomic Step-Terrace Structures on MgO Surface by Subsequent High-Temperature Annealing

Single-crystalline MgO is used as a substrate for the deposition of various functional thin films. The present study focused on the development of a complete sequence of fabricating atomic step-terrace structures on the MgO substrate via a method that includes grinding, precise mechanical polishing, chemical mechanical polishing (CMP), and high-temperature annealing. The effect of a damage-free surface pretreatment on the subsequent high-temperature annealing was investigated. An atomically smooth and damage-free MgO substrate surface with an average surface roughness of 0.05 nm was obtained via a CMP process using a colloidal silica slurry. Atomic step-terrace structures were formed on the substrate after the high-temperature annealing process at 1000 °C for 20 h under atmospheric air. The obtained step height was 0.20 nm, which corresponds to one-half the unit cell of an MgO crystal (0.21 nm). By contrast, when a mechanically damaged MgO substrate was subjected to the annealing process, Ca segregation was observed on the annealed surface, without the formation of an atomic step-terrace structure. CMP was found to be necessary prior to high-temperature annealing to attain atomic step-terrace structures and to avoid the out-diffusion of impurities in the MgO bulk crystals.

Ge incorporation in gallium oxide nanostructures grown by thermal treatment

Effective doping of semiconductor oxide nanostructures is needed to control n-type conductivity; however, out-diffusion of impurities in high quality crystals is still a bottleneck in nanotechnology. Here, germanium-doped gallium oxide (β-Ga2O3) nanowires have been grown by a thermal evaporation method. Two temperatures, close to Ge melting point, were chosen for the dynamic annealing of metallic gallium and germanium powders. At 840 °C, Ga2O3 nanowires and nanobelts grow along the b or c direction, leaving gallium germanate particles at the tip in both cases. Wider structures were produced at 940 °C, decorated with a Ge nanocrystal at the end. Transmission electron microscopy has been used to establish the vapor–liquid–solid-like growth process for the formation of these structures. The influence of Ge incorporation in the nanostructures has been assessed by cathodoluminescence and micro-Raman spectroscopy. The presence of Ge in β-Ga2O3 nanostructures is essential for electronic and optoelectronic applications since Ge is potentially the most effective n-type dopant for β-Ga2O3.

Structural characterization of coevaporated Cu(In,Ga)Se2 absorbers deposited at low temperature

This paper focuses on low temperature (∼390 °C) growth of Cu(In,Ga)Se2 (CIGS) for high efficiency solar cells. The process developed in this work allows the growth of high quality CIGS thin films on flexible substrates such as polymer foils with lower impurity out-diffusion from the substrate. We carry out advanced analysis of the microstructure of CIGS absorbers prepared using multi-stage coevaporation on polyimide at low temperature leading to state-of-the-art efficiencies exceeding 18%. We also develop a method that can be used to easily interpret the x-ray diffraction data using compositional analysis, when asymmetric or multi-feature peaks are present. This method proves to be particularly useful to rule out in-plane inhomogeneities and undesired phases when in-depth gradients are present. This analysis is combined with electron microscopy and more advanced x-ray analysis (grazing incidence diffraction and pole plots) to create a global model of the film microstructure. We show that the film is composed of at least three stacked layers with different properties and that the microstructure of the layers has an impact on the cell performances. In particular, the short circuit current Jsc is strongly related to the intensity of the (112) peak.

The effects of annealing on non-polar (1 1 2¯ 0) a-plane GaN films

Non-polar a-plane (1 1 2¯ 0) GaN films were grown on r-plane sapphire by metal–organic vapor phase epitaxy and were subsequently annealed for 90 min at 1070 °C. Most dislocations were partial dislocations, which terminated basal plane stacking faults. Prior to annealing, these dislocations were randomly distributed. After annealing, these dislocations moved into arrays oriented along the [0 0 0 1] direction and aligned perpendicular to the film–substrate interface throughout their length, although the total dislocation density remained unchanged. These changes were accompanied by broadening of the symmetric X-ray diffraction 1 1 2¯ 0 ω-scan widths. The mechanism of movement was identified as dislocation glide, occurring due to highly anisotropic stresses (confirmed by X-ray diffraction lattice parameter measurements) and evidenced by macroscopic slip bands observed on the sample surface. There was also an increase in the density of unintentionally n-type doped electrically conductive inclined features present at the film–substrate interface (as observed in cross-section using scanning capacitance microscopy), suggesting out-diffusion of impurities from the substrate along with prismatic stacking faults. These data suggest that annealing processes performed close to film growth temperatures can affect both the microstructure and the electrical properties of non-polar GaN films.

Structural properties of Ge-implanted Si 1 − xGe x layers

The structural properties of epitaxial Si 1 − x Ge x layers formed by high-dose germanium implantation have been studied. Transmission electron microscopy (TEM) and Rutherford backscattering channeling (RBS-C) were employed to evaluate the annealing behavior of radiation damage. The depth profiles of impurities and dopants of O, C, F, and Ge were measured by secondary-ion mass spectroscopy (SIMS). Defect-free epitaxial regrowth through rapid thermal annealing (RTA) at 1100 °C for 10 s was observed for the silicon layer implanted by 50-keV Ge + ions. However, a great number of end-of-range (EOR) dislocation loops were left with the same RTA process when the silicon layer was implanted by 100-keV Ge + ions. The EOR damage density was considerably reduced with an increase in the RTA time; consequently, dislocation defects disappeared after RTA at 1100 °C for 200 s. This was confirmed by TEM. Further SIMS studies showed that out-diffusion of impurities of O, C, and F towards surfaces was accompanied by a reduction of residual EOR damaged.

An analytical model for current transport in AlGaAs/GaAs abrupt HBTs with a setback layer

An intrinsic setback layer (or spacer) is frequently used in abrupt heterojunctions to improve the emitter injection efficiency and to reduce the impurity out-diffusion from the heavily doped base to the emitter. We have developed an analytical model to predict the d.c. performance of the AlGaAs/GaAs abrupt heterojunction bipolar transistor (HBT) with a setback layer. The effects of different setback layer thicknesses on the collector and base currents are studied in detail. Our results suggest that the presence of the setback layer can improve injection efficiency, but it can also increase the base current. Furthermore, for the device considered and parameters used, it was shown that a setback layer with a 100 Å thickness can yield the highest current gain and that a setback layer thicker than 100 Å can actually degrade the HBT performance. The model predictions compare favorably with the results obtained from solving numerically the Poisson and continuity equations including the nonuniform spatial band distribution as well as carrier degeneracy.

Dopant diffusion in HgCdTe grown by photon assisted molecular-beam epitaxy

The results of a systematic study of low temperature diffusion of indium and arsenic under Hg-saturated conditions in HgCdTe epilayers grown by molecular-beam epitaxy (MBE) are reported. Anneal temperatures ranging from 250 to 400 °C were investigated. To our knowledge, this is the first report of indium and arsenic diffusion coefficients at temperatures less than 300 °C. Indium was determined to be more stable to redistribution than arsenic in the MBE layers at the temperatures investigated. During this study, evidence of p-type impurity outdiffusion from the substrate during anneal was discovered. Both copper and silver were observed to segregate into the HgCdTe epilayer during anneal. This latter effect represents a critical problem in the use of CdTe and CdZnTe substrates for material growth, and may be a major factor limiting yield of material and devices.

Anomalous effects of lamp annealing in modulation-doped In0.53Ga0.47As/In0.52Al0.48As and Si-implanted In0.53Ga0.47As

The effects of pulsed halogen-lamp annealing on modulation-doped In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As heterostructures and Si-implanted In 0.53 Ga 0.47 As have been studied to determine the suitabiiity of this process in the fabrication of high-performance field-effect transistors. Implantation and annealing of these materials are necessary for contact and self-aligned gate formation. Mobilities as high as 7400 cm2/ V . s are measured at 300 K in undoped molecular-beam epitaxy In-GaAs implanted with 8 × 1012cm-2 29Si+and lamp annealed at 700°C for 5 s. Anomalous overactivations (up to 120 percent) are observed in these layers When silox encapsulation is used during annealing, but the effect is absent for GaAs proximity capping. Sharp decreases in sheet-electron concentration and mobility occur in the normal modulation-doped structures for annealing temperatures > 750°C, while this trend is much smaller in the inverted structures. Arsenic loss from the In-AlAs doping layer is attributed as the main mechanism for this behavior, which makes the inverted structure more suitable for device processing. Depth profiling in the modulation-doped structures indicates that there may be serious pinchoff problems in these devices when annealed at higher temperatures due to outdiffusion of impurities from the InP substrate. Values of interdiffusion coefficients at the InGaAs/ InAIAs heterointerfaces, being reported for the first time, are almost three orders higher than those measured in the GaAs/AIAs systems.

The behavior of unintentional impurities in Ga0.47 In0.53As grown by MBE

A number of factors contribute to the high n-type background carrier concentration (high 1015 to low 1016 cm−3) measured in MBE Ga0.47In0.53As lattice-matched to InP. The results of this study indicate that the outdiffusion of impurities from InP substrates into GalnAs epitaxial layers can account for as much as two-thirds of the background carrier concentration and can reduce mobilities by as much as 40%. These impurities and/or defects can be gettered at the surfaces of the InP by heat treatment and then removed by polishing. The GalnAs epitaxial layers grown on the heat-treated substrates have significantly improved electrical properties. Hall and SIMS measurements indicate that both donors and acceptors outdiffuse into the epitaxial layers during growth resulting in heavily compensated layers with reduced mobilities. The dominant donor species was identified by SIMS as Si, and the dominant acceptors as Fe, Cr and Mn.

Dependence of electrical characteristics of MBE Ga0.47In0.53As planar doped barriers on InP substrates

The potential barrier height in planar‐doped barrier structures is particularly sensitive to the concentration of background impurities present in the nominally undoped regions. MBE grown GaInAs lattice matched to InP typically has n‐type background carrier concentrations in the 1016 cm−3 range. This high level can cause lowering of the barrier to near zero. By subjecting the InP substrates to a heat treatment process before growth in order to inhibit impurity outdiffusion higher purity GaInAs can be grown and planar‐doped barrier devices with more reproducible characteristics are expected.

Crystal, impurity-related and growth defects in molecular beam epitaxial GaAs layers

Crystallographic defects in GaAs layers grown by molecular beam epitaxy were studied. The methods used were photochemical etching, developed previously, and also optical and scanning electron microscopy. Dislocations, stacking faults, impurity microprecipitates and impurity out-diffusion from the substrate were observed. Large growth defects, namely oval defects and whiskers, were also studied using selective etching, transmission electron microscopy and electron microprobe analysis. The roles of the substrate quality, handling, surface preparation and epitaxial growth conditions were considered in connection with the formation of the crystallographic defects.

Reactive outdiffusion of contaminants from (AlGa)As laser facets

We report improved overcoating adhesion and reduction of facet contaminants by predeposition of a 20–50-Å layer of metallic Al onto cleaved GaAlAs 〈110〉 and GaAs 〈110〉 mirror facets. Electrical, adhesive, and Auger measurements show impurity outdiffusion from the facet into the Al interlayer. This procedure reduces the oxygen by at least a factor of 5 by gettering contaminants from the facet as effectively as ion beam milling, without producing (AlGa)As surface nonstoichiometry inherent in the sputtering process.

Outdiffusion of impurities from GaP substrate material by means of postgrowth annealing

The present work is concerned with a reduction procedure for impurities in GaP substrate slices. Bý annealing of GaP in contact with high purity gallium the concentration of definite impurities is reduced. Heat treatment of GaP under phosphorus pressure introduces another efficient extraction mechanism which is based on phosphosilicate glass gettering and well known in silicon technology.

High-purity ZnSe grown by liquid phase epitaxy

A study was performed to establish the origin and nature of background compensating impurities in undoped ZnSe layers grown by liquid phase epitaxy on ZnSe substrate wafers in a low-contamination-level environment. The width of bound exciton lines in low-temperature photoluminescence spectra was used to define the quality of the material, and the energy of the lines was used to identify these low-level impurities. The sharpest spectra occurred in layers grown rapidly on a previously grown buffer layer indicating the importance of impurity outdiffusion from the substrate into the growing layer. The sharpness of these bound exciton lines indicates that the total concentration of electrically active impurities (NA+ND) is <1017/cc, an estimate which is confirmed by mass spectroscopy.

Thermal conversion mechanism in semi-insulating GaAs

Formation of both p- and n-type thermally converted surface layers in semi-insulating GaAs is explained in terms of outdiffusion of impurities. Carrier concentrations and impurity profiles calculated on the basis of this outdiffusion model are in close agreement with the experimental values which were obtained by Hall measurements on a variety of heat-treated samples. This excellent agreement is further backed by the mass-spectrometric data and gives strong evidence to the adequacy of the model.

Spin-lattice relaxation in HF and NH3 doped ice and the outdiffusion of impurities

T1 measurements have been done on pure, NH3 doped and HF doped ice crystals. Three relaxation processes can be distinguished: a low temperature process, an extrinsic and an intrinsic process at high temperatures with activation energies of 0.08 eV, 0.35 eV and 0.62 eV respectively. Vested vacancies are proposed as defects effective in the low temperature process. The extrinsic high temperature process is due to vacancies which are formed by shifting a HF molecule to an interstitial site. Schottky defects are responsible for the intrinsic high temperature relaxation mechanism. Outdiffusion of HF is found to occur in concentration steps and at high concentrations by an interstitial mechanism.

Control of impurity density in homoepitaxial semiconductor layers grown by sublimation at UHV

Sublimation at UHV has good prospects as a technique for growing thin epitaxial layers in which out-diffusion of impurities from the substrate must be avoided. It has been shown[1] that after a source has been used for some time the layer resistivity approaches the starting value for the source material. This paper presents a simple theoretical model which explains this empirical observation and can be used to determine more general conditions for the control of impurity density in homoepitaxial semiconductor films grown by sublimation at UHV.

Effect of Heat Treatment on the Optical Properties of Heavily Doped Silicon and Germanium

An experimental study has been made of the effect of high-temperature vacuum heat treatment on the infrared reflectivity of heavily doped germanium and silicon. The heat treatment produces a layer on the surface with optical properties differing from those of the bulk material. From a Kramers-Kronig analysis of the reflectivity data for an n-type silicon sample, where the time of heating is sufficiently short to make impurity out-diffusion unimportant, it is concluded that the changes in free-carrier electric susceptibility indicate a decrease in the low-frequency-scattering relaxation time. The change in relaxation time is attributed to the introduction of extensive surface fracture from the heating. The extinction coefficient was not obtained over a sufficient spectral range to ascertain whether it follows the classical expression; however, the results for the extinction coefficient indicate an increase in the high-frequency relaxation time.