Impact Of Self-heating Effects Research Articles

Impact of Self-Heating on Negative-Capacitance FinFET: Device-Circuit Interaction

In this work, we analyze the impact of self-heating effects (SHEs) on 14-nm negative capacitance (NC)-FinFET performance from device to the circuit level. The 3-D thermal TCAD simulations, after careful calibration with measurements, are performed to analyze the impact of SHE in a broad range of frequency. Furthermore, we use the TCAD calibrated BSIM-CMG model to analyze the impact of SHE in NC-FinFET at the circuit level, after including a physics-based model to capture the NC effect. For the first time, we analyze the impact of a nonuniform distribution of temperature dissipated from the channel region to gate-stack in NC-FinFETs. On account of the thermal insulating properties of the gate-stack, the ferroelectric (FE) layer is found to be cooler than the channel region under the impact of SHE. We demonstrate that neglecting that and, hence, using the channel temperature to evaluate the temperature-dependent parameter α (in the Landau-Khalatanikov model of NC effect) of the FE layer result in a significant overestimation of SHE-induced degradations, such as in the NC voltage gain. Based on our TCAD analysis, we propose a relation between gate-stack temperature and the channel temperature and use this to accurately model the α parameter and, hence, SHE in NC-FinFETs. The SHE is found to dominate for both FinFET and NC-FinFET in the gigahertz range, which eventually degrades the performance at the circuit level, which is further confirmed using ring oscillator (RO) simulations.

An Insight Into Self-Heating Effects and Its Implications on Hot Carrier Degradation for Silicon-Nanotube-Based Double Gate-All-Around (DGAA) MOSFETs

Silicon-Nanotube-based ultra-thin DGAA MOSFETs have been extensively studied for their superior immunity to short channel effects (SCEs) and better drive current capability; however, the reliability issues owing to self-heating effects (SHEs) and hot carrier injection (HCI) degradation are yet to be investigated systematically. In advanced non-planar device structures, an increase in power density due to ultra-scaled device dimensions can aggravate both the carrier heating as well as lattice heating. In this paper, 3-dimensional (3-D) electrothermal (ET) simulations using coupled hydrodynamic and thermodynamic transport models are performed to analyze the electrothermal behavior and SHEs in ultra-thin DGAA MOSFET. 3-D TCAD simulation parameters are calibrated with the data obtained from the literature. Through advanced 3-D ET simulations, we demonstrate that the device thermal contact resistance adversely influences both the carrier temperature as well as lattice temperature. The implication of SHE on the device output drive current reduction is also analyzed. The effective drive current method is used to observe the impact of SHE on the intrinsic delay of the device. Further, the performance of the device due to HCI is also highlighted. HCI significantly degrades the overall device performance leading to increased gate leakage current. Finally, the reliability issues induced by SHEs with on-chip ambient temperature variations have also been interpreted using Sentauras based TCAD simulator.

Impact of self-heating effects on nanoscale Ge p-channel FinFETs with Si substrate

In this paper, self-heating effects (SHE) in nanoscale Ge p-channel FinFETs with Si substrate are evaluated by TCAD simulation. Hydrodynamic transport with modified mobilities and Fourier s law of heat conduction with modified thermal conductivities are used in the simulation. Ge p-channel single-fin FinFET devices with different S/D extension lengths and fin heights, and multi-fin FinFETs with different fin numbers and fin pitches are successively investigated. Boundary thermal resistances at source, drain and gate contacts are set to 2000 ${\rm~\mu~m^{2}K/W}$ and the substrate thermal boundary condition is set to 300 K so that the source and drain heat dissipation paths are the first two heat dissipation paths. The results are listed below: (i) 14 nm Ge p-channel single-fin FinFETs with a 47 nm fin pitch experience 9.7% on-state current degradation. (ii) Considering the same input power, FinFETs with a longer S/D extension length show a higher lattice temperature and a larger on-state current degradation. (iii) Considering the same input power, FinFETs with a taller fin height show a higher lattice temperature. (iv) The temperature in multi-fin FinFET devices will first increase then saturate with the increasing fin number. At last, thermal resistances in Ge p-channel single-fin FinFETs and multi-fin FinFETs are investigated.

Thermal and spectral analysis of self-heating effects in high-power LEDs

This study employed a thermal/spectral technique for examining self-heating effects in high-power light emitting diodes (LEDs). Here, high-power LEDs were thermally stressed, and the impact of self-heating effects was characterized in terms of luminal performance. Results from high-speed thermography demonstrated that these thermal effects lead to degraded device performance, reduced power conversion efficiency, and power loss. The ability to monitor and quantify thermal transients using this approach is important for many optoelectronic and lighting applications. Temporal thermal and spectral characteristics were examined with the purpose of improving thermal management strategies.

High-speed thermal analysis of high power diode arrays

This paper explores high-speed image capture as a viable approach for non-invasive thermal analysis. The ability to monitor thermal transients and obtain accurate spatial information for miniature devices is important for many lighting applications. In this study, high power optoelectronic devices are stressed, and the impact of self-heating effects is examined. Results demonstrate that these effects lead to degraded device performance, reduced efficiency, and power loss.

Analysis of the large-signal characteristics of power heterojunction bipolar transistors exhibiting self-heating effects

The large-signal microwave characteristics of AlGaAs/GaAs heterojunction bipolar transistors (HBTs) are modeled using the conventional Gummel-Poon-based bipolar junction transistor (BJT) model and extending it to include self-heating effects. The model is incorporated as a user-defined model in a commercial circuit simulator. The experimental microwave characteristics of HBTs are analyzed using the new model and harmonic balance techniques and the impact of self-heating effects on the device large-signal characteristics is investigated. Use of constant base voltage rather than constant current is more suitable for achieving maximum output power. Self-heating induced by RF drive is reduced under constant base current conditions. Increased thermal capacitance values result in gain enhancement at high power levels.