Impact Of Channel Orientation Research Articles

A numerical investigation on the effects of water inlet location and channel surface properties on water transport in PEMFC cathode channels

Water motions in simplified, straight cathode channels are investigated numerically to study the dynamics of water in a proton exchange membrane (PEM) fuel cell. The computational domain consists of a channel with four walls, with the bottom wall representing the surface of gas diffusion layer. The impact of channel orientation (a horizontal channel with water inlet pore on the bottom wall, side wall and top wall respectively, and a vertical channel with water inlet pore on the bottom wall) on gas transport and water removal is discussed, taking into account the wettability of the bottom wall and air and water inlet velocity. Our numerical results show that water drains out more quickly for a channel with a hydrophobic bottom wall than for a channel with a hydrophilic bottom wall. The former case yields a greater pressure loss mainly because water appears in the form of droplets, versus as film in the latter case. The cases with the inlet pore located on the top wall and the vertical channel have the least water coverage on the bottom wall and relatively little volumetric fraction of water inside the channel. However, the pressure drop is slightly higher for the cases with the inlet pore located on the top wall and the vertical channel than that in other cases. Gravity has some effect on water motions in the channels, while with the increase of air and water inlet velocity, gravity plays a slight part in water motions. Our observations are in good agreement with other experimental and computational works in the literature.

Strained n-Channel Field-Effect Transistors with Channel Proximate Silicon–Carbon Source/Drain Stressors for Performance Enhancement

An integration scheme for realizing strained n-channel metal-oxide-semiconductor field-effect transistors (nFETS) with embedded silicon–carbon source/drain (S/D) stressors formed in close proximity to the channel was demonstrated. The stressors are termed channel-proximate (CP) Si:C S/D stressors, whose proximity to the channel improves their effectiveness in contributing to tensile strain in the channel region. Numerical simulation was performed using the finite-element method to assess the strain enhancement due to CP Si:C S/D. Key process development and material characterization were performed to understand the interaction between dopants and substitutional carbon concentration . Unstrained control nFETs, nFETs with conventional Si:C S/D formed after spacers, and nFETs with CP Si:C S/D were fabricated. The nFET with CP Si:C S/D stressors achieved a drive current enhancement of and over unstrained nFET and nFET with conventional Si:C S/D, respectively. The impact of channel orientation on enhancement was also investigated.

Impact of channel orientation on ballistic current of nDGFETs with alternative channel materials

Alternative channels materials (like GaAs, Ge, …) are expected to lead to improved current drive capability in MOSFETs devices operating in the quasi ballistic regime. In this work, the previously predicted in-plane isotropy of ballistic drain current in double gate nMOSFETs on (0 0 1) and (1 1 1) in all zinc-blend semiconductor substrates, has been rigorously demonstrated on the basis of a generalized Natori model. Moreover, the anisotropy on (1 1 0) substrate has been further investigated, showing and explaining that, as already reported for Ge only [Low Tony, Hou YT, Li MF, Zhu Chunxiang, Chin Albert, Samudra1 G, et al. Investigation of performance limits of germanium double-gated MOSFETs. IEDM Tech Dig 2003:961–4], the best ballistic current of GaAs, InAs and InSb nDGFETs is also obtained on this surface, for channels aligned in the [ 1 1 ¯ 0 ] direction, opening new perspectives in quasi ballistic device optimization with alternative channel material.

Impact of strain and channel orientation on the low-frequency noise performance of Si n- and pMOSFETs

Mobility and low-frequency (LF) noise were studied in tensile strained Si n- and pMOSFETs fabricated on relaxed SiGe virtual substrates. Both the impact of the channel orientation (〈1 1 0〉 or 〈1 0 0〉 on (1 0 0) Si) and the tensile strain were carefully investigated. Two types of virtual substrates were used; a thin relaxed SiGe layer (20% Ge) and a thick one (27% Ge). The strained Si nMOSFETs fabricated on the thin substrate showed similar LF noise level as in the reference devices, whereas the thick substrate caused severely increased LF noise in the nMOSFETs. The latter was linked to the higher Ge concentration and explained by possible misfit dislocations and increased defect densities, likely resulting from strain relaxation caused by ion implantation damage. On the other hand, considerably lower LF noise was achieved in the pMOSFETs on the thick SiGe. The channel orientation was not found to have a significant influence on the LF noise performance in any of the studied devices.