Histogramming Memory Research Articles

Development of optimized memory based VLSI architecture with histogram analysis for image contrast enhancement

The natural scenarios show that the images which are taken under low light environments experiences weak luminosity and low-contrast issues frequently. One of the vital units of image contrast enhancement accelerator is a Histogram computation. In this paper, a new VLSI structure is developed for contrast enhancement using optimized memory-based histogram analysis. Initially, a comparator-less parallel rank ordering filter is proposed to remove the noise in the pre-processing stage. Then, the pipelining and parallel process of the memory-based histogram analysis is enhanced by introducing an enhanced transient search optimization (ETSO) approach that selects suitable data to perform the data comparison process in the processing elements (PEs). In addition, a flexible digital comparators (FDC), pipelined structure of bilinear interpolation and reciprocal units are introduced in the proposed contrast enhancement accelerator to save area and power usage. Also, the histogram memory unit is designed by considering dual data flow with self-configurable characteristics for the selection of appropriate data flow in the contrast enhancement application. At last, the stated VLSI structures for both histogram computation and enhancement unit are implemented in FPGA for meeting their speed and resource constraints. The key factors of the proposed design are lowest delay of 5.256 ns and lower power consumption of 0.289 W against existing accelerators.

Lazy Management for Frequency Table on Hardware-Based Stream Lossless Data Compression

The demand for communicating large amounts of data in real-time has raised new challenges with implementing high-speed communication paths for high definition video and sensory data. It requires the implementation of high speed data paths based on hardware. Implementation difficulties have to be addressed by applying new techniques based on data-oriented algorithms. This paper focuses on a solution for this problem by applying a lossless data compression mechanism on the communication data path. The new lossless data compression mechanism, called LCA-DLT, provides dynamic histogram management for symbol lookup tables used in the compression and the decompression operations. When the histogram memory is fully used, the management algorithm needs to find the least used entries and invalidate these entries. The invalidation operations cause the blocking of the compression and the decompression data stream. This paper proposes novel techniques to eliminate blocking by introducing a dynamic invalidation mechanism, which allows achievement of a high throughput data compression.

De-Li-DAQ-2D – a new data acquisition system for position-sensitive neutron detectors with delay-line readout

Software for a data acquisition system of modern one- and two-dimensional position-sensitive detectors with delay-line readout, which includes a software interface to a new electronic module De-Li-DAQ-2D with a USB interface, is presented. The new system after successful tests on the stand and on several spectrometers of the IBR-2 reactor has been integrated into the software complex SONIX+ [1]. The De-Li- DAQ-2D module [2] contains an 8-channel time-code converter (TDC-GPX) with a time resolution of 80 ps, field programmable gate array (FPGA), 1 Gbyte histogram memory and high-speed interface with a fiber-optic communication line. A real count rate is no less than 106 events/s. The De-Li-DAQ-2D module is implemented in the NIM standard. The De-Li-DAQ-2D module can operate in two modes: histogram mode and list mode.

A Configurable Parallel Hardware Architecture for Efficient Integral Histogram Image Computing

Integral histogram image can accelerate the computing process of feature algorithm in computer vision, but exhibits high computation complexity and inefficient memory access. In this paper, we propose a configurable parallel architecture to improve the computing efficiency of integral histogram. Based on the configurable design in the architecture, multiple integral objects for integral histogram image, such as image intensity, image gradient, and local binary pattern, are well supported. Meanwhile, by means of the proposed strip-based memory partitioning mechanism, this architecture processes the integral histogram quickly with maximal parallelism in a pipeline manner. Besides, in this architecture, the proposed data correlation memory compression mechanism effectively solves the expansion problem of integral histogram memory caused by storing the histogram data. It fully reduces the data redundancy in the integral histograms, and saves a lot of memory resources. Experiments using Cyclone IV-based field-programmable gate array platform and 65-nm technology-based postsynthesis show that our architecture improves the average computing speed by 8.6 times with high power efficiency compared with the state-of-the-art works.

Fast and compact data acquisition for gas-filled detectors with delay line

This article describes the functionality, implementation and performance of a PCI data acquisition board that can be used in conjunction with gas-filled detectors with delay line readout. The board combines a large on-board 256-MByte histogramming memory with a maximum 10-MHz count rate in continuous operation and integrates the time frame generation, histogram building and buffering functionalities in a single PCI board, resulting in a fast, compact and cost-effective data acquisition solution for the Spanish beamline BM16 at ESRF.

A PCI DAQ board for MWPC detectors with high-rate 2D delay line position readout

For high rate thermal neutron (and e.g. also synchrotron radiation) detection a PCI data acquisition (DAQ) board for readout of two-dimensional position-sensitive multi-wire proportional chamber (MWPC) detectors with delay line position encoding was developed, and a first series of boards was produced and tested. The MWPC board comprises a deadtime-less 8-channel multihit TDC chip of the F1 type with ∼120 ps LSB, a 40 MHz flash ADC, a FPGA, a FIFO, a 0.9 GFLOP DSP chip TMS320C6711 and a 256 MB histogram memory. For position encoding a position-independent start and four position-dependent stop signals are recorded from the MWPC anode and from either end of X and Y delay lines connected to the MWPC cathodes, respectively. Time-of-flight (TOF) can be measured with reference to a pulsed beam or chopper signal either with ⩾25 ns bin size for TOF ranges of up to ∼420 ms or alternatively with ∼120 ps LSB for ranges ⩽16 ms . The pulse height of the MWPC anode signal is digitized in the flash ADC for neutron-gamma and background discrimination. Hardware event filtering in the FPGA allows event rates up to 1 Mevents/s by disentangling of two events occurring within the delay line time length of e.g. 250 ns . Whilst list mode data are recorded with full rate and full resolution on the host PC disk, 1D–3D histograms can be accumulated online in the on-board HM for a fraction of the data and with reduced resolution.

Concept and realization of a fully configurable and programmable data-acquisition system for the neutron scattering instruments at SINQ

We present the basic concept and the realization of our fully configurable data-acquisition hardware for the neutron scattering instruments at SINQ. This system allows collection of the different data entities and event-related signals generated by the various detector units. It offers a variety of synchronization options, including a time-measuring mode for time-of-flight determinations. Based on configurable logic (FPGA, CPLD), event rates up to the MHz range can be processed and transmitted to a programmable online data-reduction system (Histogram Memory). It is implemented on a commercially available VME Power PC module running a real-time operating system (VxWorks).

High-speed nuclear quality pulse height analyzer for synchrotron-based applications

A high-throughput pulse height analyzer system for synchrotron-based applications requiring high resolution, high processing speed, and low dead-time has been developed. The system is composed of a 120 ns 12-bit nuclear quality analog-to-digital converter with a self-adaptive fast peak detector stretcher and a custom-made fast histogramming memory module that records and processes the digitized data. The histogramming module is packaged in a VME/VXI compatible interface. Data is transferred through a fast optical link from the memory interface to a computer. A dedicated data acquisition program matches the hardware characteristics of the histogramming memory module. The data acquisition system allows for different data collection modes. The system can acquire data in synchronization with an external trigger or operate as a standard pulse-height analyzer. Acquisition can be performed on several channels simultaneously. A two-channel prototype has been demonstrated at the Stanford Synchrotron Radiation Laboratory accelerator in conjunction with a fluorescence X-ray Absorption Fine Structure Spectroscopy experiment. A detailed description of the entire system is given and experimental data shown.

Development of a hybrid MSGC detector for thermal neutron imaging with a MHz data acquisition and histogramming system

For thermal neutron imaging at the next generation of high-flux pulsed neutron sources a large area and fourfold segmented, hybrid, low-pressure, two-dimensional position sensitive, microstrip gas chamber detector, fabricated in a multilayer technology on glass substrates, is presently being developed, which utilizes a thin composite 157Gd/CsI neutron converter. The present article focusses on the readout scheme and the data acquisition (DAQ) system. For position encoding, interpolating and fast multihit delay line based electronics is applied with up to eightfold sub-segmentation per geometrical detector segment. All signals, i.e. position, time-of-flight and pulse-height signals, are fed into deadtime-less 8-channel multihit TDC chips with 120 ps LSB via constant fraction and time-over-threshold discriminators, respectively. The multihit capability is utilized to raise the count rate limit in combination with a sum check algorithm for disentangling pulses from different events. The first version of the DAQ system uses the PCI form factor and comprises one slow control board and up to four boards for DAQ and real time histogramming with up to 2 MHz per board. Each DAQ board incorporates four TDC chips, up to 256 Mbytes of histogram memory and a 1 GFLOP DSP. The time of flight can be measured with a precision of a few LSB up to ranges >100 ms.

First result from x-ray pulse height analyzer with radial scanning system for LHD

Radial profiles of x-ray spectrum have been successfully obtained using an assembly of x-ray pulse height analyzer in large helical device. The observed profile is obtained from plasma heated by ICRF and neutral beam injection (NBI). As a detector, Si(Li) semiconductor is used with a histogramming memory and analog-to-digital converter (ADC) basically working at high counting rate up to 500 kcps. In routine operation a count rate of 62 kcps has been normally obtained with energy resolution better than 400 eV at iron Kα line. The assembly is equipped with four detectors and a radial scanning system which modulates sight lines of the detectors in major radius direction. The profiles of electron temperature and the intensity of metallic impurities have been obtained with a spatial resolution of a few centimeters. Measured electron temperature is in good agreement with that from Thomson scattering. The system is applicable to steady-state discharge. The design philosophy of the assembly and recent results on the performance tests are also presented.

Silicon array detector system for high-rate, low-noise X-ray spectroscopy

A silicon array detector system is being developed for X-ray fluorescence applications at synchrotron light sources. The detector is wire-bonded to integrated circuits which features 32 channels of charge-sensitive preamplifiers followed by variable-gain pulse shaping amplifiers. The ICs directly drive CAMAC-based A/D boards designed for this application. The data are transferred from the custom designed 16-channel ADC modules via FERABUS readout to commercially available histogramming modules and memory lookup units. The system features fully parallel signal processing to maintain high count rate capability and to preserve the position information. Special LabVIEW-based software has been developed for data acquisition and analysis. The system, currently being assembled for 64-channels, can easily be expanded by increasing the number of detection channels and hardware modules.

Real-time system for respiratory-cardiac gating in positron tomography

A Macintosh-based signal processing system has been developed to support simultaneous respiratory and cardiac gating on the ECAT EXACT HR PET scanner. Using the Lab-View real-time software environment, the system reads analog inputs from a pneumatic respiratory bellows and an ECG monitor to compute an appropriate histogram memory location for the PET data. Respiratory state is determined by the bellows signal amplitude; cardiac state is based on the time since the last R-wave. These two states are used in a 2D lookup table to determine a combined respiratory-cardiac state. A 4-bit address encoding the selected histogram is directed from the system to the ECAT scanner, which dynamically switches the destination of tomograph events as respiratory-cardiac state changes. To test the switching efficiency of the combined Macintosh/ECAT system, a rotating emission phantom was built. Acquisitions with 25 msec states while the phantom was rotating at 240 rpm demonstrate the system could effectively stop motion at this rate, with approximately 5 msec switching time between states.

A 16 × 16 pixel array detector for protein crystallography

A 2D pixel array detector prototype is being designed for static and time resolved protein crystallography. This pixel detector will significantly enhance time resolved laue protein crystallography by two or three orders of magnitude compared to existing sensors such as films or phosphor screens coupled to CCDs. The resolution in time and dynamic range of this type of detector will allow to study structural changes that occur within the protein as a function of time (concurrent readout and acquisition). The prototype consists of an array of 16 × 16 pixels of 150 × 150 μm 2 size. The individual pixel processor consists of a low-noise amplifier shaper followed by a differential threshold comparator which provides the counting of individual photons with energies above a programmable threshold. To accommodate the very high rates, above 5 × 10 8/cm 2/s, each pixel processor has a 3 bit pre-scaler which divides the event rate by 8. Overflow from the divider which defines a pseudo fourth bit will generate a readout sequence providing the pixel address. Addresses, generated locally as quantified analog signals, will be used to increment a location in an histogramming memory from which the computerized image of the Laue diagram will be generated.

Time-resolved fluorescence polarization measurements for entire emission spectra with a resistive-anode, single-photon-counting detector: The Fluorescence Omnilyzer

We report a fluorescence analyzer that records simultaneously the temporal profiles for both orthogonal linear polarizations for all wavelengths in a fluorescence emission spectrum. The Analyzer combines a resistive-anode single-photon-counting photomultiplier, imaging spectrograph, Wollaston polarizer, multiparameter analyzer with histograming memory, and standard timing electronics. The spectrograph disperses the fluorescence spectrum across the photocathode of the photomultiplier, and the Wollaston polarizer separates the spectra of the two polarizations in opposite directions from the center of the photocathode perpendicular to the direction of spectral dispersion. The locations at which each photon reaches the photocathode is determined by the ratios of the charges read from the four corners of the resistive anode. One of the two address coordinates that determine where in histogramming memory each photon is recorded is obtained by measuring the time of arrival of the photon at the detector relative to the pulse of light that excites the fluorescence. The second address coordinate is obtained by combining the most-significant bit of the location of the event along the direction on the resistive anode corresponding to the polarization of the photon with the multibit digital value indicating photon wavelength. Storing the data directly into histogramming memory permits display of the data set as it is recorded. Both the spectral and temporal calibrations of the fluorescence analyzer are independent of the polarization of the fluorescence. The ≈100 ps temporal resolution of the resistive-anode detector is well matched to the ≈1 ns full width at half-maximum pulses of light produced by the synchrotron storage ring that we use as the excitation source, but laser excitation could also be used with this detector. Recording simultaneously all of the data required for the global analysis of the time evolution of both linear polarization components of fluorescence, and thus, time-resolved anisotropy, reduces the duration of exposure of the sample to the excitation beam, hence, facilitating studies of fragile or photosensitive biological specimens.

A/D processing system for 64-element pixel detector

A new, 8/spl times/8-element pixel detector array for time resolved protein crystallography has been developed at the Lawrence Berkeley National Laboratory (LBNL). Each element has its own on-chip charge sensitive preamplifier and shaper with a peaking time of 100 ns. A total of 64 parallel analog to digital processing channels are required to support the detector. We describe a low-cost, low-power AD processing system, comprising a fast peak-sensing amplifier/stretcher, followed by a slower 12-bit ADC. Each channel also includes a histogramming memory for a fully stand-alone operation of the system. Circuit performance and test data are also presented.

High capacity, high speed histogramming data acquisition memory

A double width CAMAC DRAM store module was developed for use as a histogramming memory in fast time-resolved synchrotron radiation applications to molecular biology. High speed direct memory modify (3 MHz) is accomplished by using a discrete DRAM controller and fast page mode access. The module can be configured using standard SIMMs to sizes of up to 64M-words. The word width is 16 bit and the module can handle overflows by storing the overflow addresses in a dedicated FIFO. Simultaneous front panel DMM/DMI access and CAMAC readout of the overflow addresses is supported.

Simultaneous resolution of spectral and temporal properties of UV and visible fluorescence using single-photon counting with a position-sensitive detector

A new fluorescence spectrometer has been assembled at the U9B beamline of the National Synchrotron Light Source to allow simultaneous multiwavelength and time-resolved fluorescence detection, as well as spatial imaging of the sample fluorescence. The spectrometer employs monochromatized, tunable UV and visible excitation light from a synchrotron bending magnet and an imaging spectrograph equipped with a single-photon sensitive emission detector. The detector is comprised of microchannel plates in series, with a resistive anode for encoding the position of the photon-derived current. The centroid position of the photon-induced electron cascade is derived in a position analyzer from the four signals measured at the corners of the resistive anode. Spectral information is obtained by dispersing the fluorescence spectrum across one dimension of the detector photocathode. Timing information is obtained by monitoring the voltage divider circuit at the last MCP detector. The signal from the MCP is used as a ‘‘start’’ signal to perform a time-correlated single photon counting experiment. The analog signal representing the position, and hence wavelength, is digitized concomitantly with the start/stop time difference and stored in the two-dimensional histogramming memory of a multiparameter analyzer.

A PET camera simulator with multispectral data acquisition capabilities

The Sherbrooke positron emission tomography (PET) simulator was designed and built to investigate parameters which influence the performance of a high-resolution PET camera based on avalanche photodiode detectors. The simulator consists of a computer controlled scanning table with 32 detection channels shared between front-end cassettes and FASTBUS boards, and of a PC-based multichannel analyzer (MCA) used as a histogramming memory for multiparametric data acquisition. Tomographic data are collected by scanning one of two opposite arrays of detectors and by rotating the object in a predetermined sequence to simulate a complete ring of detectors with various sampling schemes. All acquisition parameters are programmable through digital-to-analog converters or onboard registers. Data can be acquired in several modes: calibration, where direct or coincident energy spectra from all detectors can be registered simultaneously; standard, where only energy-validated coincident events are histogrammed as lines-of-response addresses; and multispectral, where the LOR address is encoded with the energy information to provide a multiparameter histogram. Data samples obtained in these modes are presented.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A large CAMAC histogramming memory

A CAMAC histogramming-memory module with a capacity of 4194304 24-bit words is described. A modified LeCroy-bus interface is used for the input data and the CAMAC bus for readout. Fast block transfers (avoiding Q test) are supported.

特集 粉末回折法の新しい展開 １１． 湾曲型Ｘ線位置敏感検出器（ＰＳＤ）と動的構造研究

Time-resolved observations of phase transitions and solid reactions have been undertaken by angular dispersive powder diffraction at high temperature and pressure using the curved position sensitive detector (PSD) . The PSD streamer mode has a great advantage for the in situ observations of the structure changes within a few seconds because of high photon count efficiency of more than 70% and high angular resolution of 0.06° in 2θ.A Computer Aided Measurement And Control (CAMAC) System was applied to the time-resolved measurement of the diffraction intensities. An ADC having a 450MHz fast converter and histogram memory were installed in the system. The in situ observation of the pressure-induced amorphization of GeO2 using diamond anvil pressure cell and kinetic studies of dehydration of alkaline earth hydroxides at high temperature are presented in this paper.