High Component Count Research Articles

High‐frequency digitally adaptive pulse skipping modulated voltage‐mode controlled quadratic buck converter

AbstractThe quadratic buck converter is renowned for its steep step‐down capability. It encounters increased losses due to its high component count. In scenarios with light loads, switching losses become the dominant factor. Additionally, the presence of two right‐half plane zeros impairs transient response, even at high‐frequency switching operations. Incorporating this converter into the digital domain introduces an undesired phenomenon known as subharmonic oscillation, rendering the system unstable, albeit potentially mitigated over time—a drawback particularly undesirable for converters tasked with rapid load dynamics. This paper introduces an adaptive pulse skipping modulation scheme to control metal–oxide–semiconductor field‐effect transistor (MOSFET) switching actions, enhancing overall efficiency in discontinuous conduction mode. Furthermore, the effects of right half‐plane (RHP) zeros on stability are analyzed within these switching schemes. The proposed scheme is integrated with voltage‐mode control. Simulation and theoretical analyses are conducted to validate this converter. A flat efficiency of 89%to 86%for the load range of 25 to 700 mA is obtained, outperforming other existing schemes. The results demonstrate that the adaptive pulse modulation scheme effectively improves efficiency and stability in discontinuous conduction mode converters. This research provides valuable insights for optimizing power electronics systems with varying load dynamics.

Review, Properties, and Synthesis of Single-Switch Non-Isolated DC-DC Converters with a Wide Conversion Range.

The cascaded connection of power converters extends conversion ranges but requires careful consideration due to high component count and efficiency concerns, as power is processed redundantly. Furthermore, using several active switches that must be turned on simultaneously may introduce significant drive and control complexity. To overcome this limitation, single-switch quadratic DC-DC converters have been proposed in the literature as a prominent choice for various applications, such as light-emitting diode (LED) drivers. Nevertheless, the motivation behind the conception of such topologies, beyond extending the conversion ratio, remains unclear. Another unexplored issue is the possibility of obtaining single-switch versions of cascaded converters consisting of multiple stages. In this context, this work investigates the synthesis of single-switch non-isolated DC-DC converters for achieving high step-down and/or high step-up based on the graft scheme. Key issues such as the voltage gain, additional stresses on the active switches, component count, and behavior of the input current and output stage current are addressed in detail. An in-depth discussion is presented to identify potential advantages and shortcomings of the resulting structures.

A Wireless Power Transfer System With High Misalignment Tolerance and Low Component Count

A Wireless Power Transfer System With High Misalignment Tolerance and Low Component Count

Enhancing Cable Gland Design Efficiency through TRIZ-Driven Innovation

This study introduces a novel approach to cable gland design through the utilization of TRIZ tools. A cable gland serves two primary functions: retaining and sealing cables within an enclosure, while also offering secondary features such as earthing and cable protection. The number of components in a gland type is determined by functional requirements. Given its classification as a low-cost, high-volume product, the competitive edge lies in achieving reduced selling costs and simplified installation. Addressing key challenges, which include a high component count (currently nine) and a cumbersome installation process, forms the core focus of this work. The research outlines the TRIZ-guided process and methodology employed to devise inventive solutions to these issues, resulting in a component reduction from nine to four. Moreover, the study encompasses the incorporation of various constraints in the development of efficient cable gland designs, yielding several innovative concepts. The paper also introduces proposed system designs and architectures, established based on TRIZ-derived inventive principles, paving the way for subsequent system prototype development. The work underscores the accelerated problem identification and solution generation facilitated by TRIZ tools. The evolving concept is presently situated within the feasibility and design phase, effectively addressing both primary and secondary challenges through TRIZ methodologies. Keywords: Inventive Problem solving, TRIZ, Engineering Problem, Cabled land, Trimming

Three Parts Modulation and Hybrid DC Capacitor Voltage Balancing for a Single-Phase Two-Leg Five-Level NPC Inverter

Capacitor voltage unbalance in NPC multilevel inverters is an inherent challenge and has a severe effect on five and higher-level inverters. Current modulation-based voltage balancing schemes for five-level NPC inverters require a high number of switching, especially at high modulation index operations. Moreover, hardware-based voltage balancing techniques come with a high component count. This paper proposes a unique three-part modulation technique combined with a hybrid voltage balancing approach to reduce switching losses and maintain voltage balancing. The modulation is composed of different carrier-based modulations, while the hybrid balancing scheme combines modulation-based and hardware-based balancing techniques. Comparative switching loss analysis demonstrates a reduction in inverter switching associated with the modulation. While the voltage unbalance characteristics of the modulation are determined considering linear loading conditions. Furthermore, balancing capacity analysis and switching loss reevaluation are used to justify the hybrid balancing performance. The concept verification use Matlab-Simulink simulation and hardware experiments on a five-level single-phase NPC inverter setup operated at different modulation index and power factor conditions.

A novel method for hybridization of super lift luo converter and boost converter for electric vehicle charging applications

ABSTRACT The demand for electric vehicles (EVs) has increased dramatically in recent years, making it increasingly challenging to keep up with the demand for charging infrastructure. However, conventional power converters (DC–DC converters) have drawbacks such as a high component count, low voltage gain, low efficiency, and high cost. A new DC–DC multiport converter has been proposed to address these challenges by hybridizing a Super-lift Luo and Boost Converter (SLBC) with Photovoltaic (PV) and battery sources as dual inputs. The proposed Dual-Input Dual-Output (DIDO) converter offers significant advantages by super-lifting the input voltage while producing two step-up voltages, one by the Luo converter and another by the Boost converter. The SLBC uses simple structures without any additional electric circuits or transformers to generate high voltage gain and high power efficiency. To evaluate the performance of the proposed SLBC, the converter operation has been analyzed under steady-state and Continuous Current Mode conditions, and a comparison with other similar configurations has been conducted to demonstrate its benefits. Simulation and experimental results have shown that the proposed SLBC offers a considerable reduction in conduction losses compared to other SLBC converters in similar situations. Furthermore, the SLBC system provides 1.2 kW output at the charger side with 94.8% efficiency, making it a viable option for powering various EV components, including the charger, motor, lighting, and audio system, with variable voltages.

A Highly Reliable Low-Cost Single-Switch Resonant DC–DC Converter With High Gain and Low Component Count

This article presents a novel low-cost, single-switch, high-step-upresonant dc–dc converter with high reliability. The proposed converter topology comprises a low count of components and a simple structure and achieves the low ripple input current characteristic. The inductors in the resonant network participate in the resonant process rather than creating voltage spikes across the switch and likely reverse recovery problems. The circuit operates in the soft-switching condition (ZVS–ZCS conditions in the turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> and turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> transitions), leading to a significant reduction of the switching losses. Moreover, employing film capacitors instead of electrolytic capacitors reduces the size of the circuit and improves reliability. The operational principle and comprehensive steady-state analysis in the continuous conduction mode are discussed in detail, alongside the design considerations of the proposed converter. The validity of the theoretical equations is investigated via experiments, achieving maximum efficiency of 97.69% for a converter designed at the input of 24.5 V, the negative output of 200 V, and the maximum powerof 200 W.

Fully Soft-Switched Non-Isolated High Step-Down DC–DC Converter With Reduced Voltage Stress and Expanding Capability

In this article, a fully soft-switched expandable high step-down dc–dc converter is presented. In order to achieve a high step-down voltage conversion ratio and low component count, the synchronous buck and Cuk converters are integrated. Lower switches’ voltage stress is realized by splitting the input voltage, which can considerably decrease the switches’ conduction loss. Moreover, switching losses along with the reverse recovery problems are mitigated due to the soft-switching operation of all semiconductor devices. The switch utilized for soft-switching operation is also used to replace the output diode as a synchronous rectifier, which reduces the conduction loss. The mentioned features have considerably contributed to the converter efficiency. Furthermore, the converter shares a common ground between the input and the output, which is desirable in many applications, while the converter output current is continuous without adding current ripple cancellation methods. Finally, the number of converter cells can be expanded or reduced; therefore, the converter can be applied to a wide range of loads. The operating principles and analysis of the proposed converter are presented, and the results from the implemented prototype are provided to verify the converter operation and performance.

Control of a Waveshaper-MMC With Thyristor-Based Front-End Converter for Open-End Winding Variable Speed Medium-Voltage Induction Motor Drive

For variable frequency induction motor drive application, conventional modular multilevel converter (MMC) faces some issues, like high capacitor voltage ripple at low frequency, high circulating current, and high component count. This article proposes a novel configuration to address these issues, where a six-pulse thyristor-based controlled rectifier is combined with a waveshaper-based MMC (WS–MMC). Each phase of the converter consists of a WS and director valve, and then the phases are connected in series to create a common dc-link. The use of a thyristor-based controlled rectifier as a front-end converter increases reliability and reduces component count to a large extent. Unlike conventional MMC, circulating current does not exist in this converter, and the capacitor voltage ripple does not depend on the operating frequency. As a consequence, the current rating of the switching devices is reduced for the same power output, and capacitor voltage ripple at low frequency stays within the specified limit. Besides this, the component count of the proposed configuration is far less than the MMC-based topologies available so far. The operation principle, relevant control techniques, and analysis of the converter are discussed in detail in this article. The complete system is simulated in MATLAB/SIMULINK, and the performance of the control methods has been validated at different operating frequencies with various load torques. The results show satisfactory performance.

An improved seven-level switched-capacitor-based neutral-point clamped inverter

Multilevel inverters (MLIs) have seen significant growth in a variety of medium- to high-power industrial applications and have become a mature and viable solution for renewable energy systems over the past decade. The major concerns of MLIs are the high component count and the buck-type feature of the ac output voltage when used for grid-connected renewable-energy-based sources such as solar photovoltaic (PV) panels. As another option, a switched-capacitor (SC)-based inverter possessing the feature of boost ability is a prime solution to meet the requirements of ac power applications. Integrating an SC network with a neutral-point clamped (NPC) structure makes leakage current alleviation viable for transformerless PV grid-connected systems. In this article, an improved SCMLI based on the NPC structure is proposed to reduce the number of active switches and the number of switches in the charging loop, significantly reducing the power loss. It can generate seven voltage levels with voltage boosting and self-balancing of capacitors within a single-stage power conversion. The working principle of the proposed topology, circuit description, and control technique are presented. Further, the proposed inverter was compared with other recent SC topologies to show its superiority. In the end, a laboratory prototype was developed and tested for the seven-level module under steady-state and dynamic conditions to validate the practical viability of the proposed configuration. The proposed inverter’s maximum efficiency was 97.5% at 1.2 kW rated power.

Hardware implementation and performance evaluation of microcontroller-based 7-level inverter using POD-SPWM technique

Renewable energy sources are considered as inexhaustible sources for the very long-term, as they come from natural processes that are constantly replenished. However, there are a number of challenges facing renewable energy technology adoption, like the grid connecting problems. One of the main challenges relates to the grid connecting problem is the power quality issues for power converter, such as harmonics, voltage stability, and frequency fluctuation. Hence, the inverter remains the first element to be built because of its undeniable advantages in alternative continuous conversion. However, it has some disadvantages such as high component count and complex control method. This paper presents the design and implementation of a new 7-level inverter architecture with only six switches. This architecture requires fewer components compared to other 7-level inverter topologies therefore, the overall cost, control technique complexity, and conduction losses are highly reduced. A digital phase opposition disposition sinusoidal pulse width modulation (POD-SPWM) strategy using the Arduino is adopted to improve the performance of the proposed multilevel inverter (MLI) which leads to further reduction in total harmonic sistortion (THD). In this paper, the proposed inverter is tested using Proteus software and Matlab Simulink. Finally, a laboratory setup of the proposed inverter was built to validate its workability by the experimental results.

On Converter Fault Tolerance in MMC-HVDC Systems: A Comprehensive Survey

Since they were first proposed, modular multilevel converters have been strongly studied in the literature. Due to their high component count, some concerns regarding their reliability arise, and several fault-tolerance schemes have been proposed in recent years. This article presents a comprehensive survey on the converter fault-tolerance strategies for modular multilevel converter (MMC) high-voltage direct current (HVdc) systems based on the available technical literature. Some MMC-HVdc solutions adopted in industry are reviewed. This work proposes the analytical expressions to determine the maximum number of submodule failures in the MMC-HVdc system. Thereafter, the limitations of the main converter fault-tolerance schemes under submodule failures are described and critically compared. A case study is conducted based on 1000-MVA Xiamen MMC-HVdc project with ±320-kV dc-link voltage, aiming to evaluate the effect of the faulty submodules on the reliability and power losses of the converter. Finally, the remaining challenges and opportunities in the converter fault tolerance in MMC-HVdc systems are stated as well as the future directions of this field.

Open-circuit fault-tolerance in multilevel inverters with reduced component count

High component count and subsequent effects on volume and reliability have been the major concerns for practical applications of multilevel inverters (MIs). Recent emergence of the so-called reduced component count MIs (RCC-MIs) has been driven by the attempts to reduce the number of power switches for multilevel power conversion. In many of such topologies, the aspect of fault tolerance has not been given full consideration. In this work, some of the recently proposed RCC-MI topologies have been considered and analyzed in the light of imparting fault tolerance capability in the case of open-switch failure of any one of the power switches. In an RCC-MI, the occurrence of an open-circuit fault in a power switch would often lead to shut down due to the lack of redundant switching states. To overcome these occurrences, an optimal addition of power switches is described in this work so that the desired redundant states can be synthesized. The modified RCC-MI topologies so obtained have been analyzed under the normal and faulty conditions and computer simulations have been carried out using MATLAB/Simulink, and corresponding results have been presented. The results so obtained are experimentally validated to prove the feasibility of the proposed fault-tolerant topologies.

Single‐phase high‐voltage gain switched LC Z‐source inverters

Recently, switched-inductor Z-source inverters (SL-ZSIs) have been reported to achieve high-voltage gain and good power inversion operation at low shoot-through duty ratio D as compared to conventional ZSI. As the SL-ZSIs have high passive component count, weight, volume and losses of the system increases that lead to reduction in efficiency. To address the issues of conventional ZSI and SL-ZSIs, two single-phase switched LC (SLC)-ZSIs (Type 1 SLC-ZSI and Type 2 SLC-ZSI) are proposed in this study to achieve high-voltage gains at low values of D with lower passive component count as compared to SL-ZSIs. At low values of D , modulation index M approaches to higher values which results into improved AC output at reduced harmonic distortion. Due to low passive component count in the proposed inverters, weight, volume and losses decreases resulting into increase in efficiency. The proposed inverters can be used in various DC-AC and DC-DC power conversions in renewable energy applications due to their high-voltage gain, better immunity to EMI noise and higher reliability. The detailed steady-state analysis of the two proposed SLC-ZSIs is given in this study. Scaled down experimentation has been carried out to verify the performance of the proposed inverters.

Design and Optimization of an Efficient (96.1%) and Compact (2 kW/dm3) Bidirectional Isolated Single-Phase Dual Active Bridge AC-DC Converter

The growing attention on plug-in electric vehicles, and the associated high-performance demands, have initiated a development trend towards highly efficient and compact on-board battery chargers. These isolated ac-dc converters are most commonly realized using two conversion stages, combining a non-isolated power factor correction (PFC) rectifier with an isolated dc-dc converter.This, however, involves two loss stages and a relatively high component count, limiting the achievable efficiency and power density and resulting in high costs. In this paper, a single-stage converter approach is analyzed to realize a single-phase ac-dc converter, combining all functionalities into one conversion stage and thus enabling a cost-effective efficiency and power density increase. The converter topology consists of a quasi-lossless synchronous rectifier followed by an isolated dual active bridge (DAB) dc-dc converter, putting a small filter capacitor in between. To show the performance potential of this bidirectional, isolated ac-dc converter, a comprehensive design procedure and multi-objective optimization with respect to efficiency and power density is presented, using detailed loss and volume models. The models and procedures are verified by a 3.7kW hardware demonstrator, interfacing a 400Vdc-bus with the single-phase 230V,50Hz utility grid. Measurement results indicate a state-of-the-art efficiency of 96.1% and power density of 2 kW/dm3, confirming the competitiveness of the investigated single-stage DAB ac-dc converter.

Characterization of Circuit Blocks for Configurable Analog-Front-End

Analog functions have been implemented in a Silicon-on-Insulator (SOI) process optimized for high-temperature (&amp;gt;225°C) operation. These include a linear regulator/reference block that supports input voltages up to 50V and provides multiple independent voltage outputs. Additional blocks provide configurable sensor excitation levels of up to 10V DC and/or 20V AC-differential, with current limiting and monitoring. A dual-channel Programmable-Gain-Instrumentation Amplifier (PGIA) and a high-level AC input block with programmable gain and offset serve signal conditioning, gain, and scaling needs. A multiplexer and analog buffer provide an output that is scaled and centered for down-stream A-to-D conversion. Limited component availability and high component counts deter development of sensing and control electronics for extreme temperature (&amp;gt;200°) applications. Systems require front-end power conditioning, sensor excitation and monitoring, response amplification, scaling, and multiplexing. Back-end Analog-to-Digital conversion and digital processing/control can be implemented using one or two integrated circuit chips, whereas the front-end functions require component counts in the dozens. The low level of integration in the available portfolio of SOI devices results in high component count when constructing signal conditioning interfaces for aerospace sensors. These include quasi-DC sensors such as thermo-couples, strain-gauges, bridge transducers as well as AC-coupled sensors and position transducers, such as Linear Variable Differential Transducers (LVDT's). Furthermore, a majority of sensor applications are best served by excitation/response voltage ranges that typically exceed the voltage range of digital electronics (either 5V or 3.3V in currently available digital IC's for use above 200°C). These constraints led Embedded Systems LLC to design a generic device which was implemented by Honeywell as an analog ASIC (Application Specific Integrated Circuit). This paper will describe the ASIC block-level capabilities in the context of the typical applications and present characterization data from wafer-level testing at the target temperature range (225C). This material is based upon work performed by Honeywell International under a subcontract from Embedded Systems LLC, funding for which was provided by the U.S. Air Force Small Business Innovative Research program.

Cost and losses associated with offshore wind farm collection networks which centralise the turbine power electronic converters

Costs and losses have been calculated for several different network topologies, which centralise the turbine power electronic converters, in order to improve access for maintenance. These are divided into star topologies, where each turbine is connected individually to its own converter on a platform housing many converters, and cluster topologies, where multiple turbines are connected through a single large converter. Both AC and DC topologies were considered, along with standard string topologies for comparison. Star and cluster topologies were both found to have higher costs and losses than the string topology. In the case of the star topology, this is due to the longer cable length and higher component count. In the case of the cluster topology, this is due to the reduced energy capture from controlling turbine speeds in clusters rather than individually. DC topologies were generally found to have a lower cost and loss than AC, but the fact that the converters are not commercially available makes this advantage less certain.

Feasibility Issues of using Three-Phase Multilevel Converter based Cell Balancer in Battery Management System for xEVs

The use of a three-phase (3-ŕ) multilevel converter (MLC) as an integrated cell balancer and motor driver is investigated for 3-ŕ AC applications in EVs/HEVs/PHEVs. The paper analyzed an issue of additional battery losses caused by the flow of reactive and/or harmonic power from each power cell of the 3-ŕ MLC battery system. The paper also investigates the size of shunt capacitor required for compensation of the losses to acceptable level. This study concludes that the size of the required capacitor is too big for the vehicle application unless some other active compensation is used as well. Another practical way to employ the MLC as a cell balancer is to use it in a cascaded connection with the conventional 3-ŕ two-level voltage source inverter however it may not be a cost-effective solution either due to high component count.

고효율 DC/DC 컨버터용 전류분할과 시분할 스위치 비교 연구

This paper presents a comparative analysis of the parallel operation of different switches in a DC/DC converter. In high power applications, multi-switch PWM power conditioners may be preferred despite a higher component count, due to the absence of low frequency filters, reduced switching losses and fault tolerance. The paper demonstrates how current sharing (CSH) and time sharing (TSH) lead to the reduction of switching stress in the parallel operation of switches in any converter. The solutions proposed in this study can be applied on different scales to other power conditioners for DC/DC converter systems. Discussions of the concepts, hypotheses and computer simulations are verified by 1 kW experimental results.

Defining the Metabolic Syndrome Construct

It is controversial whether the clustering of certain metabolic abnormalities should be separately designated as the metabolic syndrome. We operationalized the "syndrome" concept and tested whether the metabolic syndrome was compatible with these operational constructs. The baseline cross-section of the Multi-Ethnic Study of Atherosclerosis recruited a population-based cohort of 6,781 individuals, aged 45-84 years, from six communities in the U.S. Metabolic syndrome components (waist circumference, blood pressure, fasting serum HDL cholesterol, triglycerides, and plasma glucose), homeostasis model assessment (HOMA) of insulin resistance (fasting glucose x insulin), and intimal-medial thickness (IMT) in the common and internal carotid arteries by B-mode ultrasound were measured. Higher syndrome component count is associated with higher HOMA levels (trend P < 0.001). Given the prevalence of individual components, the nonprevalence of any component or the co-prevalence of four or five components is greater than expected (chi2 P < 0.001). After accounting for the additive association of each component, the current definition of metabolic syndrome (co-prevalence of three or more components) does not have supra-additive association with thicker IMT in the common carotid (men: P = 0.075, women: P = 0.949) or internal carotid artery (men: P = 0.106, women: P = 0.121). The metabolic syndrome did not have supra-additive association with IMT, but its components clustered greater than chance expectation and a higher component count was associated with greater insulin resistance. The metabolic syndrome was compatible with two of three "syndrome" constructs tested.