Higher Aggregate Bit Research Articles

Cryogenic C-band wavelength division multiplexing system using an AIM Photonics Foundry process design kit.

Cryogenic environments make superconducting computing possible by reducing thermal noise, electrical resistance and heat dissipation. Heat generated by the electronics and thermal conductivity of electrical transmission lines to the outside world constitute two main sources of thermal load in such systems. As a result, higher data rates require additional transmission lines which come at an increasingly higher cooling power cost. Hybrid or monolithic integration of silicon photonics with the electronics can be the key to higher data rates and lower power costs in these systems. We present a 4-channel wavelength division multiplexing photonic integrated circuit (PIC) built from modulators in the AIM Photonics process development kit (PDK) that operate at 25Gbps at room temperature and 10Gbps at 40K. We further demonstrate 2-channel operation for 20Gbps aggregate data rate at 40K using two different modulators/wavelengths, with the potential for higher aggregate bit rates by utilizing additional channels.

Overview of the FABULOUS EU Project: Final System Performance Assessment With Discrete Components

In this paper, we present the most comprehensive system demonstrator realized so far inside the FABULOUS project, an EU 7th Framework Program European research project. The architecture proposed in FABULOUS is based on frequency division multiplexed PON and uses a self-coherent and reflective approach in the upstream. The demonstration presented in this paper uses discrete optoelectronics components. We will show system experiments realized with five active optical network units, together with the emulation of other 27 ONUs ASE noise, demonstrating that such network is capable of an upstream transmission of 32 Gb/s over 40 km of dark fiber and an attenuation of 31 dB, in compliancy with ODN class N2 of the latest PON standards. In addition, we will demonstrate, thanks to the flexibility of frequency multiplexing, that the network can adapt its performances to the link conditions, achieving higher aggregate bit rates or higher losses depending on the link quality that every user in the network experiences. To conclude, we will investigate on the feasibility of the required digital signal processing onto FPGA or ASIC platforms.

How to minimize the TCP effect in a UMTS‐HSDPA system?

AbstractThis paper focuses on the interaction between the transmission control protocol (TCP) layer and the radio interface in a 3G wireless system. An analytical model to evaluate the impact of TCP on the UMTS‐HSDPA capacity is presented. A method to minimize the effect of TCP on wireless networks using shared channels is also proposed. High speed downlink packet access (HSDPA) is an evolution of the UMTS standard over the air interface to achieve higher aggregate bit rates through the introduction of adaptive modulation and coding, hybrid automatic repeat request (ARQ), fast scheduling, fast cell selection, and multiple input multiple output (MIMO) (space time coding and blast) techniques. The proposed model is used to evaluate the effect of the TCP protocol on the bit rate of various data services (at 64 and 128 kbps). As expected, the bit rate per flow decreases strongly if the congestion frequency in the wired network increases. However, the overall capacity achieved by HSDPA is not as affected by the TCP layer. Using this result, a method to maintain the bit rate per TCP flow at a given value without loosing much cell capacity is proposed. The findings are supported by simulation results. Copyright © 2005 John Wiley & Sons, Ltd.