High Voltage Direct Current Circuit Breakers Research Articles

New multi-injection commutation topology for circuit breakers of HVDC transmission lines

Power-sharing between countries has an essential effect on increasing the power system’s reliability and allowing a resilient energy market. High voltage direct current (HVDC) transmission systems are preferable for long-distance transmission to decrease power losses. However, HVDC transmission lines have many protection challenges including the differentiability between various types of HVDC circuit breakers (HVDC-CB). Although mechanical HVDC-CBs suffered from long response time, they superseded their solid-state counterparts in terms of price and power losses. In this paper, a multi-injection commutation system MICS-HVDC-CB is developed to provide economic and fast response HVDC-CB. The proposed breaker doesn’t add external elements to avoid any price increase but instead modifies the existing topology. The MICS consists of multiple L–C commutation circuits inserted sequentially following the receiving of the tripping signal. The proposed MICS-HVDC-CB was tested upon a real transmission line using ATP simulation software. The results emphasize that the developed MICS-HVDC-CB decreased the arcing time to 38.5% and 20% compared to passive and active DC-CBs. The impact of cooling power, arcing time constant, and fault resistance was also investigated. The results showed the effectiveness of the proposed MICS topology in reducing the arcing time while keeping a simple and economic breaker structure.

Reconfigurable Large-Current and High-Voltage Test Bench for HVDC Circuit Breaker Verification

This article presents a novel circuit configuration of a high-voltage direct current circuit breaker (HVdcCB) test bench that is based on a modified H-bridge modular multilevel cascaded converter (MMCC). The modified MMCC is composed of fewer H-bridge cells, and it can be reconfigured during operation to allow the proposed test bench to output large current or high voltage for the current breaking and dielectric withstand tests. Although simultaneous output of large current and high voltage is not possible, the maximum transient interrupt voltage (TIV) withstand test can be performed with reduced ratings. The controllable output allows generation of complex waveforms to simulate a wide range of fault conditions. Furthermore, the modified MMCC has some inherent safety features that can reduce the need for additional protective equipment in case of operational failure of the HVdcCB. In contrast, the conventional charged capacitor and inductor-based designs cannot generate arbitrary waveforms, are only suitable for current breaking tests, and require additional circuits to generate initial conditions for the HVdcCB. AC short-circuit generator-based designs offer one degree of freedom for control of the output waveforms and can sustain the maximum TIV withstand test. However, the ac output is unsuitable for the dielectric withstand test, and additional circuits are required to provide initial conditions for the HVdcCB. The proposed test bench circuit configuration is verified using a downscaled experimental test bench that consists of a total of nine H-bridge cells with an equivalent switching frequency of 92.5 kHz.

A High-Efficiency Protection Circuit Integrating Semi-Soft Switching and Voltage Limiting Functions for Solid-State Switch Applications

Despite the high performance of high-voltage direct current circuit breaker (CB) technology, its high cost restricts its further development. Thus, this article proposes a high-efficiency protection circuit for solid-state switches (SSs) that integrates semisoft switching and voltage limiting functions. The protection circuit also does not resonate with the system inductance which in turn does not affect the reclosing operation of the CB. The novel SS scheme reduces the cost and simplifies the layout of the SS. The special constraints for the parameter design of power electronics, gaps, and metal oxide varistors (MOVs) are proposed in this article for the first time, and a parameters design method that solves the transient power shock and voltage spike problems during the large current breaking process under multiple constraints is formed. Finally, an SS prototype is developed to verify the feasibility and the strong surge and turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> ability of the novel SS and to test the robustness of the series-connected gapped-MOV circuits.

Research on the Transient Interrupting Voltage of Mechanical HVDC Circuit Breaker and Its Influences on the Postarc Dielectric Recovery Process

The flexible high-voltage direct current (HVDC) power system develops quickly with the large-scale utilization of new energy and the increase of direct current (dc) loads in recent years. HVDC circuit breakers are very important components in the flexible HVDC power system. The mechanical HVDC circuit breaker including vacuum interrupters is a potential solution for HVDC interruption. After the current interruption, a transient interrupting voltage (TIV) generated from the interaction with the external circuit will be applied to the mechanical HVDC circuit breakers and might cause a failure interruption. However, there are still few studies about the influences of TIV on the postarc dielectric recovery process of mechanical HVDC circuit breakers. In this article, a circuit model based on the simplification of a 10-kV mechanical HVDC circuit breaker is developed for the purpose of studying the characteristics of TIV. Then the effects of the parallel snubber circuit on the TIV are discussed. Moreover, the influence of TIV on the postarc residual plasma dissipation process is simulated by a particle-in-cell (PIC) model. The results show that the TIV with a parallel snubber circuit has little effect on the whole dissipation time compared with that without a parallel snubber circuit. It should be noted that the microdissipation processes of the above two situations are different.

Dual-Circuit-Based Test Bench Design for HVDC Circuit Breaker Verification

High-voltage direct current (HVDC) circuit breaker development and deployment strongly depend on the testing process, which ensures that the HVDC circuit breakers will satisfy design requirements. This article presents an HVDC circuit breaker test bench circuit configuration that can provide controllable large output currents to simulate different fault conditions for the current breaking test and high output voltage for the dielectric withstand test. The current breaking test circuit is based on multiple cascaded power converters connected in parallel to provide the necessary output current capability. Each cascaded power converter is composed of multiple cells that are operated by a phase-shifted pulsewidth-modulated signal for greater controllability and higher quality of the output waveform. The dielectric withstand test circuit is a simple high-voltage source with a low power rating that can also be used to charge the test bench and the internal circuitry of the circuit breaker that is to be tested. The proposed test bench ensures that fault conditions can be replicated accurately and offers greater flexibility by being able to test mechanical, semiconductor-based, or hybrid HVDC circuit breakers with different current and voltage ratings on the same hardware without any changes. The idea and the operating principle of the proposed test bench are verified experimentally on a downscaled system that consists of three cascaded power converters connected in parallel with three cells per cascaded power converter and with a total equivalent switching frequency of 92.5 kHz.

Performance of a protection system for DC grids

The development of High Voltage Direct Current (HVDC) transmission technology is still challenging due to unresolved technical issues, mostly in terms of protecting the system. The overcurrents and voltage drop produced by fault conditions are severely dangerous to the Voltage Source Converters’ (VSC) electronic components. Hence, fast protection systems are needed. This paper proposes a fullselective protection system in conjunction with hybrid HVDC circuit breakers. This protection system employs the rate-ofchange-of-voltage and the differential-current algorithms for primary and backup fault protections. This protection scheme is applied to a HVDC grid and an analysis of its performance is presented. This system is evaluated with several fault scenarios that include different fault characteristics. The rate-of-change-ofvoltage algorithm’s fast operation and the differential-current algorithm’s high selectivity are verified.

Modelling of Resistive Type Superconducting Fault Current Limiter for HVDC Grids

The protection of high voltage direct current (HVDC) grids is a challenge considering that the protection system must detect, locate, and interrupt large fault currents in a few milliseconds. Resistive type superconducting fault current limiters (R-SFCL) can help solve that difficult task, reducing the extremely demanding ratings of HVDC circuit breakers. This paper presents different approaches to model R-SFCLs in order to analyze their suitability for assessing the performance of HVDC grid protection, including the step model, the exponential model, the RQ model, and the magneto-thermal model. In the first instance, the R-SFCL models are evaluated in a test grid to analyze their parameterisation and select the most adequate model for the study of HVDC grids. The RQ model is finally chosen for its simplicity but closer behavior to the magneto thermal model in terms of fault resistance dependency and resistance evolution curve. Then, the performance of an RQ type R-SFCL model in conjunction with a mechanical circuit breaker is evaluated in a multiterminal HVDC grid with different fault cases. This way, fault currents are greatly decreased as well as circuit breaker requirements. Hence, the R-SFCL under study enables a reliable protection of the HVDC grid.

Design and Analysis of a Novel HVDC Circuit Breaker Test Bench Based on an H-Bridge Cell MMCC

This paper proposes a novel circuit configuration for a high-voltage direct-current circuit breaker (HVDCCB) test bench that differs significantly from conventional test benches. The proposed test bench consists of a modular multilevel cascaded converter (MMCC) that is based on H-bridge cells, an output inductor, and an auxiliary capacitor bank. The proposed test bench is capable of generating controllable output currents up to several kiloamperes and output voltages up to several hundred kilovolts because each MMCC cell is operated by phase-shifted pulse-width-modulated (PSPWM) signals. Consequently, the proposed test bench can simulate a wide range of fault conditions within hardware limitations to test different HVDCCB types with various current and voltage ratings. The flexibility of the proposed test bench is complemented by a longer service lifetime with inherent circuit protection in the case of operational failure of the HVDCCB. The concept of the proposed test bench is verified experimentally on a downscaled test bench that consists of nine H-bridge cells and operates at an equivalent switching frequency of 92.5 kHz.

Significance of fault-current-limiters and parameters optimization in HVDC circuit breakers for increased capacity of VSC-HVDC transmission networks application

The voltage and current ratings of the voltage source converter (VSC) based high voltage direct current (HVDC) transmission line projects have increased over the years. It testifies the increasing popularity of VSC-HVDC technology. Since the long-distance, VSC-HVDC transmission lines are more exposed to commonly appearing short circuit faults; thus, protection equipment with increased fault-current handling capability is required. The DC circuit breakers (DCCBs), with or without fault current limiters (FCLs), can effectively handle the fault-current. The variations in VSC-HVDC projects’ ratings and their impact for DCCB with FCL and without FCL are thoroughly analysed in this paper. The paper further includes an in-depth discussion on DCCBs with FCL and without FCL. An equivalent circuit modelling approach is used for simulation analysis of three case studies under the influence of these breakers to analyse current behaviour; the case studies include the Zhoushan HVDC Project, Xiamen HVDC Project, and Zhangbei-I HVDC Project. All these projects have different capacities in terms of their power, voltage, and current ratings. For DCCBs, this paper includes a detailed analytical model to understand the fluctuations in the size of fault-current limiting components (in DCCBs) for increased fault-current handling requirements. The simulation results using PSCAD/EMTDC and MATLAB are presented to verify different aspects of this study. A small scale laboratory prototype is also developed to validate the performance of DCCB with and without FCL. Based on theoretical, simulation, and experimental validations, it is substantiated that for increased VSC-HVDC projects’ ratings, DCCB with FCL can perform better compared to conventional DCCB without FCL.

Transient Recovery Voltage in Direct Current Circuit Breaker With Active Current Injection

Analysis of transient recovery voltage is essential to develop high-voltage direct current circuit breakers with active current injection technology. This study presents a theoretical analysis of the transient recovery voltage using the Laplace transform, thereafter the value of the transient recovery voltage obtained using this analytical equation is compared to measured reference values. It is found that the analytical transient recovery voltage is given by the sum of a linear function and a damped oscillation function. The amplitude of the damped oscillation is reduced by the resistance of post-arc plasma; therefore, it is necessary to consider the resistance owing to post-arc plasma to evaluate the transient recovery voltage accurately.

HVDC Circuit Breakers: A Comprehensive Review

High voltage direct current (HVDC) systems are now well integrated into AC systems in many jurisdictions. The integration of renewable energy sources (RESs) is a major focus and the role of HVDC systems is expanding. However, the protection of HVDC systems against DC faults is a challenging issue that can have negative impacts on the reliable and safe operation of power systems. Practical solutions to protect HVDC grids against DC faults without a widespread power outage include: 1) using DC circuit breakers (CBs) to isolate the faulty DC-link, 2) using a proper converter topology to interrupt the DC fault current, and/or 3) using high-power DC transformers and DC hubs at strategic points within DC grids. The application of HVDC CBs is identified as the best approach that satisfies both DC grids and connected AC grids’ requirements. This article reports a comprehensive review of HVDC CBs technologies, including recent significant attempts in the development of modern HVDC CBs. The functional analysis of each technology is presented. Additionally, different technologies based on information obtained from literature are compared. Finally, recommendations for the improvement of CBs are presented.

Modularization design methodology for high-voltage mechanical DC circuit breaker with current commutation drive circuit

With rated voltage of multi-terminal direct current (MTDC) power transmission system varying from ±160 kV to ±500 kV and even ±800 kV, high-voltage direct current circuit breaker (DCCB) is in urgent demand. With remarkable features of low operating losses, free-maintenance, and relative small investment, DCCBs based on mechanical vacuum switch (MVS) and current commutation drive circuit (CCDC) are recognized to have bright prospects in practical engineering. However, parameters design and serial topology selection for high-voltage mechanical DCCB with CCDC are still open problems. Motived by this, parameter design method for a modularized DCCB with CCDC is proposed. Then, parameters of 500 kV DCCBs with two typical serial topologies, namely, modularized serial topology and integrated serial topology, are optimized, and simulations are conducted in PSCAD/EMTDC for verification. In the end, performances of the two serial topologies, including dynamic voltage balancing, fault-tolerance capability and cost, are discussed. According to research results, modularized design methodology is recommended for high-voltage DCCB with CCDC.

Design of Robust MMC Controls Considering HVDC Grid Protection: Small Signal-Based Tuning

In High Voltage Direct Current (HVDC) grids, system parameter and/or topology changes following HVDC grid protection actions affect system dynamics and in combination with the existence of line inductors in series with HVDC circuit breakers (DCCB), pose a challenge to designing converter controls that satisfy desired performance and stability requirements. To date, several methods have been proposed for evaluating the influence of the line inductors on system stability; however, tuning of the MMC controls considering system parameter and/or topology changes following HVDC grid protection actions haven’t been studied in detail. This paper presents a systematic tuning procedure for a robust operation of MMCs in any HVDC grid configuration. The proposed method analyzes the impact of variations in HVDC grid system parameters and control bandwidths (BWs) using small-signal based stability analysis and Singular Value Decomposition (SVD)-based performance analysis methods. In addition, it considers the impact of line outages associated with HVDC grid protection actions in order to select optimal control gains that fulfill performance and stability requirements of the HVDC grid for given HVDC Circuit Breakers (DCCBs) line inductor values. To illustrate the proposed methodology, a detailed step-by-step stability analysis in a 4-terminal HVDC grid test system is presented.

Cascaded HVDC gaseous circuit breaker performance using black box arc model

The development of renewable sources of electrical energy represents the main goal of the most countries. This energy has to be transmitted for a long distance for the utilization in populated areas. The need of high-voltage direct current circuit breakers represents the key of the development of high-voltage direct current transmission systems. High and extra high-voltage six sulfur hexafluoride circuit breakers need more than one interrupter to be stable during arc extinguishes, so it can be used in high-voltage systems as cascaded interrupters. In this article, the multi-break high-voltage direct current HVDC gaseous circuit breaker characteristic is investigated by employing Mayr and Cassie arc models. The influences of the models parameters on the arc interruption time are studied using MATLAB/Simulink program. It is concluded that the simulated results by employing black box arc models achieve a success in multi-break HVDC gaseous circuit breakers simulation. Employing BBAMs black box arc models has proved more flexibility to study the effect of different controlled and uncontrolled parameters on the multi-break high-voltage direct current gaseous circuit breaker HVDCGCB arcing time. That has proved more flexibility to study the effect of different controlled and uncontrolled parameters on the arcing time. The main contributions of this article in points can be summarized as employing black box arc models achieves a success in multi-break HVDC gaseous circuit breakers simulation, investigation of the influence of commutation parameters on the cascaded HVDC gaseous circuit breaker interrupter performance, the controlled and uncontrolled parameters affecting the arcing time of HVDCGCB has been studied, the impact of the fault resistance value on arcing time and the damping resistance influence on the transient recovery voltage are investigated, and additionally, the initial transient interruption and the Metal Oxide Varistor voltages are analyzed. From the investigated forty cases done to check the Mayr’s model validity in the HVDC CD simulation, it is found that the values of P and τ which give acceptable outputs are at τ = 10−6 s, and P in range of 107 W to 1011 W. The output of the case τ = 10−6 s, P = 1010 W, which is introduced in the paper has proved that when τ reached to 10−7 s the MOV current rises and drops and thereafter rises and gradually decreases. This may leads to CB failure Com parameters influence on the interrupter performance are investigated and proved good simulation of the gaseous circuit breaker interrupter.

HV isolated power supply system for complex multiple electrical potential equipment in 500 kV hybrid DC breaker

High-voltage direct current circuit breakers (HVDC CB) are one of the key technologies of multi-terminal DC systems and DC grids. Different from other equipment that use a large number of power electronic devices, the HVDC CB cannot obtain its power from the primary system at high potential, making the power supply of the complex multiple electrical potential equipment in HVDC CB a challenge. In this study, the authors propose an HV isolated power supply system based on the multi-output high-frequency isolated power supply unit and the cascaded isolation transformer network. This power supply system can support the 500 kV CB to turn-off 25 kA current with 800 kV overvoltage.

A study of multi-break HVDC gaseous circuit breaker performance by using black box arc model

The development of the renewable energy and the need of medium- and high-voltage direct current circuit breakers are the keys in the development of medium- and high-voltage transmission systems. It can be used in high-voltage systems as cascaded interrupters. In this paper, the cascaded interrupters of gaseous circuit breakers are simulated using black box arc models. The influences of the models parameters on the arc interruption time are studied. MATLAB/Simulink program is employed to carry out this study. It is concluded that the simulated results by employing black box arc models achieve a success in multi-break HVDC gaseous circuit breakers simulation. Employing BBAM models has proved more flexibility to study the effect of different controlled and uncontrolled parameters on the multi-break HVDCGCB arcing time. That has proved more flexibility to study the effect of different controlled and uncontrolled parameters on the arcing time. From the investigated forty cases done to check the Mayr’s model validity in the HVDC CD simulation, it is found that the values of P and $$ \tau $$ which give acceptable outputs are at $$ \tau = 10^{ - 6} \;{\text{s}} $$ , and P in range of 107–1011 W. The output of the case $$ \tau = 10^{ - 6} \;{\text{s}} $$ , P = 1010 W, which is introduced in the paper has proved that when $$ \tau $$ reached to 10−7 s, the MOV current rises and drops and thereafter rises and gradually decreases. This may lead to CB failure; Com parameters influences on the interrupter performance are investigated and proved good simulation of the gaseous circuit breaker interrupter. The commutation parameters affecting the interrupter performance are investigated. Investigation of the change in the fault arc resistance and the fault location on the DC line on the arcing time is presented. Finally the impact of the changing of fault resistance value on arcing time and the damping resistance influence on the transient recovery voltage is also investigated. Additionally, the initial transient interruption and the metal oxide varistor voltages are analyzed.

Interruption limits of mechanical circuit breakers and circuit upgrades for current injection in HVDC circuit breakers

Current injection circuit breakers consist of a mechanical interrupter (MI) with a current injection and an energy dissipation branch in parallel. The performance of the complete device is largely determined by mechanical operation time and interruption performance of the MI. In the standard configuration, current injection is realised using a pre-charged inductor–capacitor circuit. A higher interruption performance of the MI makes it possible to scale down the resonant injection circuit, and thus have a more economical design. Additionally, the implementation of more complex injection circuits that quickly create zero crossings, while maintaining favourable conditions for interruption, can lead to economic benefits. In this study, the interruption performance of a model gas interrupter as part of a current injection topology is investigated. The results are used to verify a corresponding simulation model and two-dimensional upgrade circuits that influence the injection current to increase the range of interruptible fault currents. On the basis of experimental results, the simulation model is used to investigate the performance of upgrade circuits for the use in high-voltage direct current (HVDC) systems. The results indicate that using improved injection circuits can considerably increase the economic advantage of current injection circuit breakers compared with other topologies.

HVDC Circuit Breaker Development and Applications in VSC-HVDC Transmission Project

High voltage direct current (HVDC), especially voltage source based HVDC (VSC-HVDC), transmission technology has been expanding in recent decades. HVDC circuit breaker therefore attracts significant interest due to its abilities of current interruption and fault isolation. This paper aims to present the technical development, specifically the topology, control and protection technology and test technology, of HVDC circuit breaker and its applications in VSC-HVDC transmission project. The project background, system configurations, and circuit breaker topology are described for each project. Based on current circuit breaker development and applications, the challenges and associated future development are also presented.

Challenges for Protection of Future HVDC Grids

Nowadays, high voltage direct current (HVDC) transmissions are gaining relevance in long distance and renewable energy integration projects over the conventional alternating current (AC) transmissions due to several advantages as improved flexibility and independent active and reactive power controllability. Despite that, the high currents and voltage collapses generated by fault conditions in HVDC systems imply some unresolved technical challenges regarding the detection, location and clearance of faults. Faults have to be cleared in a very short time range in order to minimize their impact on the system. For this objective, very fast protection algorithms and reliable HVDC circuit breakers are required. This paper focuses on the technical challenges and limitations of HVDC protection systems. This way, protection requirements and different types of measurement devices are considered. Protection algorithms are classified into local-measurement-based and communication-based, highlighting the most important characteristics. In addition, the different technologies of HVDC circuit breakers are compared. Finally, the characteristics and effects of the different available fault-clearing strategies are presented.

An IEGT Model for Analyzing the High Current Turn-off Characteristics in DC Circuit Breaker Applications

The direct current (DC) circuit breaker based on semiconductor power devices is one of the critical components in multiterminal flexible high voltage DC transmission technology. A press pack injection enhanced gate transistor (IEGT) can realize a low on-state voltage similar to a gate turn-off (GTO) thyristor while achieving better high current turn-off capability and wider safety operating area than an IGBT. Therefore, an IEGT is a promising candidate for high voltage DC circuit breaker applications. The fault current conducted by devices in DC circuit breaker applications is 4~6 times the device rated current, which brings great risks to reliable operation. Optimizing the device turn-off characteristics and then realizing reliable operation are indispensable parts of DC circuit breaker design. For analyzing the high current turn-off characteristics under the working conditions of a DC circuit breaker, an IEGT model is proposed in this paper. In the model, a simple method for predicting the static-state I-U characteristics is established. In addition, based on the differences in the gate structures of IEGTs and IGBTs and the influence of the gate structure on the nonlinear capacitances between device terminals, the nonlinear capacitances are greatly improved to better describe the turn-off transient process. Subsequently, the model is verified by experiments. The model is expected to be a convenient simulation tool for designing a high voltage DC circuit breaker with IEGTs.