High-speed Pattern Recognition Research Articles

All-Optical Multiplexed Meta-Differentiator for Tri-Mode Surface Morphology Observation.

Current optical differentiators are generally limited to realizing a single differential function once fabricated. Herein, a minimalist strategy in designing multiplexed differentiators (1st - and 2nd -order differentiations), implemented with a Malus metasurface consisting of single-sized nanostructures is proposed, thus improving the functionality of optical computing devices without the cost of complex design and nanofabrication. It is found that the proposed meta-differentiator exhibits excellent differential-computation performance and can be used for simultaneous outline detection and edge positioning of objects, corresponding to the functions of the 1st - and 2nd -order differentiations respectively. Experiments with biological specimens showcase that boundaries of biological tissues can not only be identified, but also the edge information for realizing high-precision edge positioning is highlighted. The study provides a paradigm in designing all-optical multiplexed computing meta-devices, and initiates tri-mode surface morphology observation by combining meta-differentiator with optical microscopes, which can find their applications in advanced biological imaging, large-scale defect detection, and high-speed pattern recognition, etc.

Experimental demonstration of 84 Gbps QPSK signal’s 4-symbol all-optical pattern recognition

In the F5G era, a promising all-optical processing technology named all-optical pattern recognition has attracted more and more attention. Its applications include not only all-optical header recognition or address recognition in OCDMA but also optoelectronic firewalls. The higher the recognition rate of pattern recognition, the higher the processing rate of both applications can reach. To meet the development features of eFFB in F5G, high-speed all-optical pattern recognition should be achieved. In this paper, a QPSK all-optical pattern recognition system with a data rate of up to 84Gbps is proposed, analyzed, and experimentally demonstrated by employing commercial independent optical components. The system first converts the I branch of the input QPSK signal to a positive and a negative IM signal by adding the coherent carrier from the orthogonal polarization. Then the converted IM signals are coupled into time delay lines and optical AND logic gates implemented by HNLFs to achieve the optical correlation operation. In the end, a high-level optical pulse indicating the pattern recognized result is output. Numerical simulation results reveal that the proposed system can recognize the target sequence from the I branch of the input sequence and the position of the output high-level pulse in the time window of the I branch of the input sequence is the position of the last symbol of the target sequence. The results of the experiment demonstrate that the proposed system can recognize a 4-symbol target sequence from the I branch of an 8-symbol 84Gbps QPSK input sequence, which proves the all-optical pattern recognition of QPSK signals.

High-speed all-optical pattern recognition of dispersive Fourier images through a photonic reservoir computing subsystem.

In this Letter, we present and fully model a photonic scheme that allows the high-speed identification of images acquired through the dispersive Fourier technique. The proposed setup consists of a photonic reservoir-computing scheme that is based on the nonlinear response of randomly interconnected InGaAsP microring resonators. This approach allowed classification errors of 0.6%, whereas it alleviates the need for complex high-cost optoelectronic sampling and digital processing.

High-speed optical binary data pattern recognition for network security applications

All-optical high-speed binary data pattern recognition is one of the key technologies in network security applications. A serial pattern recognition scheme is presented, which can detect and locate a specified random target pattern within an input data sequence at high bit-rate. The logic operation principle is presented using logic equations. The logic AND/XNOR gates and a recirculating loop at 10.65–42.6 Gbit/s are successfully demonstrated using three semiconductor optical amplifier (SOA) based gates. The experiments have successfully demonstrated the random pattern recognition up to 256–bits at 42.6 Gbit/s.

A new paradigm for real-time parallel storage and recognition of patterns based on a hierarchical organization of associative memories utilizing Walsh function encoding

A new hierarchical Walsh memory which can store and quickly recognize any number of patterns is proposed. A Walsh function based associative memory was found to be capable of storing and recognizing patterns in parallel via purely a software algorithmic technique (namely, without resorting to parallel hardware) while the memory itself only takes a single pattern space of computer memory, due to the Walsh encoding of each pattern. This type of distributed associative memory lends itself to high speed pattern recognition and has been reported earlier in a single memory version. In this paper, the single memory concept has first been extended to a parallel memory module and then to a tree-shaped hierarchy of these parallel modules that are capable of storing and recognizing any number of patterns for practical large scale data applications exemplified by image and speech recognition. The memory hierarchy was built by successively applying k-means clustering to the training data set. In the proposed architecture, the clustered data subsets are stored respectively into a parallel memory module where the module allocation is optimized using the genetic algorithm to realize a minimal implementation of the memory structure. The system can recognize all the training patterns with 100% accuracy and further, can also generalize on similar data. In order to demonstrate its efficacy with large scale real world data, we stored and recognized over 500 faces while at same time, achieving much reduced recognition time and storage space than template matching.

The Lay of the Land

A pervasive computing system is usually built upon a familiar set of technologies that have matured in the past two decades: microprocessors, high-speed data communication, sensors, pattern recognition, and sophisticated human interfaces. Yet, the ideas behind their application in a pervasive setting can be traced back to the origins of mechanical computing. Modern pervasive computing differs from these primitive examples because it attempts to hide or at least partially conceal the computer itself.

Cascaded linear shift-invariant processors in optical pattern recognition

We study a cascade of linear shift-invariant processing modules (correlators), each augmented with a nonlinear threshold as a means to increase the performance of high-speed optical pattern recognition. This configuration is a special class of multilayer, feed-forward neural networks and has been proposed in the literature as a relatively fast best-guess classifier. However, it seems that, although cascaded correlation has been proposed in a number of specific pattern recognition problems, the importance of the configuration has been largely overlooked. We prove that the cascaded architecture is the exact structure that must be adopted if a multilayer feed-forward neural network is trained to produce a shift-invariant output. In contrast with more generalized multilayer networks, the approach is easily implemented in practice with optical techniques and is therefore ideally suited to the high-speed analysis of large images. We have trained a digital model of the system using a modified backpropagation algorithm with optimization using simulated annealing techniques. The resulting cascade has been applied to a defect recognition problem in the canning industry as a benchmark for comparison against a standard linear correlation filter, the minimum average correlation energy (MACE) filter. We show that the nonlinear performance of the cascade is a significant improvement over that of the linear MACE filter in this case.

Pattern recognition system using evolvable hardware

We have developed a high-speed pattern recognition system using evolvable hardware (EHW). EHW is hardware that can change its own structure by genetic learning for maximum adaptation to the environment. The purpose of the system is to show that recognition devices based on EHW are possible and that they have the same robustness to noise as devices based on an artificial neural network (ANN). The advantage of EHW compared with ANN is the high processing speed and the readability of the learned result. In this paper, we describe the learning algorithm, the architecture, and the experiment involving a pattern recognition system that uses EHW. We also compare the processing speed of the pattern recognition system with two types of ANN dedicated hardware and discuss the performance of the system. © 2000 Scripta Technica, Syst Comp Jpn, 31(4): 1–11, 2000

Morphology and autowave metric on CNN applied to bubble-debris classification

In this study, we present the initial results of cellular neural network (CNN)-based autowave metric to high-speed pattern recognition of gray-scale images. the application is to a problem involving separation of metallic wear debris particles from air bubbles. This problem arises in an optical-based system for determination of mechanical wear. This paper focuses on distinguishing debris particles suspended in the oil flow from air bubbles and aims to employ CNN technology to create an online fault monitoring system. For the class of engines of interest bubbles occur much more often than debris particles and the goal is to develop a classification system with an extremely low false alarm rate for misclassified bubbles. The designed analogic CNN algorithm detects and classifies single bubbles es and bubble groups using binary morphology and autowave metric. The debris particles are separated based on autowave distances computed between bubble models and the unknown objects. Initial experiments indicate that the proposed algorithm is robust and noise tolerant and when implemented on a CNN universal chip it provides a solution in real time.

High-speed pattern-recognition systems using parallel-access optical disks

We discuss the use of parallel-access optical disks for high-speed pattern-recognition systems. Three practical configurations that make use of the unique properties of optical disks are discussed. A practical incoherent disk-based correlator is described, and its performance illustrated by use of both matched filters and computer-generated minimum average correlation energy filters.

Time-domain optical memory for image storage and high-speed image processing

We present an experimental study on the use of the time-domain optical memory for image storage and high-speed image processing. We focus on examining the fidelity of the recalled images and their spatial resolution as well as various image-processing operations offered by the memory. The recalled images were found to be of good quality because of their phase-conjugate nature. This unique feature further motivated us to examine the feasibility of fiber optics being used for image transmission, an issue important to the development of such a memory device. Two primary processing operations, two-image convolution and correlation, were demonstrated, and implications of the results for high-speed pattern recognition and optical interconnections are discussed.

High-speed pattern recognition by using stimulated echoes

We present experimental results demonstrating the use of stimulated echoes for high-speed pattern recognition. One data image and two reference images (spatially encoded laser pulses) were stored and processed in a Pr(3+):LaF(3) crystal by focusing the pulses sequentially into the storage material. The processed information was later retrieved by a read pulse, generating two temporally separated echo images that are the spatial correlations between the data and reference images. Identification of the data image was accomplished by finding the echo image that showed the highest spatial correlation with the data image. The present processing speed is 30 ns per correlation operation.

Nanosecond image processing using stimulated photon echoes

Processing of two-dimensional images on a nanosecond time scale is demonstrated using the stimulated photon echoes in a rare-earth-doped crystal (0.1 at. % Pr(3+):LaF(3)). Two spatially encoded laser pulses (pictures) resonant with the (3)P(0)-(3)H(4) transition of Pr(3+) were stored by focusing the image pulses sequentially into the Pr(3+):LaF(3) crystal. The stored information is retrieved and processed by a third read pulse, generating the echo that is the spatial convolution or correlation of the input images. Application of this scheme to high-speed pattern recognition is discussed.

Coherent optical correlator using a deformable mirror device spatial light modulator in the Fourier plane

Attention is given to experimental results for a binary phase-only filter implementation's correlation operations, using the deformable mirror device (DMD) spatial light modulator as the Fourier plane filter. These results demonstrate the basic capabilities of the DMD in an image correlator system which, in combination with the potential 8-kHz frame rate for 128 x 128 DMDs, can constitute a very high speed pattern recognition system. The DMD has the further capability of operating in the analog mode.