High-speed Optical Transceivers Research Articles

Status of the MDT Trigger Processor for the ATLAS Level-0 Muon trigger at the HL-LHC

The MDT Trigger Processor (MDTTP) is a key ATLAS Level-0 Muon trigger upgrade component designed to meet High-Luminosity LHC requirements. The MDTTP will use MDT hits in the hardware level trigger for the first time in ATLAS to improve the momentum resolution of muon candidates provided by RPC and TGC detectors and reduce the fake muon trigger rate.The MDTTP hardware is based on the Apollo ATCA platform. The prototype includes a VU13P-FPGA, high-speed FireFly optical transceivers, peripherals, and other improvements learned from using the previous hardware demonstrator. We present the prototype status, firmware implementation, core algorithm, slow-control software, and first integration tests.

4 Ways to Put Lasers on Silicon: You Can Make Many Things with Silicon Photonics, But a Laser is not One of Them

Photonic Integrate Circuita, which combine a collection of optoelectronic functions on a single chip, are an increasingly common part of everyday life. They are used in high-speed optical transceivers that link server racks in data centers, including the one used to deliver the IEEE Spectrum website, in lidars to keep self-driving cars on track, and in spectrometers to spot chemicals in the atmosphere, among many other applications. All these systems have grown less expensive and, in some cases have become economically feasible, by making most of the IC with silicon fabrication technologies.

VCSEL-based optical transceiver with a 90°-bent graded-index core polymer waveguide coupler for 25.78-Gb/s transmission

In this paper, we propose a low-loss assembly of optical elements [vertical cavity surface emitting laser (VCSEL)/photodiode (PD)] and a 90°-bent graded-index (GI) core polymer optical waveguide for compact high-speed optical transceivers. The air gap between the 90°-bent GI-core waveguide and VCSEL/PD chips are filled with a high-index resin, and we demonstrate a reduction not only of the Fresnel reflection loss but also of the coupling loss due to the lower divergence angle of VCSEL and fiber output beams. In this paper, the core size and NA of the 90°-bent GI-core in the polymer waveguide are redesigned to match the specific launch conditions realized with the gap filled with resins, resulting in theoretical estimates of insertion losses as low as 0.82 dB and 1.38 dB for the waveguides on the transmitter and receiver sides, respectively. Such low insertion losses are obtained not by step-index core but GI core waveguides. After redesigning the structure, 90°-bent GI-core polymer waveguides with a bending radius of 1 mm are experimentally fabricated using the Mosquito method, and we experimentally demonstrate that the insertion loss of the waveguide can be reduced by about 4 dB when the 100-µm air gap is filled with an optical adhesive (na = 1.51). In addition, an error-free 25.78-Gb/s data transmission is successfully demonstrated over a 100-m MMF link using the fabricated VCSEL based transceivers with 90°-bent GI core polymer optical waveguides.

Low-cost high-speed rapidly reconfigurable integrated half-duplex optical transceiver front-end.

We present and demonstrate an integrated approach to make low-cost high-speed half-duplex optical transceiver with rapid reconfigurability. A single Distributed-Feedback (DFB) diode is employed as the unified E/O-O/E device, which is dynamically biased as laser or photodetector in transmitter or receiver mode. The bias for the DFB and the transmit/receive (T/R) signal path are provided by a custom-designed reconfigurable CMOS chip, which contains the biasing circuitry, a high-speed T/R switch and a burst-mode transimpedance amplifier (BM-TIA). The transceiver front-end operates up to 5 Gb/s for both transmitter (Tx) and receiver (Rx) mode experimentally, while its reconfiguration time is less than 131 ns. This integrated approach not only halves the transceiver optics to facilitate low cost, but also enables high-speed signal transmission as well as rapid reconfiguration, which will be critical for the fiber-to-everything paradigm shift in the near future.

High-performance waveguide-coupled lateral Ge/Si avalanche photodetector.

A high-performance waveguide-coupled lateral avalanche photodetector (APD) is experimentally demonstrated without silicon epitaxy and charge layer ion implantation. At the wavelength of 1550 nm, it shows a high responsivity of 48 A/W and a gain-bandwidth product (GBP) of 360 GHz. Wide-open eye diagrams at 25 Gbps can be observed at various avalanche gains. These outstanding performances indicate the proposed APD has great potential in high-speed optical transceivers for optical links.

Low-Frequency-Drop of Electroabsorption Modulated Lasers and the Improvement With Partially Corrugated Grating Based DFB Lasers

Electroabsorption modulated lasers (EMLs) is sensitive to the residual facet reflection (RFR), which can cause a low-frequency drop (LFD) in the modulation response. The LFD may result in output waveform distortion, especially for high-data rate and multi-level modulation. We verify by simulation and experiments that the effect of LFD on the EML performance and propose to use LFD as one of the key performance indices for qualifying EMLs in high-speed optical transceivers. LFD can be suppressed by incorporating partial-corrugated-grating (PCG) in the laser section. With PCG-DFB structure, the EMLs can maintain high single-mode yield (SMY) and an excellent quality factor even with a strong modulator reflection from EAM section. This provides the robustness in applying the PCG-DFB to achieve a flat intensity modulation response or to enhance the output waveform under large signal modulation. By designing the PCG-EML to have about 60% of grating region, it can reach >80% of SMY and improve the average Q-value from the reduced LFD in the modulation response. The PCG-EML with reduced LFD can enhance the eye-opening through reduced waveform undershoot and overshoot for transmitting 56-Gbaud/s or beyond PAM-4 signals.

Development of track segment finder for central drift chamber based level-1 trigger system in the Belle II experiment

The Belle II experiment is constructed at the KEK High Energy Accelerator Research Organization in Japan. Due to the high luminosity of the beam, a trigger that effectively rejects beam-induced background is required. For this purpose, a level-1 trigger board with field-programmable gate arrays and high speed optical transceivers is developed for the central drift chamber trigger readout. Utilizing this hardware, we develop our algorithms, which find segments of charged particle trajectories using information of the central drift chamber.

Enhanced Phase Estimation for Long-Haul Multi-Carrier Systems Using a Dual-Reference Subcarrier Approach

Multi-subcarrier (MSC) modulation is recently standing out as a notable new feature in the latest generations of high-speed coherent optical transceivers, providing distinctive advantages over legacy single-carrier systems. However, the transition from single-carrier to MSC modulation still requires significant optimization of digital signal processing subsystems, in order to maximize the inherent potential of subcarrier multiplexing. In this article, the penalty associated with the usage of carrier phase estimation (CPE) methods inherited from single-carrier systems is quantitatively studied and the need for enhanced MSC-tailored solutions is evidenced. A novel pilot-based joint-subcarrier CPE method based on a dual-reference subcarrier (DRS) approach is described and numerically assessed. The proposed DRS-CPE exploits the frequency-dependent walk-off effect imposed by chromatic dispersion (CD) to enable the separation of phase noise processes incurred by the transmitter and local oscillator lasers, thereby allowing to effectively apply joint-subcarrier CPE independently of the symbol-rate per subcarrier. Our numerical results demonstrate that the proposed DRS-CPE enables to operate with near-optimum performance at symbol-rates per subcarrier as low as 1 Gbaud over ultra-long-haul distances.

Silicon Photonic Crystal Modulators for High-Speed Transmission and Wavelength Division Multiplexing

For next-era optical interconnects in data centers, development of compact, energy-efficient, low-cost, and high-speed optical transceivers are required, for which high-performance external modulators in silicon photonics will be key components. We present a silicon photonic crystal waveguide slow light Mach-Zehnder modulator suitable for this purpose. The enhancement in the modulation efficiency via the slow light effect reduces the halfwave voltage-length product VπL, maintaining a wide working spectrum over 15 nm. The frequency response of the slow light modulator is constricted by an electrooptic phase mismatch between slow light and RF signals. In this study, this was dramatically improved by matching the phase using meanderline electrodes that delay RF signals. The cutoff frequency was experimentally evaluated to be 32-38 GHz. Using this device, we demonstrated high-speed modulation, including 64-Gbps on-off keying, 100-Gbps pulse amplitude modulation, and 50-Gbps/ch wavelength division multiplexing in 170-200-μm- long devices.

A Low-Voltage Si-Ge Avalanche Photodiode for High-Speed and Energy Efficient Silicon Photonic Links

Silicon-germanium (Si-Ge) avalanche photodiodes (APDs) have large gain bandwidth product (GBP) and low excess noise due to the low impact ionization coefficient ratio of silicon. Optical receivers using APDs are able to achieve high-speed and energy efficient optical transceiver systems. We demonstrate a waveguide Si-Ge APD with low breakdown voltage of −10 V, achieving 60 Gb/s PAM4 successfully. A compact APD circuit model was constructed to allow photonic devices and transceiver circuitry co-design. The APD receiver has achieved −16 dBm sensitivity at 50 Gb/s PAM4 with a bit error rate (BER) of 2.4 $\times \,10^{-4}$ . The sensitivity of APD receivers changes with the multiplication gain. In our analysis, compared to a PIN PD receiver the APD receiver operating at optimum gain can obtain $\sim$ 8 dB more sensitivity for NRZ signaling at $ 50 Gb/s and 3–4 dB more sensitivity for PAM4 signaling at 50–100 Gb/s. Also, the APD receiver operating at optimum gain can reduce power consumption by $\sim\!\text{10}\%$ at PAM4 data rates of 50 Gb/s and $\sim\!\text{15}\%$ at 100 Gb/s in a silicon carrier-depletion microring modulator based WDM photonic link.

High-Speed VCSEL-Based Transceiver for 200 GbE Short-Reach Intra-Datacenter Optical Interconnects

The soaring demand for higher speeds in datacenters to address the relentless growth of the global IP traffic places optical interconnects in the spotlight. In this manuscript, we present a high-speed optical transceiver for intra-datacenter connectivity. The transceiver is based on single-mode, single-polarization high-speed vertical-cavity surface-emitting lasers (VCSELs), a VCSEL driver chip, and a linear receiver. Following a step-by-step approach, we present the architectures, assembly processes, and experimental results from the different modules. More specifically, we demonstrate (1) a data transmission experiment at 80 Gb/s using PAM-4 (four-level Pulse Amplitude Modulation) modulation for a reach of up to 500 m by employing a single-mode VCSEL module, and (2) a full-link experiment proving up to 64 Gb/s per lane capacity using PAM-4 signaling of the VCSEL-based optical transceiver test vehicles in back-to-back configuration and up to 56 Gb/s for 500 m and 2 km transmission distances. The acquired experimental results verify the suitability of the optical transceiver for intra-datacenter interconnects’ applications.

Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.

Electronic and photonic technologies have transformed our lives-from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions1,2. This goal is hindered by the fact that most silicon nanotechnologies-which enable our processors, computer memory, communications chips and image sensors-rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal-oxide-semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS processtechnology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing3,4. By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions 5 , but with the performance, complexity and scalability of 'systems on a chip'1,6-8. As transistors smaller than ten nanometres across become commercially available 9 , and as new nanotechnologies emerge10,11, this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

DAC-Free Ultralow-Power Dual-Polarization 64-QAM Transmission at 32 GBd With Hybrid InP IQ SEMZM and BiCMOS Drivers Module

A hybrid transmitter module comprising a 15-segment InP IQ segmented Mach–Zehnder modulator and two 0.13 μ m BiCMOS SiGe:C drivers with integrated 4-bit DAC functionality is described. The high-resolution prototype allows a wide range of modulation formats and, for the first time, ultralow-power dual-polarization (DP) 64-QAM signal generation at record speed of 32 GBd without the usage of external DACs is demonstrated. The DP 64-QAM signal is transmitted error free over 80 km of SSMF with 7.8 pJ/bit/polarization energy consumption. Post-FEC BER results are presented, with more than 226 bits decoded without errors after four decoding iterations. The package footprint is 28 mm × 76 mm. These results evidence the advantage of the proposed arrangement for the next generation low-power high-speed optical transceivers.

FPGA Prototyping of Single-Polarization 112-Gb/s Transceiver for Optical Multilevel Signaling With Intensity and Delay Detection

As the proof-of-concept of a next-generation 100-Gb/s/channel high-speed optical transceiver for short- to mid-range applications, we develop a first full-rate and fully-functional FPGA-based single-polarization 16APSK/16QAM transceiver prototype using optical delay- and intensity-detection. Almost all the major transceiver functions, such as multilevel modulation/demodulation, timing recovery, framing functions with FEC, and linear equalizers are implemented into eight FPGAs, and the feasibility of the proposed transceiver with small circuit size and low power consumption is confirmed. Various compensation functions previously reported for the performance improvement of the delay-detection-based multilevel signaling, such as Rx-side phase noise, chromatic dispersion canceling circuits, compensation of unbalance of balanced photodetectors, symbol decision with non-Euclidian metric, etc., are also implemented in the real-time transceiver for the first time. In this paper, its basic concept, FPGA implementation, real-time signal demodulation, and BER performances are shown and four-channel WDM (448 Gb/s) field trial over 18.2-km SMF is also demonstrated.

Advances in optical communications networks [Series Editorial

The global telecommunications industry has been focusing on network functions virtualization (NFV) and software-defined networking (SDN) to provide service providers with the tools for more effective operation and management of communications networks. These important trends are expected to gain additional momentum in 2016. Recent developments in the Internet of Things and cloud computing promise to make programmable network management and control an imperative. In 2015, we witnessed the evolution of more efficient optical transport capabilities delivered by the optical components and systems suppliers as high-speed optical and data center networks expanded globally. Underlying this evolution has been the ever accelerating development of high-speed interconnects and optical transceivers for data center networks. We expect to see continued migration to all-optical networks in 2016 and beyond.

Field Trial of Long-Reach and High-Splitting λ-Tunable TWDM-PON

This paper presents the world's first field trial of a 40-km reach and over 512-split symmetric-rate 40-Gbit/s λ-tunable time and wavelength division multiplexing passive optical network (TWDM-PON) that utilizes our newly developed high-speed λ-tunable optical network unit transceivers and automatic gain controlled semiconductor optical amplifier-based PON extender for repeater and central office use. The upstream signals for C-band and downstream signals for L+-band in our developed λ-tunable TWDM-PON comply with the wavelength plan of ITU-T G.989 series. In a field trial, we successfully demonstrate error free λ-tunable transmission for the 40-km reach and 1024-split (maximum number) symmetric-rate 40-Gbit/s λ-tunable TWDM-PON over installed standard single-mode fiber links, and advanced network functions such as dynamic load balancing, incremental system upgrade, optical subscriber unit protection, and OLT equipment power saving are also confirmed.

A new high-speed optical transceiver for data transmission at the LHC experiments

We report on results of radiation tests of a new commercial off-the-shelf fiber-optic link as a candidate for the transmission of data from the detector to the counting room for experiments at the Large Hadron Collider (LHC). The device is manufactured by Molex using CMOS integrated silicon photonics developed by Luxtera. A transceiver contains four RX and four TX channels operating at 10 Gbps each, and is packaged in a QSFP+ module. The approach uses a standard CMOS process and single-mode fibers, providing low power consumption and good scalability and reliability. We present performance measurements, radiation tolerance measurements, and plans for deployment in the ATLAS experiment at the LHC.

차세대 자동차 광네트워크 MOST1000 용 광트랜시버 모듈

본 논문에서는 차세대 자동차용 고속 광네트워크 기술인 MOST1000에 적용이 가능한 1 Gbps 급 광트랜시버 모듈의 설계와 제작에 관하여 언급하고 있다. 종래의 자동차용 네트워크 시스템은 10 Mbps ~ 150 Mbps의 데이터 전송속도를 사용하였으나, 최근 인포테인먼트의 발달로 인해 기기 간 통신 속도를 높여 주는 고속 네트워크 기술이 요구되면서 1 Gbps 급의 광네트워크 시스템이 향후에 도입될 것으로 예상되고 있다. 따라서, 본 논문에서는 고속 광네트워크 시스템의 핵심 부품인 1 Gbps 데이터 전송이 가능한 광트랜시버 모듈을 설계 및 제작하였다. 본 논문에서는 1 Gbps 데이터 전송을 위해 기존 광트랜시버의 광원인 RCLED (resonant cavity light emitting diode)를 VCSEL (vertical cavity surface emitting laser)로 대체하였으며, 제작된 광트랜시버는 <TEX>$1{\times}2$</TEX> 비대칭 형태의 광도파로를 이용하여 하나의 PCF (plastic optical fiber) 광섬유로 결합되도록 제작하였다. 이때, 수신감도는 -22 dBm @ BER <TEX>$10^{-12}$</TEX> 으로 나타났고, 깨끗한 1 Gbps 데이터 전송 아이다이어그램 (eye diagram)을 확인하였다. Heretofore, it was enough that most of optical transceiver modules for automotive networks have the performance of data rate from 10 Mbps to 150 Mbps. As the required data rate in automotive infotainment systems has recently been increasing, the development of a new optical transceiver having high speed data rate over 1Gbps is now required. Therefore, we suggested a next-generation bi-directional optical transceiver module using vertical cavity surface emitting laser technology and plastic clad fiber technology, for the next-generation automotive optical network, MOST1000. We fabricated the high-speed and compact optical transceiver having 1 Gbps data rate and -22 dBm sensitivity satisfying bit error rate <TEX>$10^{-12}$</TEX>.

High-speed, Monolithic CMOS Receivers with Ge on Si Waveguide Photodetectors

This paper describes Luxtera's approach to the monolithic integration of Germanium photodetectors with CMOS electronics for high speed optical transceivers. Insertion of the Germanium module into a CMOS process and its impact on the design of the detectors is discussed. The deployment of the devices in 4x10 Gbps receivers is also described, wherein an optical sensitivity of - 19 dBm for a bit error rate of 1e-12 is demonstrated. The optimization of the transimpedance amplifier to take advantage of the reduced capacitance (<20fF) of the waveguide detectors is also discussed.

A 90 nm CMOS 16 Gb/s Transceiver for Optical Interconnects

Interconnect architectures which leverage high-bandwidth optical channels offer a promising solution to address the increasing chip-to-chip I/O bandwidth demands. This paper describes a dense, high-speed, and low-power CMOS optical interconnect transceiver architecture. Vertical-cavity surface-emitting laser (VCSEL) data rate is extended for a given average current and corresponding reliability level with a four-tap current summing FIR transmitter. A low-voltage integrating and double-sampling optical receiver front-end provides adequate sensitivity in a power efficient manner by avoiding linear high-gain elements common in conventional transimpedance-amplifier (TIA) receivers. Clock recovery is performed with a dual-loop architecture which employs baud-rate phase detection and feedback interpolation to achieve reduced power consumption, while high-precision phase spacing is ensured at both the transmitter and receiver through adjustable delay clock buffers. A prototype chip fabricated in 1 V 90 nm CMOS achieves 16 Gb/s operation while consuming 129 mW and occupying 0.105 mm2.